Yes, the error comes from the Vivado compilation stage.. Today I changed the hls code to not use the hls_stream objects in the input/output ports and I have been able to compile the model, so the problem seems to be in that direction. I think I need more time reading the hls_stream documentation to see what is the actual issue and then dig into the vivado project, but at least now I know that using hls+sysgen is possible. Thanks!
El vie., 17 abr. 2020 a las 9:37, Jack Hickish (<jackhick...@gmail.com>) escribió: > Hi Sebastian, > > What you're suggesting _should_ work, but I don't know of anyone that has > actually tried. Before getting too deep, does your design compile without > the HLS black box in simulink? > > Does your error come from system generator or from the backend vivado > compile? If the latter, you can open the vivado project built at > <simulink_model_name>/myproj/myproj.xpr and poke around, which might help > you figure out what's wrong. > > Cheers > Jack > > On Fri, 17 Apr 2020 at 02:57, Sebastian Antonio Jorquera Tapia < > sebastian.jorqu...@ug.uchile.cl> wrote: > >> Hello Casperites, >> >> Does any one had try to use the Vivado HLS inside the Simulink? >> >> I build a simple test that pass the RTL synthesis and gives the same >> results in the co-simulation with the C testbench code. Then I export the >> RTL to the system generator and import the project using the vivado HLS >> block in simulink, using as path the solution directory. >> >> I discover that the Vivado 2019.2 version has some bugs and you must >> modify the auxiliary.xml file, because the HLS set all the ports as it has >> bool, so I change the data type in that file. Beside that I didnt made any >> change to the files provided by HLS. >> >> But when I try to compile the system using the jasper command it fails >> saying that I didn't declare an axi4lite register inside the HLS project (I >> am using the hls_stream library).. >> >> Does anybody face the same problem? Maybe I could have some problem with >> my HLS code, but now I am only looking if the combo HLS+SysGen in the >> casper toolflow works, so if someone had successfully import a HLS code is >> good starting point. >> >> In another related question, look in the Xilinx forum I found that the >> HLS 2015.4 supports exporting the RTL to the ISE SysGen .... Has anyone >> tried it already? >> >> >> >> -- >> You received this message because you are subscribed to the Google Groups >> "casper@lists.berkeley.edu" group. >> To unsubscribe from this group and stop receiving emails from it, send an >> email to casper+unsubscr...@lists.berkeley.edu. >> To view this discussion on the web visit >> https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/ddd5fe7d-36d4-4b16-b358-cf3bb4405d4c%40lists.berkeley.edu >> <https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/ddd5fe7d-36d4-4b16-b358-cf3bb4405d4c%40lists.berkeley.edu?utm_medium=email&utm_source=footer> >> . >> > -- > You received this message because you are subscribed to the Google Groups " > casper@lists.berkeley.edu" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to casper+unsubscr...@lists.berkeley.edu. > To view this discussion on the web visit > https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/CAG1GKS%3DYGKsYDPXZhnn2xC4Rr4xcEU9uzdZWDBT7jjM6gp8nww%40mail.gmail.com > <https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/CAG1GKS%3DYGKsYDPXZhnn2xC4Rr4xcEU9uzdZWDBT7jjM6gp8nww%40mail.gmail.com?utm_medium=email&utm_source=footer> > . > -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu. To view this discussion on the web visit https://groups.google.com/a/lists.berkeley.edu/d/msgid/casper/CAASoV%3DNuh9k_5ufbc5c2k86jp81uzvRruQ4WM06ztiLYUU-F_w%40mail.gmail.com.
