Jeff Epler wrote: > Jon, > What *should* the driving signals look like at the input of your > amplifiers? I assume from your response that I'm making some kind of > rookie mistake here, compounded by the fact that I still don't > understand what the mistake is. No, maybe not.
My amps were designed for sign/magnitude. The direction signal is pretty obvious, and the PWM signal should have current in the optocoupler's LED when you want the power transistor "on". So at idle, there should be only very short current pulses in the PWM opto, amd the direction will be flipping back and forth as the control loop dithers. What you want to avoid is dithering where the PWM is more than a couple percent and the direction is flipping back and forth each PWM cycle. The PWM can go to zero%, but should not exceed about 97% on-time, to keep the bootstrap capacitors charged. These amps CAN be driven in synchronous-antiphase, where you turn the PWM on all the time and control only the direction signal, but above about 50 V on the DC supply, the filter inductors will really overheat badly. So, I don't recommend that mode of operation. Here, the idle situation would have a 50% duty cycle on the DIR input. There's also the "bootstrap" problem, where the amps need a pulse in each direction every time they come out of estop to reset the shutdown FFs in the FET driver chips. (My AC servo amps handle this in the CPLD, but the 4000-series CMOS in the DC brush version of the amp is the epitome of dumbness.) Jon ------------------------------------------------------------------------- Check out the new SourceForge.net Marketplace. It's the best place to buy or sell services for just about anything Open Source. http://sourceforge.net/services/buy/index.php _______________________________________________ Emc-users mailing list Emc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-users
