[Patch AArch64] Fix for PR62040

[Carrot Wei]

Hi

Current AArch64 backend can generate rtl expressions like
(vec_duplicate:DI (const_int 0 [0])), which causes ICE in
simplify_const_unary_operation because vec_duplicate should generate
vector mode only.

As suggested by Andrew in the bug entry, I split the original insn
patterns to avoid scalar mode vec_duplicate expression.

Passed regression tests on qemu without failure.
OK for trunk and 4.9 branch?

thanks
Guozhi Wei

2014-08-19  Guozhi Wei  <car...@google.com>

        PR target/62040
        * config/aarch64/iterators.md (VQ_NO2E, VQ_2E): New iterators.
        * config/aarch64/aarch64-simd.md (move_lo_quad_internal_<mode>): Split
        it into two patterns.
        (move_lo_quad_internal_be_<mode>): Likewise.

patch
Description: Binary data