Hi All,
I am working with the InOrder CPU model for ALPHA ISA in SE mode. I have
attached a monitoring unit, parallel to the main InOrder CPU pipeline. This
monitoring unit is itself pipelined and am making use of the another
instantiation of the TimeBufferStruct to communicate between its stages. I
notice that in the code, some activity monitoring happens with respect to
the main instruction pipeline stages and the CPU is put to sleep when no
activity is recorded in the any stage of the pipeline. I want this activity
recorder to keep into account the activity in my monitoring unit as well, so
that if some processing is going on there, the CPU is not put to sleep. Can
somebody help me out in this. I checked the files activityRec.c, but I don't
understand it properly.
Also, I notice that in the cpu files, the activity recorder is instantiated
as:-
activityRec(params->name, NumStages, 10, params->activity) =>
Why is the longest latency 10 here, if numStages = 5?Is there some
correlation? Is there some documentation which speaks about it. To also
monitor the activity in the "separate monitoring unit", should I make
changes to the same activityRec structure, as in increase the numstages to
the total number of instruction pipeline stages + number of stages in the
monitoring unit? Can somebody help me out with this?
Thanks,
Reena
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