Hello everyone,
I thought duplicated definition for a target is not
correct. But it seems that it is ok to define a target
more than once. See this sample Makefile (I defined
Foo twice),
--------------------
Goo:
@echo "Goo"
Foo: Goo
Foo:
@echo "Foo"
--------------------
when I execute make Foo, the output is,
--------------------
Goo
Foo
--------------------
So, my question is that. Is it ok to define a target
more than once? Always ok or under some conditions?
thanks in advance,
George
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