https://bugs.kde.org/show_bug.cgi?id=361207
--- Comment #3 from Julian Seward <jsew...@acm.org> --- (In reply to Carl Love from comment #1) > Created attachment 98163 [details] > Patch 2 of 5 to add VEX support for the POWER ISA 3.0 instructions --- a/VEX/priv/guest_ppc_toIR.c +++ b/VEX/priv/guest_ppc_toIR.c @@ -13138,6 +13138,680 @@ static Bool dis_av_procctl ( UInt theInstr ) + int i; Please use the "house" types (Int) rather than the raw C type (int). Here and throughout. + binop( Iop_64HLtoV128, + mkU64( 0xFFFFFFFFFFFFFFFF ), + mkU64( 0xFFFFFFFFFFFFFFFF ) ) ) ); The ppc back end knows how to generate a 128 bit all-ones-value into a vector register. So just replace all that with mkV128(0xFFFF). See the very end of iselVecExpr_wrk in host_ppc_isel.c. (This appears more than once in the source code.) On the whole it looks ok. My only concern is that it seems rather repetitive in places. I wonder if you couldn't shorten it up a bit by writing a few subroutines? For example, this idiom seems to occur several times + binop( Iop_Xor32, + binop( Iop_Xor32, + mkexpr( something1 ), + mkexpr( something2 ) ), + binop( Iop_Xor32, + mkexpr( something3 ), + mkexpr( something4 ) ) ) ); and also + + binop( Iop_64HLtoV128, + binop( Iop_32HLto64, + mkexpr( something0 ), + mkexpr( something1 ) ), + binop( Iop_32HLto64, + mkexpr( something2 ), + mkexpr( something3 ) ) For the latter, you could borrow breakupV128to32s and mkV128from32s from guest_amd64_toIR.c. Just as an example of making this stuff a bit more concise. -- You are receiving this mail because: You are watching all bug changes.
