https://bugs.kde.org/show_bug.cgi?id=361207

Carl Love <c...@us.ibm.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
  Attachment #98163|0                           |1
        is obsolete|                            |

--- Comment #5 from Carl Love <c...@us.ibm.com> ---
Created attachment 98295
  --> https://bugs.kde.org/attachment.cgi?id=98295&action=edit
Updated VEX support patch

The patch was updated to address Julian's comments.  
>   + binop( Iop_64HLtoV128, 
>             + mkU64( 0xFFFFFFFFFFFFFFFF ),  
>             + mkU64( 0xFFFFFFFFFFFFFFFF ) ) ) );
>  The ppc back end knows how to generate a 128 bit all-ones-value into a 
> vector register. So  
>   just replace all that with mkV128(0xFFFF)

    Done

> My only concern is that it seems rather repetitive in places. I wonder if you 
> couldn't shorten
> it up a bit by writing a few subroutines?

The following functions were added and used in multiple places to make the code
more readable.

static inline IRExpr* mkXOr4_32( IRTemp t0, IRTemp t1, 
                                                                         
IRTemp t2,                                                     
                                                                         
IRTemp t3)
{
   return binop( Iop_Xor32,                                                     
                 binop( Iop_Xor32, mkexpr( t0 ), mkexpr( t1 ) ),                
                 binop( Iop_Xor32, mkexpr( t2 ), mkexpr( t3 ) ) );              
}                                                                               

static inline IRExpr* mkOr3_V128( IRTemp t0, IRTemp t1, IRTemp t2) 
{       
   return binop( Iop_OrV128,   
                 mkexpr( t0 ),   
                 binop( Iop_OrV128, mkexpr( t1 ), mkexpr( t2 ) ) );  
}                        

static inline IRExpr* mkOr4_V128( IRTemp t0, IRTemp t1, IRTemp t2,
                                                          IRTemp t3 ) 
{ 
   return binop( Iop_OrV128, 
                binop( Iop_OrV128, mkexpr( t0 ), mkexpr( t1 ) ), 
                 binop( Iop_OrV128, mkexpr( t2 ), mkexpr( t3 ) ) );             
}                                                                               

static inline IRExpr* mkOr4_V128_expr( IRExpr* t0, IRExpr* t1, IRExpr* t2,
                                                                  IRExpr* t3 )  
{                                                                               
   /* arguments are already expressions */                                      
   return binop( Iop_OrV128,                                                    
               binop( Iop_OrV128, ( t0 ), ( t1 ) ),                             
               binop( Iop_OrV128, ( t2 ), ( t3 ) ) );                           
}                                                                               

static IRExpr* extract_field_from_vector( IRTemp vB, IRExpr* index, UInt mask) 
{ 
   /* vB is a vector, extract bits starting at index to size of mask */         
   return unop( Iop_V128to64,                                                   
                binop( Iop_AndV128,                                             
                            binop( Iop_ShrV128,                                 
                                         mkexpr( vB ),                          
                                         unop( Iop_64to8,                       
                                                     binop( Iop_Mul64, index,   
                                                                 mkU64( 8 ) ) )
),                                                          
                              binop( Iop_64HLtoV128, 
                                          mkU64( 0x0 ),                         
                                          mkU64( mask ) ) ) );                  
} 

The updated patch is attached for additional review.

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