On Thursday 08 February 2007 09:58, Mikael Pettersson wrote:
> On Thu, 8 Feb 2007 00:00:32 +0300, Sergei Shtylyov wrote:
> >Remove the bogus code pretending to set SW/MW DMA timings -- I wonder whether
> >its author really thought that he could achieve that wrtiting to BMIDE status
> >registers? Stop fiddling with the DMA capable bits in the speedproc() --
> >they
> >do not enable DMA, and are properly dealt with by the dma_host_{on,off}
> >methods;
> >also, get rid of the duplicate reads/writes of UDIDETCRx registers, and do
> >some
> >coding style and whitespace changes while at it...
> >
> >Unfortunately, fixing the SW/MW DMA support would requre a major driver
> >rewrite
> >along with some more fixing, so I'm putting it off...
> >
> >Warning: this has been compile-tested only.
>
> Worked fine on my SPARC Ultra5.
thanks, applied
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