On Tue, Nov 22, 2016 at 08:54:18AM +0100, Martin Kaiser wrote: > The HM and TM fields in the LCDC DMA Control Register are 7 bits wide. > Use the correct mask to allow setting all possible bits. > > Signed-off-by: Martin Kaiser <mar...@kaiser.cx> > --- > > This bug was discovered on a board that uses DMACR_TM(16). We ended up > with TM==0 in the register, the upper three bits were filtered out. > > The LCD DMA Control Register is described in section 33.3.16 of the > IMX25 reference manual.
For the MX1 which is also supported by this driver, the definitions are right. So this needs a more sophisticated patch. Also I wonder why the register definition is in include/linux/platform_data and not in the driver directly. Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-König | Industrial Linux Solutions | http://www.pengutronix.de/ |
