On Tue, Apr 18, 2017 at 06:56:43PM +0800, Icenowy Zheng wrote:
>
>
> 于 2017年4月18日 GMT+08:00 下午3:00:16, Maxime Ripard
> <maxime.rip...@free-electrons.com> 写到:
> >On Mon, Apr 17, 2017 at 07:57:37PM +0800, Icenowy Zheng wrote:
> >> Allwinner A64 SoC features a NMI controller, which is usually
> >connected
> >> to the AXP PMIC.
> >>
> >> Add support for it.
> >>
> >> Signed-off-by: Icenowy Zheng <icen...@aosc.io>
> >> Acked-by: Chen-Yu Tsai <w...@csie.org>
> >> ---
> >> Changes in v2:
> >> - Added Chen-Yu's ACK.
> >>
> >> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++
> >> 1 file changed, 8 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> index 05ec9fc5e81f..53c18ca372ea 100644
> >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> @@ -403,6 +403,14 @@
> >> <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> >> };
> >>
> >> + nmi_intc: interrupt-controller@01f00c0c {
> >> + compatible = "allwinner,sun6i-a31-sc-nmi";
> >> + interrupt-controller;
> >> + #interrupt-cells = <2>;
> >> + reg = <0x01f00c0c 0x38>;
> >
> >The base address is not correct, and there's uncertainty on whether
> >this is this particular controller or not. Did you even test this?
>
> Tested by axp20x-pek.Still, the base address is wrong, which is yet another hint that this is not the same interrupt controller, and just works by accident. Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
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