On Wed, 2017-04-26 at 13:39 +0200, Mike Galbraith wrote: > On Wed, 2017-04-26 at 12:26 +0200, Peter Zijlstra wrote: > > On Wed, Apr 26, 2017 at 10:57:42AM +0200, Mike Galbraith wrote: > > > > > Both still lose their TSC. > > > > > > [ 11.982468] tsc: Refined TSC clocksource calibration: 2260.999 MHz > > > [ 11.994275] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: > > > 0x20974a4d8bb, max_idle_ns: 440795246623 ns > > > [ 13.064172] clocksource: Switched to clocksource tsc > > > [ 240.247851] clocksource: timekeeping watchdog on CPU23: Marking > > > clocksource 'tsc' as unstable because the skew is too large: > > > [ 240.462501] clocksource: 'tsc' cs_now: > > > 108fe5be09f cs_last: b90a6a0676 mask: ffffffffffffffff > > > [ 240.675057] tsc: Marking TSC unstable due to clocksource watchdog > > > > > > And they didn't use to? We don't typically write to TSC or TSC_ADJUST > > and thus would not cause such behaviour. > > Nope.
DL980 seems perfectly happy with master.today.. so off we go.