From: Honghui Zhang <honghui.zh...@mediatek.com>
This patch add larbid descritptions for mediatek's gen1 smi larb hardware.
Signed-off-by: Honghui Zhang <honghui.zh...@mediatek.com>
---
.../bindings/memory-controllers/mediatek,smi-larb.txt | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git
a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
index 21277a5..d1b115c 100644
--- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
@@ -15,6 +15,9 @@ Required properties:
the register.
- "smi" : It's the clock for transfer data and command.
+Required property for mt2701:
+- mediatek,larbid :the hardware id of this larb.
+
Example:
larb1: larb@16010000 {
compatible = "mediatek,mt8173-smi-larb";
@@ -25,3 +28,15 @@ Example:
<&vdecsys CLK_VDEC_LARB_CKEN>;
clock-names = "apb", "smi";
};
+
+Example for mt2701:
+ larb0: larb@14010000 {
+ compatible = "mediatek,mt2701-smi-larb";
+ reg = <0 0x14010000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ mediatek,larbid = <0>;
+ clocks = <&mmsys CLK_MM_SMI_LARB0>,
+ <&mmsys CLK_MM_SMI_LARB0>;
+ clock-names = "apb", "smi";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
+ };
--
2.6.4
