Am 17.08.2017 um 12:11 schrieb Andreas Färber:
> This irq mux driver is derived from the RTD1295 vendor DT and assumes a linear
> mapping between intr_en and intr_status registers. Code for RTD119x indicates
> this may not always be the case (i2c_3).
>
> The register initialization was copied from QNAP's mach-rtk119x/rtk_irq_mux.c
> as a boot fix, without full insights into what exactly this is changing
> (TODO).
>
> Signed-off-by: Andreas Färber <afaer...@suse.de>
[...]
> diff --git a/drivers/irqchip/irq-rtd119x-mux.c
> b/drivers/irqchip/irq-rtd119x-mux.c
> new file mode 100644
> index 000000000000..c6c1ba126bf3
> --- /dev/null
> +++ b/drivers/irqchip/irq-rtd119x-mux.c
[...]
> +static int __init rtd119x_irq_mux_init(struct device_node *node,
> + struct device_node *parent,
> + const struct rtd119x_irq_mux_info *info)
> +{
> + struct rtd119x_irq_mux_data *data;
> + void __iomem *base;
> + u32 val;
[...]
> + /* TODO Investigate why these are necessary (from downstream rtk119x
> rtk_irq_mux.c) */
> + val = readl(data->intr_en);
> + val &= ~BIT(2);
> + writel(val, data->intr_en);
> +
> + writel(BIT(2), data->intr_status);
This intr_status write appears to be the fix. The register is 0x00000004
before, but oddly writing it again resolves the observed timer hang.
The intr_en register is 0xe0183924 before, and masking out bit 2 makes
no observable difference.
> +
> + irq_set_chained_handler_and_data(data->irq, rtd119x_mux_irq_handle,
> data);
> +
> + return 0;
> +}
[snip]
Regards,
Andreas
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