On Wed, 2019-10-16 at 10:36 +0000, S.j. Wang wrote:
> Assign clocks and clock-rates for audio plls, that audio
> drivers can utilize them.
> 
> Add dai-tdm-slot-num and dai-tdm-slot-width for sound-wm8524,
> that sai driver can generate correct bit clock.
> 
> Fixes: 13f3b9fdef6c ("arm64: dts: imx8mm-evk: Enable audio codec
> wm8524")
> Signed-off-by: Shengjiu Wang <shengjiu.w...@nxp.com>

Reviewed-by: Daniel Baluta <daniel.bal...@nxp.com>

> ---
>  arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 2 ++
>  arch/arm64/boot/dts/freescale/imx8mm.dtsi    | 8 ++++++--
>  2 files changed, 8 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
> b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
> index f7a15f3904c2..13137451b438 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
> @@ -62,6 +62,8 @@
>  
>               cpudai: simple-audio-card,cpu {
>                       sound-dai = <&sai3>;
> +                     dai-tdm-slot-num = <2>;
> +                     dai-tdm-slot-width = <32>;
>               };
>  
>               simple-audio-card,codec {
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 5f9d0da196e1..2139c0a9c495 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -479,14 +479,18 @@
>                                               <&clk
> IMX8MM_CLK_AUDIO_AHB>,
>                                               <&clk
> IMX8MM_CLK_IPG_AUDIO_ROOT>,
>                                               <&clk IMX8MM_SYS_PLL3>,
> -                                             <&clk
> IMX8MM_VIDEO_PLL1>;
> +                                             <&clk
> IMX8MM_VIDEO_PLL1>,
> +                                             <&clk
> IMX8MM_AUDIO_PLL1>,
> +                                             <&clk
> IMX8MM_AUDIO_PLL2>;
>                               assigned-clock-parents = <&clk
> IMX8MM_SYS_PLL3_OUT>,
>                                                        <&clk
> IMX8MM_SYS_PLL1_800M>;
>                               assigned-clock-rates = <0>,
>                                                       <400000000>,
>                                                       <400000000>,
>                                                       <750000000>,
> -                                                     <594000000>;
> +                                                     <594000000>,
> +                                                     <393216000>,
> +                                                     <361267200>;
>                       };
>  
>                       src: reset-controller@30390000 {

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