On Thu, Feb 18, 2021 at 12:20:01PM +0100, Tobias Schramm wrote: > Previously it was not possible to achieve clock rates of 24.576MHz and > 22.5792MHz, which are commonly required core clocks for the i2s > peripheral of v3s based SoCs. > > Add support for those clock rates through the audio pll's sigma-delta > modulator. > > Signed-off-by: Tobias Schramm <t.schr...@manjaro.org>
Applied, thanks Maxime
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