On Sun, Mar 28, 2021 at 06:59:28PM -0700, Brad Larson wrote:
> The Pensando Elba SoC uses a GPIO based chip select
> for two DW SPI busses with each bus having two
> chip selects.
>
> Signed-off-by: Brad Larson <b...@pensando.io>
> ---
> drivers/spi/spi-dw-mmio.c | 28 +++++++++++++++++++++++++++-
> 1 file changed, 27 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
> index 17c06039a74d..c323a5ceecb8 100644
> --- a/drivers/spi/spi-dw-mmio.c
> +++ b/drivers/spi/spi-dw-mmio.c
> @@ -56,7 +56,7 @@ struct dw_spi_mscc {
> /*
> * The Designware SPI controller (referred to as master in the documentation)
> * automatically deasserts chip select when the tx fifo is empty. The chip
> - * selects then needs to be either driven as GPIOs or, for the first 4 using
> the
> + * selects then needs to be either driven as GPIOs or, for the first 4 using
> * the SPI boot controller registers. the final chip select is an OR gate
> * between the Designware SPI controller and the SPI boot controller.
> */
> @@ -237,6 +237,31 @@ static int dw_spi_canaan_k210_init(struct
> platform_device *pdev,
> return 0;
> }
>
> +static void dw_spi_elba_set_cs(struct spi_device *spi, bool enable)
> +{
> + struct dw_spi *dws = spi_master_get_devdata(spi->master);
> +
> + if (!enable) {
Please, be more attentive to the review-comments given to you before
resending a new patchset. One more time. This version of set_cs won't
work for Active-high CS. Each SPI controller working with GPIO-based
chip-select is marked as supporting that feature. So your DW
SPI controller won't be able to work correctly with SPI-devices
activated by active-high chip-select signal. Note default
dw_spi_set_cs() callback supports that.
-Sergey
> + /*
> + * Using a GPIO-based chip-select, the DW SPI
> + * controller still needs its own CS bit selected
> + * to start the serial engine. On Elba the specific
> + * CS doesn't matter to start the serial engine,
> + * so using CS0.
> + */
> + dw_writel(dws, DW_SPI_SER, BIT(0));
> + } else {
> + dw_writel(dws, DW_SPI_SER, 0);
> + }
> +}
> +
> +static int dw_spi_elba_init(struct platform_device *pdev,
> + struct dw_spi_mmio *dwsmmio)
> +{
> + dwsmmio->dws.set_cs = dw_spi_elba_set_cs;
> + return 0;
> +}
> +
> static int dw_spi_mmio_probe(struct platform_device *pdev)
> {
> int (*init_func)(struct platform_device *pdev,
> @@ -351,6 +376,7 @@ static const struct of_device_id dw_spi_mmio_of_match[] =
> {
> { .compatible = "intel,keembay-ssi", .data = dw_spi_keembay_init},
> { .compatible = "microchip,sparx5-spi", dw_spi_mscc_sparx5_init},
> { .compatible = "canaan,k210-spi", dw_spi_canaan_k210_init},
> + { .compatible = "pensando,elba-spi", .data = dw_spi_elba_init},
> { /* end of table */}
> };
> MODULE_DEVICE_TABLE(of, dw_spi_mmio_of_match);
> --
> 2.17.1
>
