From: Vipul Kumar Samar <vipulkumar.sa...@st.com>
PATA arasan driver expects the clock to be set to 166 MHz for proper
functioning.
This patch sets clk to 166 MHz in probe.
Signed-off-by: Vipul Kumar Samar <vipulkumar.sa...@st.com>
Signed-off-by: Viresh Kumar <viresh.ku...@linaro.org>
---
drivers/ata/pata_arasan_cf.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/ata/pata_arasan_cf.c b/drivers/ata/pata_arasan_cf.c
index 26201eb..71111f2 100644
--- a/drivers/ata/pata_arasan_cf.c
+++ b/drivers/ata/pata_arasan_cf.c
@@ -317,6 +317,12 @@ static int cf_init(struct arasan_cf_dev *acdev)
return ret;
}
+ ret = clk_set_rate(acdev->clk, 166000000);
+ if (ret) {
+ dev_warn(acdev->host->dev, "clock set rate failed");
+ return ret;
+ }
+
spin_lock_irqsave(&acdev->host->lock, flags);
/* configure CF interface clock */
writel((pdata->cf_if_clk <= CF_IF_CLK_200M) ? pdata->cf_if_clk :
--
1.7.12.rc2.18.g61b472e
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