Hi Lee, On Mon, Sep 02, 2013 at 09:17:59AM +0100, Lee Jones wrote: > On Sat, 31 Aug 2013, Mark Brown wrote: > > > From: Mark Brown <broo...@linaro.org> > > > > Rather then open coding a cache of the vibra control registers use the > > regmap cache code. Also cache the interrupt mask register, providing > > a small performance improvement for the interrupt code. > > > > Signed-off-by: Mark Brown <broo...@linaro.org> > > --- > > > > I'm hoping to have some ASoC improvements to build on top of this (there > > is ASoC level register caching for the device) so it might make sense to > > apply this via ASoC. > > > > drivers/mfd/twl6040.c | 43 > > ++++++++++++++++++++++++++++++------------- > > include/linux/mfd/twl6040.h | 1 - > > 2 files changed, 30 insertions(+), 14 deletions(-) > > Applied with Peter's Ack, thanks. Please hold on. I'm preparing a branch for Mark to pull from and it will contain that patch.
Cheers, Samuel. -- Intel Open Source Technology Centre http://oss.intel.com/ -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
