On Mon, May 5, 2014 at 5:02 PM, Olof Johansson <o...@lixom.net> wrote:
> Hi,
>
> I saw this patch as it came in through Dinh's pull request, see below:
>
>
> On Sat, Mar 22, 2014 at 9:16 AM, Sebastian Andrzej Siewior
> <bige...@linutronix.de> wrote:
>> The cycloneV has three gpio controllers, the first two with 29 gpios, the
>> last
>> one with 27. This patch adds the three controller with the gpio driver which
>> is
>> now sitting the gpio tree.
>>
>> Cc: devicet...@vger.kernel.org
>> Acked-by: Alan Tull <at...@altera.com>
>> Signed-off-by: Sebastian Andrzej Siewior <bige...@linutronix.de>
>> ---
>> v1…v2:
>> - #gpio-cells = <2>
>> - third gpio block has now only 27 gpios
>>
>> arch/arm/boot/dts/socfpga.dtsi | 64
>> ++++++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 64 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
>> index 537f1a5..2a84e67 100644
>> --- a/arch/arm/boot/dts/socfpga.dtsi
>> +++ b/arch/arm/boot/dts/socfpga.dtsi
>> @@ -463,6 +463,70 @@
>> status = "disabled";
>> };
>>
>> + gpio@ff708000 {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "snps,dw-apb-gpio";
>> + reg = <0xff708000 0x1000>;
>> + clocks = <&per_base_clk>;
>> + status = "disabled";
>> +
>> + gpio0: gpio-controller@0 {
>> + compatible = "snps,dw-apb-gpio-port";
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> + snps,nr-gpios = <29>;
>> + reg = <0>;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + interrupts = <0 164 4>;
>> + };
>> + };
>
> This is an odd setup. We usually would have it all in one node, since
> the @ff708000 is the GPIO controller, instead of adding a subnode with
> the actual GPIO info.
>
> So I would have expected something more like:
>
>
> gpio0: gpio-controller@ff708000 {
> #address-cells = <1>;
> #size-cells = <0>;
> compatible = "snps,dw-apb-gpio";
> reg = <0xff708000 0x1000>;
> interrupts = <0 164 4>;
> clocks = <&per_base_clk>;
> status = "disabled";
> gpio-controller;
> #gpio-cells = <2>;
> snps,nr-gpios = <29>;
> interrupt-controller;
> #interrupt-cells = <2>;
> };
>
>
> ... or is there some underlying reason for having the two-layer
> approach that isn't obvious from this device tree?
>
>
> -Olof
The synopsys gpio ip can have 1, 2, or 3 gpio ports of varying widths
per IP block. The simpler bindings assume one gpio port per IP block.
Alan Tull
aka
delicious quinoa
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