On Nov 15, 2007 7:16 AM, Bryan J. Smith <[EMAIL PROTECTED]> wrote:

> Hence why I wrote a brief blog article here:
> 'What is x86-64? "Long Mode" memory model ...'
> http://thebs413.blogspot.com/2005/10/what-is-x86-64-long-mode-memory-model.html

One thing to correct, otherwise it looks fine:
'"Long Mode" also offers a 48-bit (256TiB) "Flat" address model by
using the 16-bit segment register as bits 32-47 to the 32-bit offset
register of bits 0-31. This is the new "memory model" that programs
and libraries may use.'

No, segment registers are large ignored in long mode! What happens is
that you have 64-bit registers RAX, RBX, RCX etc., and using those you
can address 48-bits (bits 48-63 are not used). In fact there is a 2^47
byte sized positive user address space from 0 to 2^47-1 and a 2^47
sized negative kernel address space from 2^64-2^47 to 2^64-1.

As for segment registers, only fs and gs are used, and each have a
64-bit base address associated to them; the bits of fs and gs
themselves are independent of bits 32-47 of the final address.

> In a nutshell, 48-bit (PAE 52-bit) addressed "Long Mode" is focused
> on being 32-bit (PAE 36-bit) i486 TLB (i686 PAE) compatible.  But
> there is no reason why it can't support i386 Virtual86 modes either.
> The patch allows Virtual86 programs to run on a "Long Mode" kernel
> just as fast as they do on i486 or i686 PAE kernels.

Long mode does not support running i386 Virtual86 modes. That's how
the chip works.
In fact the chip has three modes:

real          legacy       long

legacy (what we used to simply call "protected mode") has three
submodes: 16-bit protected, 32-bit protected, and Virtual86

long also has three submodes: 16-bit protected, 32-bit protected, and
64-bit protected:  note that V86 is missing!

It is easy to switch between submodes, but harder to switch between
modes; interrupt handling in particular is different.
So the referenced kernel patch needs to shut off long mode, disable
paging, enter legacy mode, re-enable paging, and then enter virtual-86
mode. Everytime an interrupt comes in, it needs to do the reverse --
nothing goes as easy as automatically resetting a flag as with a
legacy mode (32-bit) kernel. Indeed the similarities between 52-bit
and 36-bit PAE make it possible to not having to convert page tables
though.

Hope that clarifies some bits,
Bart
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