Kumar Gala wrote:
On Oct 22, 2008, at 7:59 AM, Régis Odeyé wrote:
of ram. So I need 4GB+IOs (~1GB) of physical addressing space.
My plan is to put a part of this ram above of 4GB to keep accesses to
the IOs below the 4GB limit. It means non-contiguous ram addressing
and XAEN features to be working.
So we have XAEN support in the tree.. however non-contiguous is
something you'll have to work on yourself. Patches are welcome for this
So to confirm, XAEN support through Becky's patches does
support the MPC8641D/e600 cores?
Where can I glance through Becky patches ?
This is the bulk:
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=4ee7084eb11e00eb02dc8435fd18273a61ffa9bf
I'd also be interested in any work done to enable
non-contiguous memory areas. Reading the docs for the MPC8641D
though I am not sure you can set up LAWs for it?
One thing I wanted to try was installing 4GB in a system and
"overlapping" IO (since there is very little of it on a stock
MPC8641DHPCN) in the top ~256MB-512MB, but I am fairly sure
this is NOT supported because of the way the LAWs work, and
also the alignment of the LAWs means it is not fine enough
granularity to map between 2GB and 4GB into a window (you can
have 2GB or 4GB but not some more arbitrary value?)
--
Matt Sealey <[EMAIL PROTECTED]>
Genesi, Manager, Developer Relations
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