Hmm. Microprocessor Reports has released some interesting tidbits about the
new Williamette processor which will probably be the Pentium-4... This is
the chip Intel recently demonstrated running at 1.5GHz.
<begin quote>
Willamette will be packaged in flip-chip PGA (FC PGA) and was
designed for a socket of between 400 and 500 pins, which Intel
referred to as Socket-W. The unnamed Willamette bus is a source-
synchronous 64-bit 100MHz bus that is quad-pumped to an
equivalent of 400MHz per bit, delivering a total of 3.2GB/s of
bandwidth--three times the bandwidth of the fastest Pentium III
bus. The chip set for Willamette, code-named Tehama, will be a
dual-RAC (RDRAM) design.
A unique and unexpected aspect of Willamette's microarchitecture
is its "double-pumped" ALUs. Claiming the effective performance
of four ALUs, the two physical ALUs are each capable of executing
an operation in every half-clock cycle. The anticipated
improvements to SSE, called SSE2, were introduced in Willamette,
including support for (dual) double-precision SIMD floating-point
operations.
<end quote>
so, its more than just a 1GHz+ P-III design, they've done some significant
architectural internal things.
And, that double SIMD FPU thing otta rock for LL tests, eh? :D
-jrp
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