Akos Vandra wrote: > As you probably have more experience and insight, would it be > desireable to put this script into the reset init handler? > I have modified the lpc1768.cfg so that the flash's clock speed is > updated to 100MHz, and added the code needed to initialize the PLL to > 100MHz. So in case of programming the device we can use clock speeds > up to 16 666Khz, which - based on the new mpsse driver - can achieve > write speeds of 75-100KB/s, and read speeds around 400K!
That's good performance. Thanks for looking into this. I would very much like your work to apply not only to lpc1768 but to all compatible 17xx chips. I expect that it may work for at least lpc176x but possibly also for lpc175x and others. I guess that not all chips in these families have the same maximum flash clock speed, so I think the good way to add these settings would be to have generic lpc17xx functions which take a flash clock speed parameter, and these are then called from each target configuration file. This makes sure that the implementation of this feature exists in only one place instead of code being duplicated for every target, which is really unneccessary. > I'll have to look into how to use gerrit, and I would post the patch, > if you aggree it is. See the file HACKING in the source tree, and feel free to ask questions. > You can see my script below. Please clean up the coding style and create that common helper function, before submitting. The source code should be consistent. > I'm sure someone with more experience can change the "sleep 50" > instructions to really poll the register for the ready bit, but > this works fine as it is, and 50ms is not that much Having 50ms delay is no problem, but what is more important is to ensure that the pending transactions have actually been executed before starting that delay. How will this work in the ftdi driver, Andreas? Are memory operations flushed immediately? > mdw 0x400FC088; #For debugging purposes So is this neccessary? Maybe not. > mww 0x400FC1C8 0x00000000; # /* Clock Output Configuration */ > mww 0x400FC000 0x0000503A; # /* flash accelerator to safe mode > <-- is this really needed */ Please investigate if this is really needed or not, before submitting the cleaned up code to gerrit. > echo "Done initializing PLL" Thanks again for working on this! Clean it up and I think it's great. //Peter ------------------------------------------------------------------------------ Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
