On Mon, May 28, 2012 at 6:42 AM, Alexander Osipenko <[email protected]> wrote:
> Hi Xiaofan,
>
> Notice to switch of JLink power to check operation of vanilla / patched
> version.
> JLink remembers last selected interface (at least untill switched off),
Ah, that is why the vanilla un-patched version works for me. Once
I follow your advice to switch off the power between tests, the
vanilla git version no longer works but the patched version works.
mymacmini:lpc2148 xiaofanc$ openocd -f openocd.cfg
Open On-Chip Debugger 0.6.0-dev-00595-g445a54a (2012-05-25-20:38)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.sourceforge.net/doc/doxygen/bugs.html
Warn : Adapter driver 'jlink' did not declare which transports it
allows; assuming legacy JTAG-only
Info : only one transport option; autoselect 'jtag'
Warning - assuming default core clock 12MHz! Flashing may fail if
actual core clock is different.
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain
adapter_nsrst_delay: 100
jtag_ntrst_delay: 100
1500 kHz
[timestamp] [threadID] facility level [function call] <message>
--------------------------------------------------------------------------------
[ 0.000000] [00000407] libusbx: warning
[darwin_cache_device_descriptor] could not retrieve device descriptor
05ac:8281: device not responding. skipping device
Info : J-Link initialization started / target CPU reset initiated
Info : J-Link ARM V8 compiled May 24 2012 11:19:27
Info : J-Link caps 0xb9ff7bbf
Info : J-Link hw version 80000
Info : J-Link hw type J-Link
Info : J-Link max mem block 9328
Info : J-Link configuration
Info : USB-Address: 0x0
Info : Kickstart power on JTAG-pin 19: 0xffffff01
Info : Vref = 3.287 TCK = 0 TDI = 1 TDO = 0 TMS = 1 SRST = 0 TRST = 1
Info : J-Link JTAG Interface ready
Info : clock speed 1500 kHz
Error: JTAG scan chain interrogation failed: all zeroes
Error: Check JTAG interface, timings, target power, etc.
Error: Trying to use configured scan chain anyway...
Error: lpc2148.cpu: IR capture error; saw 0x00 not 0x01
Warn : Bypassing JTAG setup events due to errors
Info : Embedded ICE version 0
Error: unknown EmbeddedICE version (comms ctrl: 0x00000000)
Info : lpc2148.cpu: hardware has 2 breakpoint/watchpoint units
fast memory access is enabled
dcc downloads are enabled
Error: JTAG scan chain interrogation failed: all zeroes
Error: Check JTAG interface, timings, target power, etc.
Error: Trying to use configured scan chain anyway...
Error: lpc2148.cpu: IR capture error; saw 0x00 not 0x01
Warn : Bypassing JTAG setup events due to errors
Error: timed out while waiting for target halted
TARGET: lpc2148.cpu - Not halted
Runtime Error: openocd.cfg:7:
in procedure 'script'
at file "embedded:startup.tcl", line 58
in procedure 'reset' called at file "openocd.cfg", line 7
mymacmini:lpc2148 xiaofanc$ ~/binj/bin/openocd -f openocd.cfg
Open On-Chip Debugger 0.6.0-dev-00593-gdd14d84 (2012-05-25-21:10)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.sourceforge.net/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
Warning - assuming default core clock 12MHz! Flashing may fail if
actual core clock is different.
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain
adapter_nsrst_delay: 100
jtag_ntrst_delay: 100
1500 kHz
[timestamp] [threadID] facility level [function call] <message>
--------------------------------------------------------------------------------
[ 0.000000] [00000407] libusbx: warning
[darwin_cache_device_descriptor] could not retrieve device descriptor
05ac:8281: device not responding. skipping device
Info : J-Link initialization started / target CPU reset initiated
Info : J-Link ARM V8 compiled May 24 2012 11:19:27
Info : J-Link caps 0xb9ff7bbf
Info : J-Link hw version 80000
Info : J-Link hw type J-Link
Info : J-Link max mem block 9328
Info : J-Link configuration
Info : USB-Address: 0x0
Info : Kickstart power on JTAG-pin 19: 0xffffff01
Info : Vref = 3.293 TCK = 0 TDI = 1 TDO = 0 TMS = 1 SRST = 0 TRST = 1
Info : J-Link JTAG Interface ready
Info : clock speed 1500 kHz
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787,
part: 0xf1f0, ver: 0x4)
Info : Embedded ICE version 4
Info : lpc2148.cpu: hardware has 2 breakpoint/watchpoint units
fast memory access is enabled
dcc downloads are enabled
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787,
part: 0xf1f0, ver: 0x4)
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
1500 kHz
flash 'lpc2000' found at 0x00000000
erased sectors 0 through 26 on flash bank 0 in 0.476376s
Warn : Verification will fail since checksum in image (0xe1a00000) to
be written to flash is different from calculated vector checksum
(0xb9205f84).
Warn : To remove this warning modify build tools on developer PC to
inject correct LPC vector checksum.
wrote 8634 bytes from file lpcusbisoc.hex in 0.676193s (12.469 KiB/s)
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787,
part: 0xf1f0, ver: 0x4)
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x8000005f pc: 0x000008b0
dumped 262144 bytes in 5.512240s (46.442 KiB/s)
verified 262144 bytes in 0.431565s (593.190 KiB/s)
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787,
part: 0xf1f0, ver: 0x4)
shutdown command invoked
> The most interesting right now is patch operation with V7.
> Taking special care of V7 may introduce a bugs in future, when someone
> decide to implement SWD.
> Such specific should be avoided whenever possible.
>
> I wil split the patch into two parts: basic V8 and special care of V7
> so we can decide to merge any of them.
>
But I can no longer reproduce issues with V7. Your patched version
works just like the vanilla git version.
mymacmini:lpc2148 xiaofanc$ ~/binj/bin/openocd -f openocd.cfg
Open On-Chip Debugger 0.6.0-dev-00593-gdd14d84 (2012-05-25-21:10)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.sourceforge.net/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
Warning - assuming default core clock 12MHz! Flashing may fail if
actual core clock is different.
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain
adapter_nsrst_delay: 100
jtag_ntrst_delay: 100
1500 kHz
[timestamp] [threadID] facility level [function call] <message>
--------------------------------------------------------------------------------
[ 0.000000] [00000407] libusbx: warning
[darwin_cache_device_descriptor] could not retrieve device descriptor
05ac:8281: device not responding. skipping device
Info : J-Link initialization started / target CPU reset initiated
Info : J-Link ARM V7 compiled Feb 15 2011 11:03:33
Info : J-Link caps 0xb9ff7bbf
Info : J-Link hw version 70000
Info : J-Link hw type J-Link
Info : J-Link max mem block 9000
Info : J-Link configuration
Info : USB-Address: 0x0
Info : Kickstart power on JTAG-pin 19: 0xffffffff
Info : Vref = 3.267 TCK = 1 TDI = 0 TDO = 0 TMS = 0 SRST = 0 TRST = 0
Info : J-Link JTAG Interface ready
Info : clock speed 1500 kHz
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787,
part: 0xf1f0, ver: 0x4)
Info : Embedded ICE version 4
Info : lpc2148.cpu: hardware has 2 breakpoint/watchpoint units
fast memory access is enabled
dcc downloads are enabled
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787,
part: 0xf1f0, ver: 0x4)
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
1500 kHz
flash 'lpc2000' found at 0x00000000
erased sectors 0 through 26 on flash bank 0 in 0.452149s
Warn : Verification will fail since checksum in image (0xe1a00000) to
be written to flash is different from calculated vector checksum
(0xb9205f84).
Warn : To remove this warning modify build tools on developer PC to
inject correct LPC vector checksum.
wrote 8634 bytes from file lpcusbisoc.hex in 0.384327s (21.939 KiB/s)
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787,
part: 0xf1f0, ver: 0x4)
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x8000005f pc: 0x000008c0
dumped 262144 bytes in 5.816298s (44.014 KiB/s)
verified 262144 bytes in 0.426771s (599.853 KiB/s)
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787,
part: 0xf1f0, ver: 0x4)
shutdown command invoked
mymacmini:lpc2148 xiaofanc$ openocd -f openocd.cfg
Open On-Chip Debugger 0.6.0-dev-00595-g445a54a (2012-05-25-20:38)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.sourceforge.net/doc/doxygen/bugs.html
Warn : Adapter driver 'jlink' did not declare which transports it
allows; assuming legacy JTAG-only
Info : only one transport option; autoselect 'jtag'
Warning - assuming default core clock 12MHz! Flashing may fail if
actual core clock is different.
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain
adapter_nsrst_delay: 100
jtag_ntrst_delay: 100
1500 kHz
[timestamp] [threadID] facility level [function call] <message>
--------------------------------------------------------------------------------
[ 0.000000] [00000407] libusbx: warning
[darwin_cache_device_descriptor] could not retrieve device descriptor
05ac:8281: device not responding. skipping device
Info : J-Link initialization started / target CPU reset initiated
Info : J-Link ARM V7 compiled Feb 15 2011 11:03:33
Info : J-Link caps 0xb9ff7bbf
Info : J-Link hw version 70000
Info : J-Link hw type J-Link
Info : J-Link max mem block 9000
Info : J-Link configuration
Info : USB-Address: 0x0
Info : Kickstart power on JTAG-pin 19: 0xffffffff
Info : Vref = 3.267 TCK = 1 TDI = 0 TDO = 0 TMS = 0 SRST = 0 TRST = 0
Info : J-Link JTAG Interface ready
Info : clock speed 1500 kHz
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787,
part: 0xf1f0, ver: 0x4)
Info : Embedded ICE version 4
Info : lpc2148.cpu: hardware has 2 breakpoint/watchpoint units
fast memory access is enabled
dcc downloads are enabled
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787,
part: 0xf1f0, ver: 0x4)
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
1500 kHz
flash 'lpc2000' found at 0x00000000
erased sectors 0 through 26 on flash bank 0 in 0.451557s
Warn : Verification will fail since checksum in image (0xe1a00000) to
be written to flash is different from calculated vector checksum
(0xb9205f84).
Warn : To remove this warning modify build tools on developer PC to
inject correct LPC vector checksum.
wrote 8634 bytes from file lpcusbisoc.hex in 0.395455s (21.321 KiB/s)
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787,
part: 0xf1f0, ver: 0x4)
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x8000005f pc: 0x000008ac
dumped 262144 bytes in 5.780316s (44.288 KiB/s)
verified 262144 bytes in 0.425082s (602.237 KiB/s)
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787,
part: 0xf1f0, ver: 0x4)
shutdown command invoked
--
Xiaofan
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