Re: [PATCH 4/5] arm64: dts: Add ipq8074 SoC and MTP board support

2017-05-08 Thread Varadarajan Narayanan



On 4/29/2017 12:28 AM, Jonathan Neuschäfer wrote:

Hi,

On Fri, Apr 28, 2017 at 03:26:42PM +0530, Varadarajan Narayanan wrote:

Subject: [PATCH 4/5] arm64: dts: Add ipq8074 SoC and MTP board support


s/MTP/HK01/ ?


Have posted v2 with MTP changed as HK01. Please refer to
https://www.spinics.net/lists/arm-kernel/msg579470.html.

Thanks
Varada




Add initial device tree support for the Qualcomm IPQ8074 SoC and
HK01 evaluation board.

Signed-off-by: Manoharan Vijaya Raghavan <mragh...@codeaurora.org>
Signed-off-by: Abhishek Sahu <abs...@codeaurora.org>
Signed-off-by: Varadarajan Narayanan <var...@codeaurora.org>
---
  arch/arm64/boot/dts/qcom/Makefile |   1 +
  arch/arm64/boot/dts/qcom/ipq8074-hk01.dts |  48 ++
  arch/arm64/boot/dts/qcom/ipq8074.dtsi | 153 ++
  3 files changed, 202 insertions(+)
  create mode 100644 arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
  create mode 100644 arch/arm64/boot/dts/qcom/ipq8074.dtsi

diff --git a/arch/arm64/boot/dts/qcom/Makefile 
b/arch/arm64/boot/dts/qcom/Makefile
index cc0f02d..7c6963e 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb
  dtb-$(CONFIG_ARCH_QCOM)   += msm8992-bullhead-rev-101.dtb
  dtb-$(CONFIG_ARCH_QCOM)   += msm8994-angler-rev-101.dtb
  dtb-$(CONFIG_ARCH_QCOM)   += msm8996-mtp.dtb
+dtb-$(CONFIG_ARCH_QCOM)+= ipq8074-hk01.dtb


Maybe this list should be alphabetically sorted ('i' before 'm').
(I have no strong preference)


Thanks,
Jonathan Neuschäfer



--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora 
Forum, a Linux Foundation Collaborative Project


Re: [PATCH 4/5] arm64: dts: Add ipq8074 SoC and MTP board support

2017-05-08 Thread Varadarajan Narayanan



On 4/29/2017 12:28 AM, Jonathan Neuschäfer wrote:

Hi,

On Fri, Apr 28, 2017 at 03:26:42PM +0530, Varadarajan Narayanan wrote:

Subject: [PATCH 4/5] arm64: dts: Add ipq8074 SoC and MTP board support


s/MTP/HK01/ ?


Have posted v2 with MTP changed as HK01. Please refer to
https://www.spinics.net/lists/arm-kernel/msg579470.html.

Thanks
Varada




Add initial device tree support for the Qualcomm IPQ8074 SoC and
HK01 evaluation board.

Signed-off-by: Manoharan Vijaya Raghavan 
Signed-off-by: Abhishek Sahu 
Signed-off-by: Varadarajan Narayanan 
---
  arch/arm64/boot/dts/qcom/Makefile |   1 +
  arch/arm64/boot/dts/qcom/ipq8074-hk01.dts |  48 ++
  arch/arm64/boot/dts/qcom/ipq8074.dtsi | 153 ++
  3 files changed, 202 insertions(+)
  create mode 100644 arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
  create mode 100644 arch/arm64/boot/dts/qcom/ipq8074.dtsi

diff --git a/arch/arm64/boot/dts/qcom/Makefile 
b/arch/arm64/boot/dts/qcom/Makefile
index cc0f02d..7c6963e 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb
  dtb-$(CONFIG_ARCH_QCOM)   += msm8992-bullhead-rev-101.dtb
  dtb-$(CONFIG_ARCH_QCOM)   += msm8994-angler-rev-101.dtb
  dtb-$(CONFIG_ARCH_QCOM)   += msm8996-mtp.dtb
+dtb-$(CONFIG_ARCH_QCOM)+= ipq8074-hk01.dtb


Maybe this list should be alphabetically sorted ('i' before 'm').
(I have no strong preference)


Thanks,
Jonathan Neuschäfer



--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora 
Forum, a Linux Foundation Collaborative Project


Re: [PATCH 4/5] arm64: dts: Add ipq8074 SoC and MTP board support

2017-05-03 Thread Varadarajan Narayanan



On 4/29/2017 12:23 AM, Stephen Boyd wrote:

On 04/28, Varadarajan Narayanan wrote:

diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts 
b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
new file mode 100644
index 000..c150bea
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
@@ -0,0 +1,48 @@
+/dts-v1/;
+/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include "ipq8074.dtsi"
+
+/ {
+   #address-cells = <0x2>;
+   #size-cells = <0x2>;
+   model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
+   compatible = "qcom,ipq8074-hk01", "qcom,ipq8074";
+   interrupt-parent = <>;
+
+   chosen {
+   bootargs = "console=ttyMSM0,115200,n8 root=/dev/ram0 rw 
init=/init";


Add an aliases node for serial0 and use a chosen node with stdout-path = 
"serial0" instead please.


Ok




+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x0 0x4000 0x0 0x2000>;
+   };
+
+   soc: soc {


Do you need the soc label here? Please remove.


Ok




+   pinctrl@100 {
+   serial_4_pins: serial4_pinmux {
+   mux {
+   pins = "gpio23", "gpio24";
+   function = "blsp4_uart1";
+   bias-disable;
+   };
+   };
+   };
+
+   serial@78b3000 {
+   pinctrl-0 = <_4_pins>;
+   pinctrl-names = "default";
+   status = "ok";
+   };
+   };
+};
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi 
b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
new file mode 100644
index 000..f910cc0
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -0,0 +1,153 @@
+/*
+ * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+
+/ {
+   model = "Qualcomm Technologies, Inc. IPQ8074";
+   compatible = "qcom,ipq8074";
+
+   soc: soc {
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+   ranges = <0 0 0 0x>;
+   compatible = "simple-bus";
+
+   pinctrl@100 {
+   compatible = "qcom,ipq8074-pinctrl";
+   reg = <0x100 0x30>;
+   interrupts = ;
+   gpio-controller;
+   #gpio-cells = <0x2>;
+   interrupt-controller;
+   #interrupt-cells = <0x2>;
+   };
+
+   intc: interrupt-controller@b00 {
+   compatible = "qcom,msm-qgic2";
+   interrupt-controller;
+   #interrupt-cells = <0x3>;
+   reg = <0xb00 0x1000>,
+   <0xb002000 0x1000>;


Please align this up with previous reg property.


Ok




+   };
+
+   timer {
+   compatible = "arm,armv8-timer";
+   interrupts = ,
+,
+,
+;
+   };


Is there an mmio timer as well? We should add it too.


Ok




+
+   gcc: gcc@180 {
+   compatible = "qcom,gcc-ipq8074";
+   reg = <0x180 0x8>;


Wow that is a huge area! Is it really that large?


Yes, per the memory map this region is 512K.




+   #clock-cells = <0x1>;
+   #reset-cells = <0x1>;
+   };
+
+   serial@78b3000 {
+   compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+   reg = <0x78b3000 0x200>;
+   interrupts = ;
+   clocks = < GCC_BLSP1_UART5_APPS_CLK>,
+< GCC_BLSP1_AHB_CLK>;
+   

Re: [PATCH 4/5] arm64: dts: Add ipq8074 SoC and MTP board support

2017-05-03 Thread Varadarajan Narayanan



On 4/29/2017 12:23 AM, Stephen Boyd wrote:

On 04/28, Varadarajan Narayanan wrote:

diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts 
b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
new file mode 100644
index 000..c150bea
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
@@ -0,0 +1,48 @@
+/dts-v1/;
+/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include "ipq8074.dtsi"
+
+/ {
+   #address-cells = <0x2>;
+   #size-cells = <0x2>;
+   model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
+   compatible = "qcom,ipq8074-hk01", "qcom,ipq8074";
+   interrupt-parent = <>;
+
+   chosen {
+   bootargs = "console=ttyMSM0,115200,n8 root=/dev/ram0 rw 
init=/init";


Add an aliases node for serial0 and use a chosen node with stdout-path = 
"serial0" instead please.


Ok




+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x0 0x4000 0x0 0x2000>;
+   };
+
+   soc: soc {


Do you need the soc label here? Please remove.


Ok




+   pinctrl@100 {
+   serial_4_pins: serial4_pinmux {
+   mux {
+   pins = "gpio23", "gpio24";
+   function = "blsp4_uart1";
+   bias-disable;
+   };
+   };
+   };
+
+   serial@78b3000 {
+   pinctrl-0 = <_4_pins>;
+   pinctrl-names = "default";
+   status = "ok";
+   };
+   };
+};
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi 
b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
new file mode 100644
index 000..f910cc0
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -0,0 +1,153 @@
+/*
+ * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+
+/ {
+   model = "Qualcomm Technologies, Inc. IPQ8074";
+   compatible = "qcom,ipq8074";
+
+   soc: soc {
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+   ranges = <0 0 0 0x>;
+   compatible = "simple-bus";
+
+   pinctrl@100 {
+   compatible = "qcom,ipq8074-pinctrl";
+   reg = <0x100 0x30>;
+   interrupts = ;
+   gpio-controller;
+   #gpio-cells = <0x2>;
+   interrupt-controller;
+   #interrupt-cells = <0x2>;
+   };
+
+   intc: interrupt-controller@b00 {
+   compatible = "qcom,msm-qgic2";
+   interrupt-controller;
+   #interrupt-cells = <0x3>;
+   reg = <0xb00 0x1000>,
+   <0xb002000 0x1000>;


Please align this up with previous reg property.


Ok




+   };
+
+   timer {
+   compatible = "arm,armv8-timer";
+   interrupts = ,
+,
+,
+;
+   };


Is there an mmio timer as well? We should add it too.


Ok




+
+   gcc: gcc@180 {
+   compatible = "qcom,gcc-ipq8074";
+   reg = <0x180 0x8>;


Wow that is a huge area! Is it really that large?


Yes, per the memory map this region is 512K.




+   #clock-cells = <0x1>;
+   #reset-cells = <0x1>;
+   };
+
+   serial@78b3000 {
+   compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+   reg = <0x78b3000 0x200>;
+   interrupts = ;
+   clocks = < GCC_BLSP1_UART5_APPS_CLK>,
+< GCC_BLSP1_AHB_CLK>;
+   

Re: [PATCH 4/5] arm64: dts: Add ipq8074 SoC and MTP board support

2017-04-28 Thread Jonathan Neuschäfer
Hi,

On Fri, Apr 28, 2017 at 03:26:42PM +0530, Varadarajan Narayanan wrote:
> Subject: [PATCH 4/5] arm64: dts: Add ipq8074 SoC and MTP board support

s/MTP/HK01/ ?

> Add initial device tree support for the Qualcomm IPQ8074 SoC and
> HK01 evaluation board.
> 
> Signed-off-by: Manoharan Vijaya Raghavan <mragh...@codeaurora.org>
> Signed-off-by: Abhishek Sahu <abs...@codeaurora.org>
> Signed-off-by: Varadarajan Narayanan <var...@codeaurora.org>
> ---
>  arch/arm64/boot/dts/qcom/Makefile |   1 +
>  arch/arm64/boot/dts/qcom/ipq8074-hk01.dts |  48 ++
>  arch/arm64/boot/dts/qcom/ipq8074.dtsi | 153 
> ++
>  3 files changed, 202 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
>  create mode 100644 arch/arm64/boot/dts/qcom/ipq8074.dtsi
> 
> diff --git a/arch/arm64/boot/dts/qcom/Makefile 
> b/arch/arm64/boot/dts/qcom/Makefile
> index cc0f02d..7c6963e 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_QCOM)   += msm8916-mtp.dtb
>  dtb-$(CONFIG_ARCH_QCOM)  += msm8992-bullhead-rev-101.dtb
>  dtb-$(CONFIG_ARCH_QCOM)  += msm8994-angler-rev-101.dtb
>  dtb-$(CONFIG_ARCH_QCOM)  += msm8996-mtp.dtb
> +dtb-$(CONFIG_ARCH_QCOM)  += ipq8074-hk01.dtb

Maybe this list should be alphabetically sorted ('i' before 'm').
(I have no strong preference)


Thanks,
Jonathan Neuschäfer


signature.asc
Description: PGP signature


Re: [PATCH 4/5] arm64: dts: Add ipq8074 SoC and MTP board support

2017-04-28 Thread Jonathan Neuschäfer
Hi,

On Fri, Apr 28, 2017 at 03:26:42PM +0530, Varadarajan Narayanan wrote:
> Subject: [PATCH 4/5] arm64: dts: Add ipq8074 SoC and MTP board support

s/MTP/HK01/ ?

> Add initial device tree support for the Qualcomm IPQ8074 SoC and
> HK01 evaluation board.
> 
> Signed-off-by: Manoharan Vijaya Raghavan 
> Signed-off-by: Abhishek Sahu 
> Signed-off-by: Varadarajan Narayanan 
> ---
>  arch/arm64/boot/dts/qcom/Makefile |   1 +
>  arch/arm64/boot/dts/qcom/ipq8074-hk01.dts |  48 ++
>  arch/arm64/boot/dts/qcom/ipq8074.dtsi | 153 
> ++
>  3 files changed, 202 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
>  create mode 100644 arch/arm64/boot/dts/qcom/ipq8074.dtsi
> 
> diff --git a/arch/arm64/boot/dts/qcom/Makefile 
> b/arch/arm64/boot/dts/qcom/Makefile
> index cc0f02d..7c6963e 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_QCOM)   += msm8916-mtp.dtb
>  dtb-$(CONFIG_ARCH_QCOM)  += msm8992-bullhead-rev-101.dtb
>  dtb-$(CONFIG_ARCH_QCOM)  += msm8994-angler-rev-101.dtb
>  dtb-$(CONFIG_ARCH_QCOM)  += msm8996-mtp.dtb
> +dtb-$(CONFIG_ARCH_QCOM)  += ipq8074-hk01.dtb

Maybe this list should be alphabetically sorted ('i' before 'm').
(I have no strong preference)


Thanks,
Jonathan Neuschäfer


signature.asc
Description: PGP signature


Re: [PATCH 4/5] arm64: dts: Add ipq8074 SoC and MTP board support

2017-04-28 Thread Stephen Boyd
On 04/28, Varadarajan Narayanan wrote:
> diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts 
> b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
> new file mode 100644
> index 000..c150bea
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
> @@ -0,0 +1,48 @@
> +/dts-v1/;
> +/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +#include "ipq8074.dtsi"
> +
> +/ {
> + #address-cells = <0x2>;
> + #size-cells = <0x2>;
> + model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
> + compatible = "qcom,ipq8074-hk01", "qcom,ipq8074";
> + interrupt-parent = <>;
> +
> + chosen {
> + bootargs = "console=ttyMSM0,115200,n8 root=/dev/ram0 rw 
> init=/init";

Add an aliases node for serial0 and use a chosen node with stdout-path = 
"serial0" instead please.

> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x0 0x4000 0x0 0x2000>;
> + };
> +
> + soc: soc {

Do you need the soc label here? Please remove.

> + pinctrl@100 {
> + serial_4_pins: serial4_pinmux {
> + mux {
> + pins = "gpio23", "gpio24";
> + function = "blsp4_uart1";
> + bias-disable;
> + };
> + };
> + };
> +
> + serial@78b3000 {
> + pinctrl-0 = <_4_pins>;
> + pinctrl-names = "default";
> + status = "ok";
> + };
> + };
> +};
> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi 
> b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> new file mode 100644
> index 000..f910cc0
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> @@ -0,0 +1,153 @@
> +/*
> + * Copyright (c) 2017, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include 
> +#include 
> +
> +/ {
> + model = "Qualcomm Technologies, Inc. IPQ8074";
> + compatible = "qcom,ipq8074";
> +
> + soc: soc {
> + #address-cells = <0x1>;
> + #size-cells = <0x1>;
> + ranges = <0 0 0 0x>;
> + compatible = "simple-bus";
> +
> + pinctrl@100 {
> + compatible = "qcom,ipq8074-pinctrl";
> + reg = <0x100 0x30>;
> + interrupts = ;
> + gpio-controller;
> + #gpio-cells = <0x2>;
> + interrupt-controller;
> + #interrupt-cells = <0x2>;
> + };
> +
> + intc: interrupt-controller@b00 {
> + compatible = "qcom,msm-qgic2";
> + interrupt-controller;
> + #interrupt-cells = <0x3>;
> + reg = <0xb00 0x1000>,
> + <0xb002000 0x1000>;

Please align this up with previous reg property.

> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts =  IRQ_TYPE_LEVEL_LOW)>,
> +   IRQ_TYPE_LEVEL_LOW)>,
> +   IRQ_TYPE_LEVEL_LOW)>,
> +   IRQ_TYPE_LEVEL_LOW)>;
> + };

Is there an mmio timer as well? We should add it too.

> +
> + gcc: gcc@180 {
> + compatible = "qcom,gcc-ipq8074";
> + reg = <0x180 0x8>;

Wow that is a huge area! Is it really that large?

> + #clock-cells = <0x1>;
> + #reset-cells = <0x1>;
> + };
> +
> + serial@78b3000 {
> + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> + reg = <0x78b3000 0x200>;
> + interrupts = ;
> + clocks = < GCC_BLSP1_UART5_APPS_CLK>,
> +  

Re: [PATCH 4/5] arm64: dts: Add ipq8074 SoC and MTP board support

2017-04-28 Thread Stephen Boyd
On 04/28, Varadarajan Narayanan wrote:
> diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts 
> b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
> new file mode 100644
> index 000..c150bea
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
> @@ -0,0 +1,48 @@
> +/dts-v1/;
> +/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +#include "ipq8074.dtsi"
> +
> +/ {
> + #address-cells = <0x2>;
> + #size-cells = <0x2>;
> + model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
> + compatible = "qcom,ipq8074-hk01", "qcom,ipq8074";
> + interrupt-parent = <>;
> +
> + chosen {
> + bootargs = "console=ttyMSM0,115200,n8 root=/dev/ram0 rw 
> init=/init";

Add an aliases node for serial0 and use a chosen node with stdout-path = 
"serial0" instead please.

> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x0 0x4000 0x0 0x2000>;
> + };
> +
> + soc: soc {

Do you need the soc label here? Please remove.

> + pinctrl@100 {
> + serial_4_pins: serial4_pinmux {
> + mux {
> + pins = "gpio23", "gpio24";
> + function = "blsp4_uart1";
> + bias-disable;
> + };
> + };
> + };
> +
> + serial@78b3000 {
> + pinctrl-0 = <_4_pins>;
> + pinctrl-names = "default";
> + status = "ok";
> + };
> + };
> +};
> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi 
> b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> new file mode 100644
> index 000..f910cc0
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> @@ -0,0 +1,153 @@
> +/*
> + * Copyright (c) 2017, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include 
> +#include 
> +
> +/ {
> + model = "Qualcomm Technologies, Inc. IPQ8074";
> + compatible = "qcom,ipq8074";
> +
> + soc: soc {
> + #address-cells = <0x1>;
> + #size-cells = <0x1>;
> + ranges = <0 0 0 0x>;
> + compatible = "simple-bus";
> +
> + pinctrl@100 {
> + compatible = "qcom,ipq8074-pinctrl";
> + reg = <0x100 0x30>;
> + interrupts = ;
> + gpio-controller;
> + #gpio-cells = <0x2>;
> + interrupt-controller;
> + #interrupt-cells = <0x2>;
> + };
> +
> + intc: interrupt-controller@b00 {
> + compatible = "qcom,msm-qgic2";
> + interrupt-controller;
> + #interrupt-cells = <0x3>;
> + reg = <0xb00 0x1000>,
> + <0xb002000 0x1000>;

Please align this up with previous reg property.

> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts =  IRQ_TYPE_LEVEL_LOW)>,
> +   IRQ_TYPE_LEVEL_LOW)>,
> +   IRQ_TYPE_LEVEL_LOW)>,
> +   IRQ_TYPE_LEVEL_LOW)>;
> + };

Is there an mmio timer as well? We should add it too.

> +
> + gcc: gcc@180 {
> + compatible = "qcom,gcc-ipq8074";
> + reg = <0x180 0x8>;

Wow that is a huge area! Is it really that large?

> + #clock-cells = <0x1>;
> + #reset-cells = <0x1>;
> + };
> +
> + serial@78b3000 {
> + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> + reg = <0x78b3000 0x200>;
> + interrupts = ;
> + clocks = < GCC_BLSP1_UART5_APPS_CLK>,
> +  

[PATCH 4/5] arm64: dts: Add ipq8074 SoC and MTP board support

2017-04-28 Thread Varadarajan Narayanan
Add initial device tree support for the Qualcomm IPQ8074 SoC and
HK01 evaluation board.

Signed-off-by: Manoharan Vijaya Raghavan 
Signed-off-by: Abhishek Sahu 
Signed-off-by: Varadarajan Narayanan 
---
 arch/arm64/boot/dts/qcom/Makefile |   1 +
 arch/arm64/boot/dts/qcom/ipq8074-hk01.dts |  48 ++
 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 153 ++
 3 files changed, 202 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
 create mode 100644 arch/arm64/boot/dts/qcom/ipq8074.dtsi

diff --git a/arch/arm64/boot/dts/qcom/Makefile 
b/arch/arm64/boot/dts/qcom/Makefile
index cc0f02d..7c6963e 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb
 dtb-$(CONFIG_ARCH_QCOM)+= msm8992-bullhead-rev-101.dtb
 dtb-$(CONFIG_ARCH_QCOM)+= msm8994-angler-rev-101.dtb
 dtb-$(CONFIG_ARCH_QCOM)+= msm8996-mtp.dtb
+dtb-$(CONFIG_ARCH_QCOM)+= ipq8074-hk01.dtb
 
 always := $(dtb-y)
 subdir-y   := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts 
b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
new file mode 100644
index 000..c150bea
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
@@ -0,0 +1,48 @@
+/dts-v1/;
+/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include "ipq8074.dtsi"
+
+/ {
+   #address-cells = <0x2>;
+   #size-cells = <0x2>;
+   model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
+   compatible = "qcom,ipq8074-hk01", "qcom,ipq8074";
+   interrupt-parent = <>;
+
+   chosen {
+   bootargs = "console=ttyMSM0,115200,n8 root=/dev/ram0 rw 
init=/init";
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x0 0x4000 0x0 0x2000>;
+   };
+
+   soc: soc {
+   pinctrl@100 {
+   serial_4_pins: serial4_pinmux {
+   mux {
+   pins = "gpio23", "gpio24";
+   function = "blsp4_uart1";
+   bias-disable;
+   };
+   };
+   };
+
+   serial@78b3000 {
+   pinctrl-0 = <_4_pins>;
+   pinctrl-names = "default";
+   status = "ok";
+   };
+   };
+};
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi 
b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
new file mode 100644
index 000..f910cc0
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -0,0 +1,153 @@
+/*
+ * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+
+/ {
+   model = "Qualcomm Technologies, Inc. IPQ8074";
+   compatible = "qcom,ipq8074";
+
+   soc: soc {
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+   ranges = <0 0 0 0x>;
+   compatible = "simple-bus";
+
+   pinctrl@100 {
+   compatible = "qcom,ipq8074-pinctrl";
+   reg = <0x100 0x30>;
+   interrupts = ;
+   gpio-controller;
+   #gpio-cells = <0x2>;
+   interrupt-controller;
+   #interrupt-cells = <0x2>;
+   };
+
+   intc: interrupt-controller@b00 {
+   compatible = "qcom,msm-qgic2";
+   interrupt-controller;
+   #interrupt-cells = <0x3>;
+   reg = <0xb00 0x1000>,
+   <0xb002000 0x1000>;
+   };
+
+   timer {
+   compatible = "arm,armv8-timer";
+   interrupts = ,
+,
+  

[PATCH 4/5] arm64: dts: Add ipq8074 SoC and MTP board support

2017-04-28 Thread Varadarajan Narayanan
Add initial device tree support for the Qualcomm IPQ8074 SoC and
HK01 evaluation board.

Signed-off-by: Manoharan Vijaya Raghavan 
Signed-off-by: Abhishek Sahu 
Signed-off-by: Varadarajan Narayanan 
---
 arch/arm64/boot/dts/qcom/Makefile |   1 +
 arch/arm64/boot/dts/qcom/ipq8074-hk01.dts |  48 ++
 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 153 ++
 3 files changed, 202 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
 create mode 100644 arch/arm64/boot/dts/qcom/ipq8074.dtsi

diff --git a/arch/arm64/boot/dts/qcom/Makefile 
b/arch/arm64/boot/dts/qcom/Makefile
index cc0f02d..7c6963e 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb
 dtb-$(CONFIG_ARCH_QCOM)+= msm8992-bullhead-rev-101.dtb
 dtb-$(CONFIG_ARCH_QCOM)+= msm8994-angler-rev-101.dtb
 dtb-$(CONFIG_ARCH_QCOM)+= msm8996-mtp.dtb
+dtb-$(CONFIG_ARCH_QCOM)+= ipq8074-hk01.dtb
 
 always := $(dtb-y)
 subdir-y   := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts 
b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
new file mode 100644
index 000..c150bea
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
@@ -0,0 +1,48 @@
+/dts-v1/;
+/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include "ipq8074.dtsi"
+
+/ {
+   #address-cells = <0x2>;
+   #size-cells = <0x2>;
+   model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
+   compatible = "qcom,ipq8074-hk01", "qcom,ipq8074";
+   interrupt-parent = <>;
+
+   chosen {
+   bootargs = "console=ttyMSM0,115200,n8 root=/dev/ram0 rw 
init=/init";
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x0 0x4000 0x0 0x2000>;
+   };
+
+   soc: soc {
+   pinctrl@100 {
+   serial_4_pins: serial4_pinmux {
+   mux {
+   pins = "gpio23", "gpio24";
+   function = "blsp4_uart1";
+   bias-disable;
+   };
+   };
+   };
+
+   serial@78b3000 {
+   pinctrl-0 = <_4_pins>;
+   pinctrl-names = "default";
+   status = "ok";
+   };
+   };
+};
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi 
b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
new file mode 100644
index 000..f910cc0
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -0,0 +1,153 @@
+/*
+ * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+
+/ {
+   model = "Qualcomm Technologies, Inc. IPQ8074";
+   compatible = "qcom,ipq8074";
+
+   soc: soc {
+   #address-cells = <0x1>;
+   #size-cells = <0x1>;
+   ranges = <0 0 0 0x>;
+   compatible = "simple-bus";
+
+   pinctrl@100 {
+   compatible = "qcom,ipq8074-pinctrl";
+   reg = <0x100 0x30>;
+   interrupts = ;
+   gpio-controller;
+   #gpio-cells = <0x2>;
+   interrupt-controller;
+   #interrupt-cells = <0x2>;
+   };
+
+   intc: interrupt-controller@b00 {
+   compatible = "qcom,msm-qgic2";
+   interrupt-controller;
+   #interrupt-cells = <0x3>;
+   reg = <0xb00 0x1000>,
+   <0xb002000 0x1000>;
+   };
+
+   timer {
+   compatible = "arm,armv8-timer";
+   interrupts = ,
+,
+,
+;
+