[Mspgcc-users] (no subject)

2014-03-24 Thread Kees Schoenmakers
Hi All,

The test from my previous post file _has_ .global statements

.global lab1, lab2


intern1:mov #1,r15
   dec r14
   jz  lab1
   nop
   jmp lab2

intern2:dec r15
   jnz intern2
   ret

lab1:   mov #2,r14
  callintern1
  callintern2
  ret

lab2:   mov #3,r13
  ret
 .end

sorry, Kees

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[Mspgcc-users] (no subject)

2013-10-25 Thread Ralph Hawks
Hi sign me up
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[Mspgcc-users] (no subject)

2013-03-01 Thread Andy Turk
I'm working with a program that works fine with CCS and consumes about 45K
of rom and 8K of ram. Linking it with mspgcc produces errors:

/usr/local/msp430/lib/gcc/msp430/4.7.0/../../../../msp430/bin/ld:
build/test.elf section `.rodata' will not fit in region `rom'
/usr/local/msp430/lib/gcc/msp430/4.7.0/../../../../msp430/bin/ld: section
.vectors loaded at [ff80,] overlaps section
.rodata loaded at [e860,ff80]
/usr/local/msp430/lib/gcc/msp430/4.7.0/../../../../msp430/bin/ld: section
.data loaded at [ff82,0001024c] overlaps section
.vectors loaded at [ff80,]
/usr/local/msp430/lib/gcc/msp430/4.7.0/../../../../msp430/bin/ld: section
.far.text loaded at [0001,00010287] overlaps section
.data loaded at [ff82,0001024c]
/usr/local/msp430/lib/gcc/msp430/4.7.0/../../../../msp430/bin/ld: region
`rom' overflowed by 717 bytes
collect2: error: ld returned 1 exit status
make: *** [build/test.elf] Error 1
make: Target `default' not remade because of errors.

It makes sense that the interrupt vectors (.vectors) will be loaded into
0xff80-0x, but why would .rodata overlap that by exactly one byte (at
0xff80)?

And why is .data being put at 0xff82 where it'll stomp on the vector table?

I don't believe there are any relocation attributes in the source, so this
is most likely the default compiler/linker behavior.

All the source is compiled with the same set of switches. Here's an example:

/usr/local/msp430/bin/msp430-gcc -I/usr/local/msp430/include -std=c99 -Wall
-Os -g -mmcu=msp430f5528 -mmemory-model=large -ffunction-sections
-fdata-sections -DMSPGCC -Ibuild  -c main.c -o build/obj/main.o

The linker is invoked like this:

/usr/local/msp430/bin/msp430-gcc -mmcu=msp430f5528 -mmemory-model=large
-Wl,-gc-sections … many .o files … -o build/test.elf
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Re: [Mspgcc-users] (no subject)

2013-03-01 Thread Peter Bigot
Apparently there is material that must go into .rodata and .data (low
memory) that exceeds the available space, causing it to overflow into
.vectors.  See other message earlier this week for suggestions of how to
diagnose where things might be going wrong and how to rearrange things to
fit.

Peter

On Fri, Mar 1, 2013 at 12:21 PM, Andy Turk andyt...@gmail.com wrote:

 I'm working with a program that works fine with CCS and consumes about 45K
 of rom and 8K of ram. Linking it with mspgcc produces errors:

 /usr/local/msp430/lib/gcc/msp430/4.7.0/../../../../msp430/bin/ld:
 build/test.elf section `.rodata' will not fit in region `rom'
 /usr/local/msp430/lib/gcc/msp430/4.7.0/../../../../msp430/bin/ld: section
 .vectors loaded at [ff80,] overlaps section
 .rodata loaded at [e860,ff80]
 /usr/local/msp430/lib/gcc/msp430/4.7.0/../../../../msp430/bin/ld: section
 .data loaded at [ff82,0001024c] overlaps section
 .vectors loaded at [ff80,]
 /usr/local/msp430/lib/gcc/msp430/4.7.0/../../../../msp430/bin/ld: section
 .far.text loaded at [0001,00010287] overlaps section
 .data loaded at [ff82,0001024c]
 /usr/local/msp430/lib/gcc/msp430/4.7.0/../../../../msp430/bin/ld: region
 `rom' overflowed by 717 bytes
 collect2: error: ld returned 1 exit status
 make: *** [build/test.elf] Error 1
 make: Target `default' not remade because of errors.

 It makes sense that the interrupt vectors (.vectors) will be loaded into
 0xff80-0x, but why would .rodata overlap that by exactly one byte (at
 0xff80)?

 And why is .data being put at 0xff82 where it'll stomp on the vector table?

 I don't believe there are any relocation attributes in the source, so this
 is most likely the default compiler/linker behavior.

 All the source is compiled with the same set of switches. Here's an
 example:

 /usr/local/msp430/bin/msp430-gcc -I/usr/local/msp430/include -std=c99 -Wall
 -Os -g -mmcu=msp430f5528 -mmemory-model=large -ffunction-sections
 -fdata-sections -DMSPGCC -Ibuild  -c main.c -o build/obj/main.o

 The linker is invoked like this:

 /usr/local/msp430/bin/msp430-gcc -mmcu=msp430f5528 -mmemory-model=large
 -Wl,-gc-sections … many .o files … -o build/test.elf


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[Mspgcc-users] (no subject)

2012-09-27 Thread Stephen R Phillips
That explains the -minvct=64  with the -mmcu=msp430f5172  (using -v with mspgcc 
that is). 

- Original Message -
From: Peter Bigot big...@acm.org
To: Stephen R Phillips cyberman_phill...@yahoo.com
Cc: Mspgcc-users@lists.sourceforge.net Mspgcc-users@lists.sourceforge.net
Sent: Thursday, September 27, 2012 9:00 PM
Subject: Re: [Mspgcc-users] mspgcc complains about my isr vectors (a little 
patience and assistance would be a appreciated)

The vectors are not part of the crt0 archive, but are linked in at the
same time using the same general infrastructure.  There is a separate
vector object file for each vector size (16, 32, and 64 element),
while the selection of which crt0 archive to use depends on MCU
characteristics.

Peter


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Re: [Mspgcc-users] (no subject)

2010-07-05 Thread Robert Spanton
On Fri, 2010-07-02 at 21:35 -0500, Peter Bigot wrote:
 Everything's up on the mspgcc4 project.  I use git to manage things.
 See http://mspgcc4.git.sourceforge.net/git/gitweb-index.cgi

Ah right.  Should I switch to using mspgcc4?  Futhermore, should I
switch Fedora to shipping mspgcc4?

Cheers,

Rob




Re: [Mspgcc-users] (no subject)

2010-07-03 Thread Robert Spanton
Hi Peter,

On Fri, 2010-07-02 at 10:18 -0500, Peter Bigot wrote:
 Unrelated comment: For the last six months or so, I've been updating
 binutils, mspgcc, and msp430-libc to support new chips.

Awesome.  Have you put the code up anywhere public?

Cheers,

Rob




Re: [Mspgcc-users] (no subject)

2010-07-03 Thread Peter Bigot
Everything's up on the mspgcc4 project.  I use git to manage things.  See
http://mspgcc4.git.sourceforge.net/git/gitweb-index.cgi

Baseline mspgcc4 is maintained in subversion by some folks in the EU; I have
several patches submitted to them but don't muck with their repository until
they've approved the changes.  Nonetheless, I feel what's in git is pretty
stable, and the subversion repository has most of what's needed.

mspgcc4's git repository has a branch next that's always the most solid
version I have available.

mspgcc4 incorporates patches to a couple versions of binutils.  There's a
git repository in which those patches are maintained in branches, to make it
easier to update them.

msp430-libc is also hosted in a git repository on mspgcc4.

The mspgcc4 git repository incorporates some spec files for building RPMs,
based on your work in fact, but the project owners weren't thrilled about
adding distribution-specific stuff.  I think that's the best way to help get
the latest version into various distributions, but haven't pursued it.

I'd love to get debian build infrastructure as well, but haven't been able
to get the equivalent to a spec file: debian tools seem to require a lot
more pieces.  The guy who builds them for Ubuntu has said he'll do it
through his launchpad setup, but prefers to wait until the subversion
repository is updated.  For the OSHAN TinyOS environment that People Power
distributes, I do a very crude approach based on checkinstall.

Peter

On Fri, Jul 2, 2010 at 8:32 PM, Robert Spanton rspan...@zepler.net wrote:

 Hi Peter,

 On Fri, 2010-07-02 at 10:18 -0500, Peter Bigot wrote:
  Unrelated comment: For the last six months or so, I've been updating
  binutils, mspgcc, and msp430-libc to support new chips.

 Awesome.  Have you put the code up anywhere public?

 Cheers,

 Rob



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Re: [Mspgcc-users] (no subject)

2010-07-03 Thread Asser Lähdemäki

I'm not exactly comfortable with building manually, but maybe it's high time to 
learn it properly  get used to it. I will add ticket too. The deadline for my 
work is not yet exactly decided, but it will be around end of august/september, 
probably depending on how the project starts rolling. I don't know exactly what 
kind of promises my project leader has made though.

So I'm personally interested in testing atleast, but I'm still quite a 
beginner. I am eager to learn new stuff too.

Thanks for your time, cheers!



 Date: Fri, 2 Jul 2010 10:18:42 -0500
 From: p...@peoplepowerco.com
 To: mspgcc-users@lists.sourceforge.net
 Subject: Re: [Mspgcc-users] (no subject)
 
 Certainly you'll need an updated header.  It may also be necessary to update
 binutils and gcc; the 430x41x2 chips are not currently recognized as
 different from the 430x41x chips, and I haven't looked into the issue enough
 to estimate whether it's trivial or messy to fix this.  You might be able to
 get away with just lying to the compiler, but that's not a good habit to get
 into.
 
 (Unrelated comment: For the last six months or so, I've been updating
 binutils, mspgcc, and msp430-libc to support new chips.  I'm happy to keep
 doing this, but is there anybody out there from the group that did all the
 original work to get msp430 supported in open software that wants to be
 involved?  Please let me know.)
 
 The header isn't a big issue: TI has graciously provided me with draft
 mspgcc-compatible headers generated from their internal chip databases, with
 an implied promise to feed me new ones as they update their product line and
 fix header bugs.  The only hold-up on making it official is their need to
 nail down the text of the BSD-style license they want applied to the files.
 This would allow mspgcc to use exactly the same names, preprocessor
 directives, etc as both Code Composer and IAR's compiler, and remove much of
 the burden on the msp430-libc maintainer(s) of trying to transcribe stuff
 from 40+ datasheets.  Source-level portability between compilers: what a
 concept.
 
 The gotcha is that the header file organization is very different, since
 they generate complete headers for each chip rather than try to pick
 relevant pieces from a common functional module header as msp430-libc
 currently does.  I've also dragged my feet on integrating this because I
 know it'll break older code: the headers won't have the lower-case
 __msp430_have_* symbols, and they definitely won't have any of the structure
 definitions to overlay UART registers and the like.
 
 What I plan to do is add a build-time option to msp430-libc to select either
 the legacy or TI-provided headers.  My initial tests indicate this has
 promise.
 
 Sounds like you could be a candidate to help test this new configuration.
 If so, and especially if you're comfortable building binutils, gcc, and
 msp430-libc individually and manually as patches are applied, please add a
 tracker ticket on the mspgcc4 project to add this support, including
 information on any time constraints you're working under (msp430 toolchain
 support isn't officially among my primary tasks).
 
 If anybody else has an interest in testing TI-provided headers with MSP430
 software and gcc, please let me know.
 
 (BTW: The draft TI headers I have include USB support on the 55xx.)
 
 Peter
 
 2010/7/2 Asser Lähdemäki likapyykkiavuodest...@hotmail.com
 
 
  Hello everyone,
 
  I'm involved in a project in which I intend to use msp430F4152. However, it
  seems that mspgcc currently does not support the msp430F41x2 devices though
  it supports msp430F4xx devices.. I was thinking that msp430F415 and
  msp430F4152 are not too much different( I need 2 USCIs, that's why
  msp430F415 won't do), I could  probably write the header file even myself.
 
  But what about debugging, would it work? And is there something else to it
  except the header file?
 
  PS. Will there be support for the 55xx series with USB peripheral module in
  future?
 
  _
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[Mspgcc-users] (no subject)

2010-07-02 Thread Asser Lähdemäki

Hello everyone,

I'm involved in a project in which I intend to use msp430F4152. However, it 
seems that mspgcc currently does not support the msp430F41x2 devices though it 
supports msp430F4xx devices.. I was thinking that msp430F415 and msp430F4152 
are not too much different( I need 2 USCIs, that's why msp430F415 won't do), I 
could  probably write the header file even myself.

But what about debugging, would it work? And is there something else to it 
except the header file?

PS. Will there be support for the 55xx series with USB peripheral module in 
future?
  
_
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Re: [Mspgcc-users] (no subject)

2010-07-02 Thread Peter Bigot
Certainly you'll need an updated header.  It may also be necessary to update
binutils and gcc; the 430x41x2 chips are not currently recognized as
different from the 430x41x chips, and I haven't looked into the issue enough
to estimate whether it's trivial or messy to fix this.  You might be able to
get away with just lying to the compiler, but that's not a good habit to get
into.

(Unrelated comment: For the last six months or so, I've been updating
binutils, mspgcc, and msp430-libc to support new chips.  I'm happy to keep
doing this, but is there anybody out there from the group that did all the
original work to get msp430 supported in open software that wants to be
involved?  Please let me know.)

The header isn't a big issue: TI has graciously provided me with draft
mspgcc-compatible headers generated from their internal chip databases, with
an implied promise to feed me new ones as they update their product line and
fix header bugs.  The only hold-up on making it official is their need to
nail down the text of the BSD-style license they want applied to the files.
This would allow mspgcc to use exactly the same names, preprocessor
directives, etc as both Code Composer and IAR's compiler, and remove much of
the burden on the msp430-libc maintainer(s) of trying to transcribe stuff
from 40+ datasheets.  Source-level portability between compilers: what a
concept.

The gotcha is that the header file organization is very different, since
they generate complete headers for each chip rather than try to pick
relevant pieces from a common functional module header as msp430-libc
currently does.  I've also dragged my feet on integrating this because I
know it'll break older code: the headers won't have the lower-case
__msp430_have_* symbols, and they definitely won't have any of the structure
definitions to overlay UART registers and the like.

What I plan to do is add a build-time option to msp430-libc to select either
the legacy or TI-provided headers.  My initial tests indicate this has
promise.

Sounds like you could be a candidate to help test this new configuration.
If so, and especially if you're comfortable building binutils, gcc, and
msp430-libc individually and manually as patches are applied, please add a
tracker ticket on the mspgcc4 project to add this support, including
information on any time constraints you're working under (msp430 toolchain
support isn't officially among my primary tasks).

If anybody else has an interest in testing TI-provided headers with MSP430
software and gcc, please let me know.

(BTW: The draft TI headers I have include USB support on the 55xx.)

Peter

2010/7/2 Asser Lähdemäki likapyykkiavuodest...@hotmail.com


 Hello everyone,

 I'm involved in a project in which I intend to use msp430F4152. However, it
 seems that mspgcc currently does not support the msp430F41x2 devices though
 it supports msp430F4xx devices.. I was thinking that msp430F415 and
 msp430F4152 are not too much different( I need 2 USCIs, that's why
 msp430F415 won't do), I could  probably write the header file even myself.

 But what about debugging, would it work? And is there something else to it
 except the header file?

 PS. Will there be support for the 55xx series with USB peripheral module in
 future?

 _
 Uudessa IE8 selaimessa on uudet pikatoiminnot.

 http://www.microsoft.com/finland/windows/products/winfamily/ie/beta/default.mspx

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[Mspgcc-users] (no subject)

2008-01-13 Thread Stephan Bode
Hello, 
 
I am programming my MSP430F1611 with assembler using the msp430-toolchain on 
OpenSuse 10.3 and cannot get interrupt vector table set up in the µC. I have an 
OLIMEX dev board connected via JTAG, my application is supposed to blink a led 
on port P6.0 every second using the timerA0 CCR0 interrupt in up mode. After 
downloadingt the code to the µC using msp430-jtag, all interrupt vector 
addresses are set to 0x. The program works if I manually set interrupt 
vector addresses with the debugger. What is the problem 
In my assembler code (main.S) I set up section .vectors as this:  
 
.section .vectors 
.ORG DACDMA_VECTOR,0xFF 
.word DACDMA_VECTOR_ISR ; 0xFFE0 DAC12/DMA 
 
.org PORT2_VECTOR,0xFF 
.word PORT2_VECTOR_ISR ; 0xFFE2 Port 2 
 
.org USART1TX_VECTOR,0xFF  
.word USART1TX_VECTOR_ISR ; 0xFFF4 USART 1 Transmit 
 
.org USART1RX_VECTOR,0xFF 
.word USART1RX_VECTOR_ISR ; 0xFFF6 USART 1 Receive 
 
.org PORT1_VECTOR,0xFF 
.word PORT1_VECTOR_ISR ; 0xFFE8 Port 1 
 
.org TIMERA1_VECTOR,0xFF 
.word TIMERA1_ISR ; 0xFFEA Timer A CC1-2, TA 
 
.org TIMERA0_VECTOR,0xFF 
.word TIMERA0_ISR ; 0xFFEC Timer A CC0 
 
.org ADC12_VECTOR,0xFF 
.word ADC12_VECTOR_ISR ; 0xFFEE ADC 
 
.org USART0TX_VECTOR,0xFF 
.word USART0TX_VECTOR_ISR ; 0xFFF0 USART 0 Transmit 
 
.org USART0RX_VECTOR,0xFF 
.word USART0RX_VECTOR_ISR ; 0xFFF2 USART 0 Receive I2C tx/rx 
 
.org WDT_VECTOR,0xFF 
.word WDT_VECTOR_ISR ; 0xFFF4 Watchdog Timer 
 
.org COMPARATORA_VECTOR,0xFF 
.word COMPARATORA_VECTOR_ISR ; 0xFFF6 Comparator A 
 
.org TIMERB1_VECTOR,0xFF 
.word TIMERB1_VECTOR_ISR ; 0xFFF8 Timer B CC1-2, TB 
 
.org TIMERB0_VECTOR,0xFF 
.word TIMERB0_ISR ; 0xFFFA TIMER B CC0 
 
.org NMI_VECTOR,0xFF 
.word NMI_ISR ; 0xFFFC Non maskable 
 
.org RESET_VECTOR,0xFF 
.word RESET ; POR, external RST, Watchdog 
 
To compile I use the following commands: 
 
msp430-gcc -mmcu=msp430x1611 -o blink1s.elf main.o 
msp430-gcc -mmcu=msp430x1611 -nostartfiles -nostandartlibs -o blink1s.elf 
main.o 
 
Then I generate an assembler listing with: 
 
msp430-objdump -DS blink1s.elf blink1s.lst 
 
At the end of blink1s.lst I can find my interrupt vector table, which I believe 
is correct: 
 
Disassembly of section .vectors: 
 
ffe0 _vectors_end-0x20: 
ffe0: 52 40 interrupt service routine at 0x4052 
ffe2: 58 40 interrupt service routine at 0x4058 
ffe4: 5e 40 interrupt service routine at 0x405e 
ffe6: 64 40 interrupt service routine at 0x4064 
ffe8: 6a 40 interrupt service routine at 0x406a 
ffea: 70 40 interrupt service routine at 0x4070 
ffec: 76 40 interrupt service routine at 0x4076 
ffee: 7a 40 interrupt service routine at 0x407a 
fff0: 80 40 interrupt service routine at 0x4080 
fff2: 86 40 interrupt service routine at 0x4086 
fff4: 8c 40 interrupt service routine at 0x408c 
fff6: 92 40 interrupt service routine at 0x4092 
fff8: 98 40 interrupt service routine at 0x4098 
fffa: 9c 40 interrupt service routine at 0x409c 
fffc: a0 40 interrupt service routine at 0x40a0 
fffe: 00 40 interrupt service routine at 0x4000 
 
I load the program into the µC with: 
 
msp430-jtag -e blink1s.elf --- no errors, but no blinking! 
 
Then I use ddd to debug with msp430-gdb over LPT1 (parport0): 
 
ddd --debugger msp430-gdb connect to the µC via JTAG and see the following: 
 
GNU DDD 3.3.11 (i386-suse-linux-gnu), by Dorothea Lütkehaus and Andreas Zeller. 
Copyright © 1995-1999 Technische Universität Braunschweig, Germany. 
Copyright © 1999-2001 Universität Passau, Germany. 
Copyright © 2001 Universität des Saarlandes, Germany. 
Copyright © 2001-2004 Free Software Foundation, Inc. 
(gdb) target remote localhost:2000 
Remote debugging using localhost:2000 
0x in ?? () 
 
The last line means the µC stopped program execution at addres 0x,right?  
I figured out with: 
 
disassemble 0xffe0 0x: 
 
(gdb) disassemble 0xffe0 0x 
Dump of assembler code from 0xffe0 to 0x: 
0xffe0: interrupt service routine at 0x 
0xffe2: interrupt service routine at 0x 
0xffe4: interrupt service routine at 0x 
0xffe6: interrupt service routine at 0x 
0xffe8: interrupt service routine at 0x 
0xffea: interrupt service routine at 0x 
0xffec: interrupt service routine at 0x 
0xffee: interrupt service routine at 0x 
0xfff0: interrupt service routine at 0x 
0xfff2: interrupt service routine at 0x 
0xfff4: interrupt service routine at 0x 
0xfff6: interrupt service routine at 0x 
0xfff8: interrupt service routine at 0x 
0xfffa: interrupt service routine at 0x 
0xfffc: interrupt service routine at 0x 
0xfffe: interrupt service routine at 0x 
End of assembler dump. 
 
that the interrupt vectors all point to 0x. So the µC starts up immediatly 
vectors to 0x, and hangs itself. 
I am pretty sure, that my setup routines work because if I: 
 
(gdb) set *0xfffe=0x4000 
(gdb) set *0xffec=0x4076 
(gdb) monitor reset 
 
The program works and blinks the LED every 

[Mspgcc-users] (no subject)

2005-10-29 Thread Gary Richardson
I recently bought an Olimex msp430-1121stk development board and have been
using the mspgcc package to experiment with some of the example programs
that came with mspgcc. I have found that the assembly-only program require
some modification before they will assemble without error. There is one
problem I haven't been able to resolve:

mingw32-make
msp430-gcc -mmcu=msp430x1121 -x
assembler-with-cpp -D_GNU_ASSEMBLER_ -nostartfiles -nostandartlibs  -o
timer5.o timer5.s
msp430-gcc -mmcu=msp430x1121 -o T5.elf timer5.o
msp430-ld: region vectors is full (T5.elf section .vectors)
mingw32-make: *** [T5.elf] Error 1
Exit code: 2

My definition of the interrupt vector section is:

.section.vectors
.orgTIMERA1_VECTOR
.word  TAX_ISR;fff0
.word  TA0_ISR;fff2
.word  WDT_ISR  ;fff4

What's wrong here?




RE: [Mspgcc-users] (no subject)

2005-07-05 Thread Ram Kumar
Hi Rolf,

Thanks for your answers. Just a couple of more follow up questions.
1. Can the BLS be user-programmed or is it default factory programmed?
2. Can any interrupt handler (DMA, I2C etc) be located in the ROM?

Thanks,
-Ram


 1. Is it possible to have a safe bootloader that cannot be accidentally
 over-written by the application code? The AVR architecture for instance
has
 a bootloader section whose contents can be protected using fuse bits.

the MSPs do have a BLS (bootstrap loader).


 2. Can the non-maskable interrupt (NMI) handler be located in the ROM?

Yes.

 
 3. Is it possible to use the DMA and the I2C bus within the NMI context?

It should be no problem (but ugly) with nested interrupts.

Regards,

Rolf



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RE: [Mspgcc-users] (no subject)

2005-07-05 Thread nobodyO
Hi,

 Thanks for your answers. Just a couple of more follow up questions.
 1. Can the BLS be user-programmed or is it default factory programmed?

the BSL is hardwired but can be extended with code in RAM. That's the
BSL update, which is an extension/patch.


 2. Can any interrupt handler (DMA, I2C etc) be located in the ROM?

The not ancient versions do have only RAM or Flash you can use. Because of the 
Von-Neumann-Architecture and linear addressing (and address space = I/O space)
it doesn't matter where the code is. But the RAM gets cleared at power up reset.

Regards,

Rolf




[Mspgcc-users] (no subject)

2005-03-28 Thread Frederic Beaulieu
Hi all,
I try to change the start-up procedure using the following function (as
described in the mspgcc document). However, the MCU don’t start (I don’t
see the LED blink). The reset vector seems ok. Maybe I forget something.
Is there someone who can help me?
 
Thanks,
Fred
 
NAKED(_reset_vector__){
  
  extern int _etext;
  extern int __data_start;
  extern int _edata;
  extern int __bss_start;
  extern int __bss_end;
  
  Byte1_t *b1Src;
  Byte1_t *b1Dst;
  
  // Stop watchdog timer
  WDTCTL = WDTPW + WDTHOLD;
 
  // Initialize the .data segment
  b1Src = (Byte1_t*)_etext;
  b1Dst = (Byte1_t*)__data_start;
  while(b1Dst != (Byte1_t*)_edata){
*b1Dst = *b1Src++;
*b1Dst++;
  }
 
  // Clear the .bss segment
  b1Dst = (Byte1_t*)__bss_start;
  while(b1Dst != (Byte1_t*)__bss_end){
*b1Dst = 0;
*b1Dst++;
  }
 
  // Debug - Flash the LEDs
  P6OUT |= (LED1_RED);
  P3OUT |= (LED2_RED);
  PreciseWait(3);
  P6OUT = ~(LED1_RED);
  P3OUT = ~(LED2_RED);
  
  // Jump to main
  __asm__ __volatile__(br #main::);
  
}
 
ffe0 InterruptVectors:
ffe0:   00 25 00 25 00 25 b2 ad 00 25 00 25 b0 ac 00 25
.%.%.%...%.%...%
fff0:   00 25 00 25 00 25 00 25 00 25 00 25 00 25 44 c9
.%.%.%.%.%.%.%D.
 
c944 _reset_vector__:
 
---
Frederic Beaulieu, M.Sc.
Research and Development
NewTrax Technologies Inc.
HYPERLINK http://www.newtraxtech.com/http://www.newtraxtech.com/
 

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[Mspgcc-users] (no subject)

2004-11-15 Thread sb22
Hi everyone,

I am a new user of mspgcc and using msp430F1611. As compilation goes fine,
debugging using Insight(GDB) is giving me problem of getting locked in whle
loop waiting for timer flag set. 

The same program works fine for IAR Kick start. TI suggested to port their
latest *.xcl,*. ddf and *.srf to gcc. Can anyone give me hints how i can update
my gcc.

Thanks in advance

Sankar




[Mspgcc-users] (no subject)

2004-11-12 Thread sb22

Hi everyone,

I am a new user of mspgcc compiler. we designed a board using msp430F1611. I
successfully installed and compiled my program in windows XP machine. Now i got
stuck in dubugging using Insight(GDB). While debugging, the debugger get locked
at while loop requiring setting of timer (Both timer A and B) flag (TAIFG). It
seems to me that debugger is indefinitely waiting for response from target and
fails to have timer flag set.

Now, the same program does work for TI demo board. So logically i suspect the
problem is in our board. However, our board does also work, if you reset the
board by terminating debugg session.

I would apprecite it very much if you share with me if anyone of you have ever
experienced such problem. 

thanks in advance

Sankar 







Re: [Mspgcc-users] (no subject)

2004-11-12 Thread Frederic Beaulieu
Insight is not supported now. I suggest you to used
Eclipse instead, it work perfectly with MSPGCC!
A readme file posted on this group explain how to
install it!


---
Frederic Beaulieu, M.Sc.
Research and Development
NewTrax Technologies Inc.
3674 Saint-Hubert 
Montreal, Qc, CANADA H2L 4A2
Tel:   (514) 288-6398
Fax:   (514) 221-3417
Email: fbeaul...@newtraxtech.com
http://www.newtraxtech.com/

--- s...@uakron.edu wrote:

 
 
 Hi everyone,
 
 I am a new user of mspgcc compiler. we designed a
 board using msp430F1611. I
 successfully installed and compiled my program in
 windows XP machine. Now i got
 stuck in dubugging using Insight(GDB). While
 debugging, the debugger get locked
 at while loop requiring setting of timer (Both timer
 A and B) flag (TAIFG). It
 seems to me that debugger is indefinitely waiting
 for response from target and
 fails to have timer flag set.
 
 Now, the same program does work for TI demo board.
 So logically i suspect the
 problem is in our board. However, our board does
 also work, if you reset the
 board by terminating debugg session.
 
 I would apprecite it very much if you share with me
 if anyone of you have ever
 experienced such problem. 
 
 thanks in advance
 
 Sankar 
 
 
 
 
 
 

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RE: [Mspgcc-users] (no subject)

2004-11-12 Thread Jose Maria
Hi Frederic,
 
I have tried (sorry for my english) to work with eclipse and mspgcc for a
long time and I have not obtain good results. Actually I can compile my
msp430 programs, but when I try to debug (simulate or emulate) nothing
works. And the problem is that I have not found any information about
eclipse and mspgcc, a good tutorial about it. All I have is the eclipse
info, but what I need is something like eclipse+mspgcc for stupids (I want
to say for people who has no idea about it).
 
Do you know where can I obtain this information?
 
For example, what releases of eclipse, cdt and mspgcc must I install? Must I
launch mspgcc-gdbproxy before start debugging? Whats the meaning of the
error messages and what can I do to solve it? and this basic things. You
have said that you have post a tutorial file to the list ... where can I
find this? (I am new in the forum and I do not know where I must search this
info)
 
Finally I want to say that every time I try to debug an simply program (and
I have configured as the eclipse help explains) I usually obtain next error:
 
Info threads
Warning: RMT ERROR: failed to get remote thread list
Warning: Remote failure reply: E00.
 
 
Thanks in advance,
Jose Maria.
 


RE: [Mspgcc-users] (no subject)

2004-11-12 Thread Frederic Beaulieu
There are a lot of discussion about this in this group
and in Yahoo MSP430 group. Just search in them. We
write a little readme file which can, may be, help
you:


1- Install Eclipse - just copy directory into hard
disk
2- Install cygwin(click cygwin setup.exe in eclipse
folder) from the Internet with gcc(dlevel),
gdb(dlevel), openssh(net), openssl(net), cvs(dlevel),
tcsh(shell) and xinetd(net).
The red hat and calgary servers worked for me. Red hat
is faster.
3- Modify environmental variables(control panel,
system, advanced):

create:

CYGWIN ntsec tty
JAVA_HOME (Home java directory)

add in PATH:

C:\cygwin\bin
%JAVA_HOME%\bin
C:\cygwin\usr\X11R6\bin

4- Run net.sf.mspgcc.zip in Eclipse folder and extract
files in Eclipse\plugins
5- Run Cygwin (you should only have to do this once)
6- Reboot the machine
7- Click eclipse.exe and create new project(file, new,
project)
8- Select Standard Make C project, next, select a
project name, finish
9- Click on the navigator and right-click on the
project name(you should see .cdtproject and .project
underneath)
10- Select new file if you want to create new c files,
or import and then filesystem if you want to copy 
c source code from an another location, then choose
directory where the files are located, select the
files and then finish.
If the files are spread into different folders, create
folders in the project and then
import the files in each folders.
11- If the makefile is made correctly with the right
compiler after CC you should be able to
build the executable.  Click on project and unclick
build automatically (It's personal. I prefer that).
Then click on Ctrl-B to build it.  Ifyou did the
aforementioned steps, it should work fine.  Verify
that the executable (.elf file) is present in the
folder.  Test it on the command line.
12- Now click on Window, open perspective, debug
13- Click Run, Debug...
14- In main, give a new name(it must be the same name
as the .elf file) to the configuration, select the
right project
and select the right .elf file in C/C++ Application
15- In Debugger, browse into your filesystem and find
the debugger executable. Select it in GDB debugger.
Then, select the .ini file
in GDB command file (in our case gdb_load.ini). it
should be C:\mspgcc\bin\msp430-gdb.exe if you
installed mspgcc in C:\.
Select the TCP Connection, choose localhost for the
Host name and type  for the port number.
If the steps 3, 4 5 and 6 above worked,  you should
see %CygwinGDBDebugger.name or mspgcc GDB debugger
in the form Debugger.  If not,
redo these steps.
16- In source, select the right project name
17- Run the msp430-gdbproxy program to open the
connection and leave the window open
18- Click Apply and Debug. 
19- You should see a breakpoint at the beginning of
the program click resume. You should see the program
running!


for more details on how to debug please read the
documentation but it's not harder than visual studio.

Enjoy!
--

--- Jose Maria jmlmanz...@hotmail.com wrote:

 Hi Frederic,
  
 I have tried (sorry for my english) to work with
 eclipse and mspgcc for a
 long time and I have not obtain good results.
 Actually I can compile my
 msp430 programs, but when I try to debug (simulate
 or emulate) nothing
 works. And the problem is that I have not found any
 information about
 eclipse and mspgcc, a good tutorial about it. All I
 have is the eclipse
 info, but what I need is something like
 eclipse+mspgcc for stupids (I want
 to say for people who has no idea about it).
  
 Do you know where can I obtain this information?
  
 For example, what releases of eclipse, cdt and
 mspgcc must I install? Must I
 launch mspgcc-gdbproxy before start debugging? Whats
 the meaning of the
 error messages and what can I do to solve it? and
 this basic things. You
 have said that you have post a tutorial file to the
 list ... where can I
 find this? (I am new in the forum and I do not know
 where I must search this
 info)
  
 Finally I want to say that every time I try to debug
 an simply program (and
 I have configured as the eclipse help explains) I
 usually obtain next error:
  
 Info threads
 Warning: RMT ERROR: failed to get remote thread list
 Warning: Remote failure reply: E00.
  
  
 Thanks in advance,
 Jose Maria.
  
 


=
---
Frederic Beaulieu, M.Sc.
Research and Development
NewTrax Technologies Inc.
3674 Saint-Hubert 
Montreal, Qc, CANADA H2L 4A2
Tel:   (514) 288-6398
Fax:   (514) 221-3417
Email: fbeaul...@newtraxtech.com
http://www.newtraxtech.com/



__ 
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Check out the new Yahoo! Front Page. 
www.yahoo.com 
 




RE: [Mspgcc-users] (no subject)

2004-11-12 Thread Jose Maria
Thanks.



[Mspgcc-users] (no subject)

2004-09-22 Thread karan
has anyone implemented bit-banging i2c code for 
both the master and slave for the msp430s?

i am working with the olimex kit which has the msp430f449,
but any input in this direction will be helpful.

thank you,
karan
CM II
Resolution Systems Inc.



Re: [Mspgcc-users] (no subject)

2004-09-06 Thread Dmitry
This is a linker var called '_end'.

So, 

extern int _end;
int m;
(int *) m = _end;

Now 'm' will contain flash last address.

~d


On Sunday 05 September 2004 05:45, Chris Liechti wrote:
 Berndt Josef Wulf wrote:
  How do I find the top most address of flash used by applications at
  runtime? I

 top most address: 0xfff0
 the interrupt vectors are always there ;-)

  want to load and execute applications under the control of a monitor
  program.

 that probably means you want to use entire flash segments anyway.

  Is there a symbol that can be queried for this purpose?
 
  At this point of time, I only managed to do this by creating a section
  that is placed at the top flash memory address that can be queried by the
  application, see below:

 ...

  Is this the way to do it or is there an easier way?

 yes, i would place the mointor at the upper end of the memory (as you
 probably want to use the interrupt table anyway, at least for the reset).
 then when you only use entire flash segments, which makes sense if you
 want to erase some of them at runtime, you'll have to choose a size
 multiple of 512 bytes.

 i used something like this in the serial-jtag adapter, see mspgcc
 CVS/serJTAGfirmware. there i use -Ttext=0xe000 as linker option, which
 limits the text section to the upper 8kB of the flash.
 the rest of the flash is used to download user code.

 you probably need a similar trick for the RAM usage too.

 chris


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[Mspgcc-users] (no subject)

2004-09-04 Thread Berndt Josef Wulf
G'day,

How do I find the top most address of flash used by applications at runtime? I 
want to load and execute applications under the control of a monitor program. 
Is there a symbol that can be queried for this purpose?

At this point of time, I only managed to do this by creating a section that is 
placed at the top flash memory address that can be queried by the 
application, see below:

Assembler Code:

.section Boundary
.global  HiFlash
HiFlash:;
.end

section information found in monitor.lst
[...]
  CONTENTS, READONLY, DEBUGGING
 16 Boundary   2320  2320  cf8c  2**0
[...]

Test output from monitor program
 info
Highest flash address used by monitor = 0x2320


Which indeed is, with the exception of the interrupt vector table, the highest 
address used by the monitor program.

Is this the way to do it or is there an easier way?

Sysinfo: NetBSD-i386-2.0G, mspgcc/gcc-3.4.0, msp430x149

cheerio Berndt



Re: [Mspgcc-users] (no subject)

2004-09-04 Thread Chris Liechti

Berndt Josef Wulf wrote:
How do I find the top most address of flash used by applications at runtime? I 


top most address: 0xfff0
the interrupt vectors are always there ;-)

want to load and execute applications under the control of a monitor program. 


that probably means you want to use entire flash segments anyway.


Is there a symbol that can be queried for this purpose?

At this point of time, I only managed to do this by creating a section that is 
placed at the top flash memory address that can be queried by the 
application, see below:

...

Is this the way to do it or is there an easier way?


yes, i would place the mointor at the upper end of the memory (as you 
probably want to use the interrupt table anyway, at least for the reset).
then when you only use entire flash segments, which makes sense if you 
want to erase some of them at runtime, you'll have to choose a size 
multiple of 512 bytes.


i used something like this in the serial-jtag adapter, see mspgcc 
CVS/serJTAGfirmware. there i use -Ttext=0xe000 as linker option, which 
limits the text section to the upper 8kB of the flash.

the rest of the flash is used to download user code.

you probably need a similar trick for the RAM usage too.

chris



[Mspgcc-users] (no subject)

2004-01-14 Thread naveenthariyan
//




Re: [Mspgcc-users] (no subject)

2003-01-23 Thread Dmitry
This has been fixed a while ago.
Unfortunatelly there is no win32 build yet.
So, pull sources from CVS and rebuild gcc.

~d

P.S. nex time please send raw sources instead of listing.


On Thursday 23 January 2003 03:33, brian.sm...@tekelek.com.au wrote:
 The code generated here does not look right to me.

 ReqBits is assigned a value by ReqBits = PL_RequiredStatus  mask;

 Later in the module, we have the line
 if (ReqBits)

 Looking at the generated code for this, there is no test conducted.

 if (ReqBits)
 c376:   27 24   jz$+80;abs dst addr 0xc3c6
 This is a bad thing!

 Build Tools version is

This is binutils-2.11, gcc-3.2 and msp430-libc.
Patches from 17 Dec 2002, it is Official RELEASE 1.

 Full module follows.

 

 c302 PLANT_TickHandler:

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[Mspgcc-users] (no subject)

2003-01-22 Thread Brian . Smith
The code generated here does not look right to me.

ReqBits is assigned a value by ReqBits = PL_RequiredStatus  mask;

Later in the module, we have the line
if (ReqBits)

Looking at the generated code for this, there is no test conducted.

if (ReqBits)
c376:   27 24   jz$+80;abs dst addr 0xc3c6
This is a bad thing!

Build Tools version is

   This is binutils-2.11, gcc-3.2 and msp430-libc.
   Patches from 17 Dec 2002, it is Official RELEASE 1.

Full module follows.



c302 PLANT_TickHandler:

/*/
/** \brief Tick processing.
* \par Functional Description:
* This is the low level driver for the relays for the RWG outputs.
* It checks the state of the power supply and if shit is about to happen,
it will
* shut off all the relays. If the power is OK it checks for discrepancies
between
* the desired and required output states. If there is and it is not
protecting
* the plant against rapid mode changes, it will instigate a change. Any
change will
* result in all the relays being refreshed. If the relays have not been
checked for
* a while, it will refresh their state.
*
* Not all the possible output functions can be mapped to the relays at any
one
* time. The plant info arrays define which virtual outputs are mapped to
physical
* outputs as well as the ports to which they are mapped.

* \par Usage:
* This function MUST be added to EXEC_InitSW() in exec.c if you want your
software
* packages configured properly!
**/
PUBLIC  void  PLANT_TickHandler(void)
{
c302:   0b 12   push  r11 ;
c304:   0a 12   push  r10 ;
c306:   09 12   push  r9  ;
c308:   08 12   push  r8  ;
/* DECLARATIONS */
  UBYTE op;
  UBYTE mask;
  UBYTE ReqBits;
  UBYTE oldDes;
  UBYTE oldAct;
  UBYTE PowerState;
  BOOL  update;


/* ASSERTS*/
/* PROCEDURE  */

  /* Switch all the output drives off and then see if we need to switch
any on later. */
  SYS_PLANT_OutputsDrivesOff();
c30a:   c2 43 19 00 mov.b #0,   0x0019 ;subst r3 with
As==00
c30e:   f2 f0 fc ff 1d 00   and.b #-4,  0x001d ;#0xfffc
  oldDes = PL_DesiredStatus;
c314:   59 42 12 04 mov.b 0x0412,r9  ;src addr 0x0412
  oldAct = PL_ActualStatus;
c318:   58 42 13 04 mov.b 0x0413,r8  ;src addr 0x0413

  /* if the power module indicates we are about to lose power, switch
everything off */
  PowerState = PWR_RelayPermission((BOOL)PL_UpdateCounter);
c31c:   5f 42 93 03 mov.b 0x0393,r15 ;src addr 0x0393
c320:   b0 12 b2 cb call  #-13390 ;#0xcbb2
  if (PowerState == PWR_FuckOff)
c324:   4f 93   cmp.b #0,   r15   ;subst r3 with As==00
c326:   5a 20   jnz   $+182   ;abs dst addr 0xc3dc
  {
/* If we were operating, enforce a complete update of the
outputs */
if (PL_RequiredStatus != PLANT_ALL_OUTPUTS_OFF)
c328:   c2 93 95 03 cmp.b #0,   0x0395 ;subst r3 with
As==00
c32c:   09 24   jz$+20;abs dst addr 0xc340
{
  PL_State = PLANT_OFF;
c32e:   c2 43 88 03 mov.b #0,   0x0388 ;subst r3 with
As==00
  PL_ModeCounter = 0;
c332:   82 43 a0 03 mov   #0,   0x03a0 ;subst r3 with
As==00
  PL_UpdateCounter = PLANT_NUM_OPS;
c336:   f2 40 07 00 93 03   mov.b #7,   0x0393 ;#0x0007
PL_RequiredStatus = PLANT_ALL_OUTPUTS_OFF;
c33c:   c2 43 95 03 mov.b #0,   0x0395 ;subst r3 with
As==00
}
  }
  else
  {
/* If the current mode timer has expired, toggle the state and
reload the timer for the state */
if ((!PL_ModeCounter) || PL_UpdateState)
{
  if ((PL_State == PLANT_ON) || (PL_OffTime ==
PLANT_FOREVER_TIME))
  {
PL_State = PLANT_OFF;
PL_ModeCounter = PL_OffTime;
PL_DesiredStatus = PL_OnStatus 
~PLANT_POWER_OUTPUTS;
if (PL_Types[PLANT_APPLIANCE_FAN] !=
PLANT_TYPE_FAN_CONT) PL_DesiredStatus = ~PLANT_STATUS_FAN;
  }
  else
  {
PL_State = PLANT_ON;
PL_ModeCounter = PL_OnTime;
PL_DesiredStatus = PL_OnStatus;
  }
  PL_UpdateCounter = PLANT_NUM_OPS;
  PL_UpdateState = FALSE;
  PL_RequiredStatus = PL_DesiredStatus;
}
  }

  PowerState = 

[Mspgcc-users] (no subject)

2002-07-11 Thread Dmitry
Cool!
fixes to IAR compatible data section commited.
~d

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[Mspgcc-users] (no subject)

2002-07-02 Thread Dmitry
Fellows, 

I just fixed some bugs in cmphi code.
So, if you're experiencing some difficulties with a compare operations,
grab new sources and recompile gcc.

~d

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