Re: [RFC PATCH 14/34] exec: [CPUTLB] Move PAGE_* macros to common header
On 1/24/24 09:54, Richard Henderson wrote: On 1/20/24 00:40, Anton Johansson wrote: These don't vary across targets and are used in soon-to-be common code (cputlb.c). Signed-off-by: Anton Johansson --- include/exec/cpu-all.h | 24 include/exec/cpu-common.h | 30 ++ 2 files changed, 30 insertions(+), 24 deletions(-) Reviewed-by: Richard Henderson Queued, thanks. r~
Re: [PATCH v2] cpu-exec: simplify jump cache management
On 1/23/24 07:57, Richard Henderson wrote: On 1/23/24 01:34, Paolo Bonzini wrote: Unless I'm missing something egregious, the jmp cache is only every populated with a valid entry by the same thread that reads the cache. Therefore, the contents of any valid entry are always consistent and there is no need for any acquire/release magic. I think you're right, and I over-complicated this thinking about invalidations. Because of this, there is really nothing to win in splitting the CF_PCREL and !CF_PCREL paths. It is easier to just always use the ->pc field in the jump cache. Once upon a time, PCREL was an ifdef, and the jump cache pc did not exist for !PCREL. The split has not been addressed since then. The cleanup looks good. Reviewed-by: Richard Henderson Queued, thanks. r~
Re: [PATCH 00/10] Clean up includes
25.01.2024 19:33, Peter Maydell : This series makes a bunch of automated edits with the clean-includes script. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. I created the series by looking at a run of the script across the whole tree (./scripts/clean-includes --git includes --all) produces, and then disentangling that into (a) different cohesive parts and (b) files that needed to go into the script's exclude-list. After this series, the tree is still not entirely clean -- there are 20 other files the script wants to change. But at least some of them are things that should be on the exclude list, and some are things which I didn't feel like taking the time to try to decide whether they should be fixed or excluded. I might come back to these at some later date, but I figured this series was enough to be going on with. thanks -- PMM Peter Maydell (10): scripts/clean-includes: Update exclude list hyperv: Clean up includes disas/riscv: Clean up includes aspeed: Clean up includes acpi: Clean up includes m68k: Clean up includes include: Clean up includes cxl: Clean up includes riscv: Clean up includes misc: Clean up includes Applied to trivial-patches tree, thanks! /mjt
Re: [PATCH 05/10] acpi: Clean up includes
On 1/26/24 02:34, Peter Maydell wrote: This commit was created with scripts/clean-includes: ./scripts/clean-includes --git acpi include/hw/*/*acpi.h hw/*/*acpi.c All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Signed-off-by: Peter Maydell --- include/hw/nvram/fw_cfg_acpi.h | 1 - include/hw/virtio/virtio-acpi.h | 1 - hw/nvram/fw_cfg-acpi.c | 1 + hw/virtio/virtio-acpi.c | 1 + 4 files changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH 04/10] aspeed: Clean up includes
On 1/26/24 02:34, Peter Maydell wrote: This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Signed-off-by: Peter Maydell --- hw/arm/aspeed_eeprom.h | 1 - tests/qtest/qtest_aspeed.h | 2 -- hw/arm/aspeed_eeprom.c | 1 + 3 files changed, 1 insertion(+), 3 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH 03/10] disas/riscv: Clean up includes
On 1/26/24 02:34, Peter Maydell wrote: This commit was created with scripts/clean-includes: ./scripts/clean-includes --git disas/riscv disas/riscv*[ch] All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Signed-off-by: Peter Maydell --- disas/riscv.h | 1 - disas/riscv-xthead.c | 1 + disas/riscv-xventana.c | 1 + 3 files changed, 2 insertions(+), 1 deletion(-) Reviewed-by: Richard Henderson r~
Re: [PATCH 02/10] hyperv: Clean up includes
On 1/26/24 02:34, Peter Maydell wrote: This commit was created with scripts/clean-includes: ./scripts/clean-includes --git hyperv hw/hyperv/*.[ch] All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Signed-off-by: Peter Maydell --- hw/hyperv/hv-balloon-internal.h | 1 - hw/hyperv/hv-balloon-our_range_memslots.h | 1 - hw/hyperv/hv-balloon-page_range_tree.h| 1 - hw/hyperv/hv-balloon-our_range_memslots.c | 1 + hw/hyperv/hv-balloon-page_range_tree.c| 1 + hw/hyperv/hv-balloon.c| 1 + 6 files changed, 3 insertions(+), 3 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 02/23] scripts/coccinelle: Add cpu_env.cocci_template script
On 1/27/24 08:03, Philippe Mathieu-Daudé wrote: Add a Coccinelle script to convert the following slow path (due to the QOM cast macro): _CPU(..)->env to the following fast path: cpu_env(..) Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 1 + scripts/coccinelle/cpu_env.cocci_template | 92 +++ 2 files changed, 93 insertions(+) create mode 100644 scripts/coccinelle/cpu_env.cocci_template Reviewed-by: Richard Henderson +/* Both first_cpu/current_cpu are CPUState* */ +@@ +symbol first_cpu; +symbol current_cpu; +@@ +( +-CPU(first_cpu) ++first_cpu +| +-CPU(current_cpu) ++current_cpu +) I think part of Paolo's query is if there are any new instances of commit 96449e4a30a56e3303d6d0407aca130c71671754 Author: Philippe Mathieu-Daudé Date: Tue May 12 09:00:18 2020 +0200 target: Remove unnecessary CPU() cast ... @@ typedef CPUState; CPUState *s; @@ - CPU(s) + s r~
Re: [PATCH v2 23/23] target/sparc: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:04, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- target/sparc/cpu.c | 14 -- target/sparc/gdbstub.c | 3 +-- target/sparc/int32_helper.c | 3 +-- target/sparc/int64_helper.c | 3 +-- target/sparc/ldst_helper.c | 6 ++ target/sparc/mmu_helper.c | 15 +-- target/sparc/translate.c| 3 +-- 7 files changed, 15 insertions(+), 32 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 22/23] target/xtensa: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:04, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- target/xtensa/dbg_helper.c | 3 +-- target/xtensa/exc_helper.c | 3 +-- target/xtensa/gdbstub.c| 6 ++ target/xtensa/helper.c | 9 +++-- target/xtensa/translate.c | 3 +-- 5 files changed, 8 insertions(+), 16 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 21/23] target/tricore: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:04, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- target/tricore/cpu.c | 20 target/tricore/gdbstub.c | 6 ++ target/tricore/helper.c| 3 +-- target/tricore/translate.c | 3 +-- 4 files changed, 8 insertions(+), 24 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 20/23] target/sh4: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:04, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- target/sh4/cpu.c | 15 +-- target/sh4/gdbstub.c | 6 ++ target/sh4/helper.c| 11 +++ target/sh4/translate.c | 3 +-- 4 files changed, 11 insertions(+), 24 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 19/23] target/s390x: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:04, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/cpu-dump.c| 3 +-- target/s390x/gdbstub.c | 6 ++ target/s390x/helper.c | 3 +-- target/s390x/kvm/kvm.c | 6 ++ target/s390x/tcg/excp_helper.c | 11 +++ target/s390x/tcg/translate.c | 3 +-- 6 files changed, 10 insertions(+), 22 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 18/23] target/rx: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:04, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- target/rx/gdbstub.c | 6 ++ target/rx/helper.c| 6 ++ target/rx/translate.c | 3 +-- 3 files changed, 5 insertions(+), 10 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 17/23] target/riscv: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:03, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/arch_dump.c | 6 ++ target/riscv/cpu.c | 17 + target/riscv/cpu_helper.c | 14 -- target/riscv/debug.c | 9 +++-- target/riscv/gdbstub.c | 6 ++ target/riscv/kvm/kvm-cpu.c | 6 ++ target/riscv/tcg/tcg-cpu.c | 9 +++-- target/riscv/translate.c | 3 +-- 8 files changed, 22 insertions(+), 48 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 16/23] target/ppc: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:03, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- hw/ppc/mpc8544_guts.c | 3 +-- hw/ppc/pnv.c | 3 +-- hw/ppc/pnv_xscom.c| 5 + hw/ppc/ppce500_spin.c | 3 +-- hw/ppc/spapr.c| 3 +-- hw/ppc/spapr_caps.c | 6 ++ target/ppc/cpu_init.c | 11 +++ target/ppc/excp_helper.c | 3 +-- target/ppc/gdbstub.c | 12 target/ppc/kvm.c | 6 ++ target/ppc/ppc-qmp-cmds.c | 3 +-- target/ppc/user_only_helper.c | 3 +-- 12 files changed, 19 insertions(+), 42 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 15/23] target/openrisc: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:03, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- target/openrisc/gdbstub.c | 3 +-- target/openrisc/interrupt.c | 6 ++ target/openrisc/translate.c | 3 +-- 3 files changed, 4 insertions(+), 8 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 14/23] target/nios2: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:03, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- target/nios2/cpu.c| 15 +++ target/nios2/helper.c | 3 +-- target/nios2/nios2-semi.c | 6 ++ 3 files changed, 6 insertions(+), 18 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 13/23] target/mips: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:03, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu.c | 11 +++--- target/mips/gdbstub.c | 6 ++ target/mips/kvm.c | 27 + target/mips/sysemu/physaddr.c | 3 +-- target/mips/tcg/exception.c | 3 +-- target/mips/tcg/op_helper.c | 3 +-- target/mips/tcg/sysemu/special_helper.c | 3 +-- target/mips/tcg/sysemu/tlb_helper.c | 6 ++ target/mips/tcg/translate.c | 3 +-- 9 files changed, 21 insertions(+), 44 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 12/23] target/microblaze: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:03, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- target/microblaze/helper.c| 3 +-- target/microblaze/translate.c | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 11/23] target/m68k: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:03, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- target/m68k/cpu.c | 30 ++ target/m68k/gdbstub.c | 6 ++ target/m68k/helper.c| 3 +-- target/m68k/m68k-semi.c | 6 ++ target/m68k/op_helper.c | 11 +++ target/m68k/translate.c | 3 +-- 6 files changed, 19 insertions(+), 40 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 10/23] target/i386: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:03, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/hvf/vmx.h | 13 +++--- hw/i386/vmmouse.c | 6 ++--- hw/i386/xen/xen-hvm.c | 3 +-- target/i386/arch_memory_mapping.c | 3 +-- target/i386/cpu-dump.c | 3 +-- target/i386/cpu.c | 37 +-- target/i386/helper.c| 39 - target/i386/hvf/hvf.c | 8 ++ target/i386/hvf/x86.c | 4 +-- target/i386/hvf/x86_emu.c | 6 ++--- target/i386/hvf/x86_task.c | 10 +++- target/i386/hvf/x86hvf.c| 6 ++--- target/i386/kvm/kvm.c | 6 ++--- target/i386/kvm/xen-emu.c | 32 --- target/i386/tcg/sysemu/bpt_helper.c | 3 +-- target/i386/tcg/tcg-cpu.c | 14 +++ target/i386/tcg/user/excp_helper.c | 3 +-- target/i386/tcg/user/seg_helper.c | 3 +-- 18 files changed, 59 insertions(+), 140 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 09/23] target/i386/hvf: Use CPUState typedef
On 1/27/24 08:03, Philippe Mathieu-Daudé wrote: QEMU coding style recommend using structure typedefs: https://www.qemu.org/docs/master/devel/style.html#typedefs Signed-off-by: Philippe Mathieu-Daudé --- target/i386/hvf/x86.h | 26 +- target/i386/hvf/x86_descr.h | 14 +++--- target/i386/hvf/x86_emu.h | 4 ++-- target/i386/hvf/x86_mmu.h | 6 +++--- target/i386/hvf/x86.c | 26 +- target/i386/hvf/x86_descr.c | 8 target/i386/hvf/x86_mmu.c | 14 +++--- 7 files changed, 49 insertions(+), 49 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 08/23] target/hppa: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:03, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- target/hppa/cpu.c| 8 ++-- target/hppa/int_helper.c | 8 ++-- target/hppa/mem_helper.c | 3 +-- 3 files changed, 5 insertions(+), 14 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 07/23] target/cris: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:03, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- target/cris/cpu.c | 5 + target/cris/gdbstub.c | 9 +++-- target/cris/helper.c| 12 target/cris/translate.c | 3 +-- 4 files changed, 9 insertions(+), 20 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 06/23] target/avr: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:03, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- target/avr/cpu.c | 27 +++ target/avr/gdbstub.c | 6 ++ target/avr/helper.c | 10 +++--- 3 files changed, 12 insertions(+), 31 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 05/23] target/arm: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:03, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- hw/intc/arm_gicv3_cpuif_common.c | 5 + target/arm/cpu.c | 19 +-- target/arm/debug_helper.c| 8 ++-- target/arm/gdbstub.c | 6 ++ target/arm/gdbstub64.c | 6 ++ target/arm/helper.c | 9 +++-- target/arm/hvf/hvf.c | 12 target/arm/kvm.c | 3 +-- target/arm/ptw.c | 3 +-- target/arm/tcg/cpu32.c | 3 +-- 10 files changed, 22 insertions(+), 52 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 04/23] target/alpha: Prefer fast cpu_env() over slower CPU QOM cast macro
On 1/27/24 08:03, Philippe Mathieu-Daudé wrote: Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé --- target/alpha/cpu.c| 31 +++ target/alpha/gdbstub.c| 6 ++ target/alpha/helper.c | 12 target/alpha/mem_helper.c | 11 +++ 4 files changed, 16 insertions(+), 44 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 03/23] bulk: Call in place single use cpu_env()
On 1/27/24 08:03, Philippe Mathieu-Daudé wrote:
Avoid CPUArchState local variable when cpu_env() is used once.
Mechanical patch using the following Coccinelle spatch script:
@@
type CPUArchState;
identifier env;
expression cs;
@@
{
-CPUArchState *env = cpu_env(cs);
... when != env
- env
+ cpu_env(cs)
... when != env
}
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/cpu-exec.c | 3 +--
linux-user/i386/cpu_loop.c | 4 ++--
target/hppa/mem_helper.c | 3 +--
target/hppa/translate.c | 3 +--
target/i386/nvmm/nvmm-all.c | 6 ++
target/i386/whpx/whpx-all.c | 18 ++
target/loongarch/tcg/translate.c | 3 +--
target/rx/translate.c| 3 +--
target/sh4/op_helper.c | 4 +---
9 files changed, 16 insertions(+), 31 deletions(-)
Reviewed-by: Richard Henderson
r~
Re: [PATCH v2 01/23] hw/acpi/cpu: Use CPUState typedef
On 1/27/24 08:03, Philippe Mathieu-Daudé wrote: QEMU coding style recommend using structure typedefs: https://www.qemu.org/docs/master/devel/style.html#typedefs Signed-off-by: Philippe Mathieu-Daudé --- include/hw/acpi/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson r~
Re: [PATCH] target/arm: Reinstate "vfp" property on AArch32 CPUs
On 1/27/24 05:34, Peter Maydell wrote:
In commit 4315f7c614743 we restructured the logic for creating the
VFP related properties to avoid testing the aa32_simd_r32 feature on
AArch64 CPUs. However in the process we accidentally stopped
exposing the "vfp" QOM property on AArch32 TCG CPUs.
This mostly hasn't had any ill effects because not many people want
to disable VFP, but it wasn't intentional. Reinstate the property.
Cc:qemu-sta...@nongnu.org
Fixes: 4315f7c614743 ("target/arm: Restructure has_vfp_d32 test")
Resolves:https://gitlab.com/qemu-project/qemu/-/issues/2098
Signed-off-by: Peter Maydell
---
target/arm/cpu.c | 4
1 file changed, 4 insertions(+)
Reviewed-by: Richard Henderson
r~
Re: [PATCH] {linux,bsd}-user: Fail mmap() if size doesn't fit into host's size_t
On 1/26/24 06:07, Ilya Leoshkevich wrote:
s390x's branch-relative-long test fails with the following error
message on 32-bit hosts:
qemu-s390x: ../accel/tcg/user-exec.c:493: page_set_flags: Assertion `last
<= GUEST_ADDR_MAX' failed.
The root cause is that the size passed to mmap() by this test does not
fit into 32 bits and gets truncated. Since there is no chance for such
mmap() to succeed, detect this condition and fail the mmap() right away.
Signed-off-by: Ilya Leoshkevich
---
bsd-user/mmap.c | 4
linux-user/mmap.c | 4
2 files changed, 8 insertions(+)
diff --git a/bsd-user/mmap.c b/bsd-user/mmap.c
index 3ef11b28079..5dc327d0ad3 100644
--- a/bsd-user/mmap.c
+++ b/bsd-user/mmap.c
@@ -256,6 +256,10 @@ static abi_ulong mmap_find_vma_aligned(abi_ulong start,
abi_ulong size,
size = HOST_PAGE_ALIGN(size);
+if (size != (size_t)size) {
+return (abi_ulong)(-1);
+}
+
I have this same fix in
https://lore.kernel.org/qemu-devel/20240102015808.132373-18-richard.hender...@linaro.org/
so as far as that's concerned,
Reviewed-by: Richard Henderson
But perhaps you got cast your eye across the larger reorg,
https://lore.kernel.org/qemu-devel/20240102015808.132373-1-richard.hender...@linaro.org/
?
r~
Re: [PATCH 0/2] Enable -Wvla, forbidding use of variable length arrays
On 1/26/24 03:32, Peter Maydell wrote: Peter Maydell (2): tests/qtest/xlnx-versal-trng-test.c: Drop use of variable length array meson: Enable -Wvla Reviewed-by: Richard Henderson r~
Re: [PATCH] target/arm: Add ID_AA64ZFR0_EL1.B16B16 to the exposed-to-userspace set
On 1/25/24 23:43, Peter Maydell wrote:
In kernel commit 5d5b4e8c2d9ec ("arm64/sve: Report FEAT_SVE_B16B16 to
userspace") Linux added ID_AA64ZFR0_el1.B16B16 to the set of ID
register fields which it exposes to userspace. Update our
exported_bits mask to include this.
(This doesn't yet change any behaviour for us, because we don't yet
have any CPUs that implement this feature, which is part of SVE2.)
Signed-off-by: Peter Maydell
---
This is a loose end from last year: in commit 5f7b71fb99dc I
updated our mask values to match the kernel, and when I was
doing that I noticed that the kernel had forgotten to add
B16B16 to its report-to-userspace list when adding support
for that architectural feature. Now the kernel has fixed its
side, we can update again to match it.
---
target/arm/helper.c | 1 +
tests/tcg/aarch64/sysregs.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Richard Henderson
r~
Re: [PATCH v2 1/2] target/s390x: Emulate CVDG
On 1/25/24 22:29, Ilya Leoshkevich wrote: CVDG is the same as CVD, except that it converts 64 bits into 128, rather than 32 into 64. Create a new helper, which uses Int128 wrappers. Reported-by: Ido Plat Signed-off-by: Ilya Leoshkevich --- target/s390x/helper.h| 1 + target/s390x/tcg/insn-data.h.inc | 1 + target/s390x/tcg/int_helper.c| 21 + target/s390x/tcg/translate.c | 8 4 files changed, 31 insertions(+) Reviewed-by: Richard Henderson r~
Re: [PATCH v6 0/4] accel/tcg: Move perf and debuginfo support to tcg
On 1/25/24 15:46, Philippe Mathieu-Daudé wrote:
Since v5:
- Use v4 instead of v3...
- Rebased on commit 53e8868d69
("meson: remove OS definitions from config_targetos")
Ilya Leoshkevich (4):
accel/tcg: Make use of qemu_target_page_mask() in perf.c
tcg: Make tb_cflags() usable from target-agnostic code
accel/tcg: Remove #ifdef TARGET_I386 from perf.c
accel/tcg: Move perf and debuginfo support to tcg/
Reviewed-by: Richard Henderson
r~
Re: hexagon: modeling a shared lock state
On 1/26/24 02:28, Brian Cain wrote:
static void do_hwlock(CPUHexagonState *env, bool *lock)
{
bql_lock();
if (*lock) {
env->hwlock_pending = true;
cs->halted = true;
cs->exception_index = EXCP_HALTED;
bql_unlock();
cpu_loop_exit(cs);
In place of the above - we have cpu_interrupt(cs, CPU_INTERRUPT_HALT) -- but is
that equivalent?
No, it is not. Raising an interrupt will not take effect immediately.
Is there one idiom that's preferred over another? Somehow it seems simpler if
we don't need to longjmp and IIRC some of these patterns do.
You need the longjmp to halt and stop execution without completing the current insn, so
that the insn can be restarted later.
Oh! Just remembered. You'll want cpu_loop_exit_restore() there, so that pc is updated
properly. Better to unwind in the contended case than require the pc be updated along the
fast path uncontended case.
r~
Re: [PULL 00/17] aspeed queue
Hello Cedric, Sure, Let me check. On 1/26/24 10:48, Cédric Le Goater wrote: On 1/26/24 16:56, Peter Maydell wrote: On Fri, 26 Jan 2024 at 13:33, Cédric Le Goater wrote: The following changes since commit e029fe22caad9b75c7ab69bd4e84853c11fb71e0: Merge tag 'pull-qapi-2024-01-26' of https://repo.or.cz/qemu/armbru into staging (2024-01-26 10:21:27 +) are available in the Git repository at: https://github.com/legoater/qemu/ tags/pull-aspeed-20240126 for you to fetch changes up to b40769f4b49d15485ffaaa7acade3e3593ee6daa: hw/fsi: Update MAINTAINER list (2024-01-26 14:22:08 +0100) aspeed queue: * Update of buildroot images to 2023.11 (6.6.3 kernel) * Check of the valid CPU type supported by aspeed machines * Simplified models for the IBM's FSI bus and the Aspeed controller bridge Looks like you have an endianness bug, either in the device or in the test. From the s390 runner: https://gitlab.com/qemu-project/qemu/-/jobs/6029422595 232/847 qemu:qtest+qtest-arm / qtest-arm/aspeed-fsi-test ERROR 0.38s killed by signal 6 SIGABRT PYTHON=/home/gitlab-runner/builds/-LCfcJ2T/0/qemu-project/qemu/build/pyvenv/bin/python3 QTEST_QEMU_STORAGE_DAEMON_BINARY=./storage-daemon/qemu-storage-daemon QTEST_QEMU_BINARY=./qemu-system-arm G_TEST_DBUS_DAEMON=/home/gitlab-runner/builds/-LCfcJ2T/0/qemu-project/qemu/tests/dbus-vmstate-daemon.sh MALLOC_PERTURB_=82 QTEST_QEMU_IMG=./qemu-img /home/gitlab-runner/builds/-LCfcJ2T/0/qemu-project/qemu/build/tests/qtest/aspeed-fsi-test --tap -k ― ✀ ― stderr: ** ERROR:../tests/qtest/aspeed-fsi-test.c:152:test_fsi0_getcfam_addr0: assertion failed (curval == 0x152d02c0): (3221368085 == 355271360) (test program exited with status code -6) where 3221368085 is 0xC0022D15, and 355271360 is 0x152D02C0... drat. Indeed. I didn't check BE ... Sorry about that. Ninad, Some changes are required in fsi_aspeed_apb2opb_write(). Could you please rework the address space accesses to use address_space_*_le() routines instead of address_space_rw() ? This will be less concise. To check, you can use a PPC64 debian (big-endian) on a PPC64 KVM guest or PowerVM LPAR, or a s390x LPAR. Thanks, C.
[PATCH 2/5] migration/multifd: Move multifd_socket_ops to socket.c
Code movement only.
Signed-off-by: Fabiano Rosas
---
migration/multifd.c | 59 ---
migration/multifd.h | 2 ++
migration/socket.c | 61 -
3 files changed, 62 insertions(+), 60 deletions(-)
diff --git a/migration/multifd.c b/migration/multifd.c
index 2968649500..d82775ade9 100644
--- a/migration/multifd.c
+++ b/migration/multifd.c
@@ -45,65 +45,6 @@ typedef struct {
uint64_t unused2[4];/* Reserved for future use */
} __attribute__((packed)) MultiFDInit_t;
-static int multifd_socket_send_setup(MultiFDSendParams *p, Error **errp)
-{
-return 0;
-}
-
-static void multifd_socket_send_cleanup(MultiFDSendParams *p, Error **errp)
-{
-return;
-}
-
-static int multifd_socket_send_prepare(MultiFDSendParams *p, Error **errp)
-{
-MultiFDPages_t *pages = p->pages;
-
-for (int i = 0; i < p->normal_num; i++) {
-p->iov[p->iovs_num].iov_base = pages->block->host + p->normal[i];
-p->iov[p->iovs_num].iov_len = p->page_size;
-p->iovs_num++;
-}
-
-p->next_packet_size = p->normal_num * p->page_size;
-p->flags |= MULTIFD_FLAG_NOCOMP;
-return 0;
-}
-
-static int multifd_socket_recv_setup(MultiFDRecvParams *p, Error **errp)
-{
-return 0;
-}
-
-static void multifd_socket_recv_cleanup(MultiFDRecvParams *p)
-{
-}
-
-static int multifd_socket_recv_pages(MultiFDRecvParams *p, Error **errp)
-{
-uint32_t flags = p->flags & MULTIFD_FLAG_COMPRESSION_MASK;
-
-if (flags != MULTIFD_FLAG_NOCOMP) {
-error_setg(errp, "multifd %u: flags received %x flags expected %x",
- p->id, flags, MULTIFD_FLAG_NOCOMP);
-return -1;
-}
-for (int i = 0; i < p->normal_num; i++) {
-p->iov[i].iov_base = p->host + p->normal[i];
-p->iov[i].iov_len = p->page_size;
-}
-return qio_channel_readv_all(p->c, p->iov, p->normal_num, errp);
-}
-
-static MultiFDMethods multifd_socket_ops = {
-.send_setup = multifd_socket_send_setup,
-.send_cleanup = multifd_socket_send_cleanup,
-.send_prepare = multifd_socket_send_prepare,
-.recv_setup = multifd_socket_recv_setup,
-.recv_cleanup = multifd_socket_recv_cleanup,
-.recv_pages = multifd_socket_recv_pages
-};
-
static MultiFDMethods *multifd_compression_ops[MULTIFD_COMPRESSION__MAX] = {0};
static MultiFDMethods *multifd_get_ops(void)
diff --git a/migration/multifd.h b/migration/multifd.h
index 4630baccd4..6261002524 100644
--- a/migration/multifd.h
+++ b/migration/multifd.h
@@ -204,6 +204,8 @@ typedef struct {
int (*recv_pages)(MultiFDRecvParams *p, Error **errp);
} MultiFDMethods;
+extern MultiFDMethods multifd_socket_ops;
+
void multifd_register_compression(int method, MultiFDMethods *ops);
#endif
diff --git a/migration/socket.c b/migration/socket.c
index 98e3ea1514..7e1371e598 100644
--- a/migration/socket.c
+++ b/migration/socket.c
@@ -16,12 +16,13 @@
#include "qemu/osdep.h"
#include "qemu/cutils.h"
-
+#include "exec/ramblock.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "channel.h"
#include "socket.h"
#include "migration.h"
+#include "multifd.h"
#include "qemu-file.h"
#include "io/channel-socket.h"
#include "io/net-listener.h"
@@ -202,3 +203,61 @@ void socket_start_incoming_migration(SocketAddress *saddr,
}
}
+static int multifd_socket_send_setup(MultiFDSendParams *p, Error **errp)
+{
+return 0;
+}
+
+static void multifd_socket_send_cleanup(MultiFDSendParams *p, Error **errp)
+{
+return;
+}
+
+static int multifd_socket_send_prepare(MultiFDSendParams *p, Error **errp)
+{
+MultiFDPages_t *pages = p->pages;
+
+for (int i = 0; i < p->normal_num; i++) {
+p->iov[p->iovs_num].iov_base = pages->block->host + p->normal[i];
+p->iov[p->iovs_num].iov_len = p->page_size;
+p->iovs_num++;
+}
+
+p->next_packet_size = p->normal_num * p->page_size;
+p->flags |= MULTIFD_FLAG_NOCOMP;
+return 0;
+}
+
+static int multifd_socket_recv_setup(MultiFDRecvParams *p, Error **errp)
+{
+return 0;
+}
+
+static void multifd_socket_recv_cleanup(MultiFDRecvParams *p)
+{
+}
+
+static int multifd_socket_recv_pages(MultiFDRecvParams *p, Error **errp)
+{
+uint32_t flags = p->flags & MULTIFD_FLAG_COMPRESSION_MASK;
+
+if (flags != MULTIFD_FLAG_NOCOMP) {
+error_setg(errp, "multifd %u: flags received %x flags expected %x",
+ p->id, flags, MULTIFD_FLAG_NOCOMP);
+return -1;
+}
+for (int i = 0; i < p->normal_num; i++) {
+p->iov[i].iov_base = p->host + p->normal[i];
+p->iov[i].iov_len = p->page_size;
+}
+return qio_channel_readv_all(p->c, p->iov, p->normal_num, errp);
+}
+
+MultiFDMethods multifd_socket_ops = {
+.send_setup = multifd_socket_send_setup,
+.send_cleanup = multifd_socket_send_cleanup,
+.send_prepare = multifd_socket_send_prepare,
+.recv_setup = multifd_socket_recv_setup,
+.recv_cleanup =
[PATCH 5/5] migration/multifd: Move zero copy flag into multifd_socket_setup
The generic multifd save setup code should not be responsible for
deciding how the client code is going to send the data. Since the zero
copy feature is supported only by the socket migration, move the
setting of the flag into the socket specific function.
Signed-off-by: Fabiano Rosas
---
migration/multifd.c | 7 +--
migration/socket.c | 4
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/migration/multifd.c b/migration/multifd.c
index 358a4dbf8f..16d02a4aac 100644
--- a/migration/multifd.c
+++ b/migration/multifd.c
@@ -817,12 +817,7 @@ int multifd_save_setup(Error **errp)
p->normal = g_new0(ram_addr_t, page_count);
p->page_size = qemu_target_page_size();
p->page_count = page_count;
-
-if (migrate_zero_copy_send()) {
-p->write_flags = QIO_CHANNEL_WRITE_FLAG_ZERO_COPY;
-} else {
-p->write_flags = 0;
-}
+p->write_flags = 0;
multifd_new_send_channel_create(p);
}
diff --git a/migration/socket.c b/migration/socket.c
index af22ff7cc4..e9d0a5235c 100644
--- a/migration/socket.c
+++ b/migration/socket.c
@@ -206,6 +206,10 @@ void socket_start_incoming_migration(SocketAddress *saddr,
static int multifd_socket_send_setup(MultiFDSendParams *p, Error **errp)
{
+if (migrate_zero_copy_send()) {
+p->write_flags |= QIO_CHANNEL_WRITE_FLAG_ZERO_COPY;
+}
+
return 0;
}
--
2.35.3
[PATCH 3/5] migration/multifd: Add multifd_ops->send
The zero page feature is not supported by the compression methods. It
is exclusive to the socket migration. Add a 'send' hook so we can move
that complexity into a multifd_socket_send() function.
Signed-off-by: Fabiano Rosas
---
migration/multifd-zlib.c | 10 ++
migration/multifd-zstd.c | 10 ++
migration/multifd.c | 18 ++
migration/multifd.h | 1 +
migration/socket.c | 22 ++
5 files changed, 45 insertions(+), 16 deletions(-)
diff --git a/migration/multifd-zlib.c b/migration/multifd-zlib.c
index d89163e975..0859efa60f 100644
--- a/migration/multifd-zlib.c
+++ b/migration/multifd-zlib.c
@@ -174,6 +174,15 @@ static int zlib_send_prepare(MultiFDSendParams *p, Error
**errp)
return 0;
}
+static int zlib_send(MultiFDSendParams *p, Error **errp)
+{
+p->iov[0].iov_len = p->packet_len;
+p->iov[0].iov_base = p->packet;
+
+return qio_channel_writev_full_all(p->c, p->iov, p->iovs_num, NULL,
+ 0, p->write_flags, errp);
+}
+
/**
* zlib_recv_setup: setup receive side
*
@@ -312,6 +321,7 @@ static MultiFDMethods multifd_zlib_ops = {
.send_setup = zlib_send_setup,
.send_cleanup = zlib_send_cleanup,
.send_prepare = zlib_send_prepare,
+.send = zlib_send,
.recv_setup = zlib_recv_setup,
.recv_cleanup = zlib_recv_cleanup,
.recv_pages = zlib_recv_pages
diff --git a/migration/multifd-zstd.c b/migration/multifd-zstd.c
index a90788540e..ca0fc79fdd 100644
--- a/migration/multifd-zstd.c
+++ b/migration/multifd-zstd.c
@@ -163,6 +163,15 @@ static int zstd_send_prepare(MultiFDSendParams *p, Error
**errp)
return 0;
}
+static int zstd_send(MultiFDSendParams *p, Error **errp)
+{
+p->iov[0].iov_len = p->packet_len;
+p->iov[0].iov_base = p->packet;
+
+return qio_channel_writev_full_all(p->c, p->iov, p->iovs_num, NULL,
+ 0, p->write_flags, errp);
+}
+
/**
* zstd_recv_setup: setup receive side
*
@@ -303,6 +312,7 @@ static MultiFDMethods multifd_zstd_ops = {
.send_setup = zstd_send_setup,
.send_cleanup = zstd_send_cleanup,
.send_prepare = zstd_send_prepare,
+.send = zstd_send,
.recv_setup = zstd_recv_setup,
.recv_cleanup = zstd_recv_cleanup,
.recv_pages = zstd_recv_pages
diff --git a/migration/multifd.c b/migration/multifd.c
index d82775ade9..9f509699c2 100644
--- a/migration/multifd.c
+++ b/migration/multifd.c
@@ -604,22 +604,8 @@ static void *multifd_send_thread(void *opaque)
trace_multifd_send(p->id, packet_num, p->normal_num, flags,
p->next_packet_size);
-if (use_zero_copy_send) {
-/* Send header first, without zerocopy */
-ret = qio_channel_write_all(p->c, (void *)p->packet,
-p->packet_len, _err);
-if (ret != 0) {
-break;
-}
-} else {
-/* Send header using the same writev call */
-p->iov[0].iov_len = p->packet_len;
-p->iov[0].iov_base = p->packet;
-}
-
-ret = qio_channel_writev_full_all(p->c, p->iov, p->iovs_num, NULL,
- 0, p->write_flags, _err);
-if (ret != 0) {
+ret = multifd_send_state->ops->send(p, _err);
+if (ret) {
break;
}
diff --git a/migration/multifd.h b/migration/multifd.h
index 6261002524..0c4cf2d315 100644
--- a/migration/multifd.h
+++ b/migration/multifd.h
@@ -196,6 +196,7 @@ typedef struct {
void (*send_cleanup)(MultiFDSendParams *p, Error **errp);
/* Prepare the send packet */
int (*send_prepare)(MultiFDSendParams *p, Error **errp);
+int (*send)(MultiFDSendParams *p, Error **errp);
/* Setup for receiving side */
int (*recv_setup)(MultiFDRecvParams *p, Error **errp);
/* Cleanup for receiving side */
diff --git a/migration/socket.c b/migration/socket.c
index 7e1371e598..608f30975e 100644
--- a/migration/socket.c
+++ b/migration/socket.c
@@ -228,6 +228,27 @@ static int multifd_socket_send_prepare(MultiFDSendParams
*p, Error **errp)
return 0;
}
+static int multifd_socket_send(MultiFDSendParams *p, Error **errp)
+{
+int ret;
+
+if (migrate_zero_copy_send()) {
+/* Send header first, without zerocopy */
+ret = qio_channel_write_all(p->c, (void *)p->packet, p->packet_len,
+errp);
+if (ret) {
+return ret;
+}
+} else {
+/* Send header using the same writev call */
+p->iov[0].iov_len = p->packet_len;
+p->iov[0].iov_base = p->packet;
+}
+
+return qio_channel_writev_full_all(p->c, p->iov, p->iovs_num, NULL,
+ 0, p->write_flags, errp);
+}
+
static int
[PATCH 0/5] migration/multifd: Prerequisite cleanups for ongoing work
Hi, Here are two cleanups that are prerequiste for the fixed-ram work, but also affect the other series on the list at the moment, so I want to make sure it works for everyone: 1) Separate multifd_ops from compression. The multifd_ops are currently coupled with the multifd_compression parameter. We're adding new multifd_ops in the fixed-ram work and adding new compression ops in the compression work. 2) Add a new send hook. The multifd_send_thread code currently does some twists to support zero copy, which is a socket-only feature. This might affect the zero page and DSA work which add code to multifd_send_thread. CI run: https://gitlab.com/farosas/qemu/-/pipelines/1154332360 (I also tested zero copy locally. We cannot add a test for it because it needs root due to memory locking limits) Fabiano Rosas (5): migration/multifd: Separate compression ops from non-compression migration/multifd: Move multifd_socket_ops to socket.c migration/multifd: Add multifd_ops->send migration/multifd: Simplify zero copy send migration/multifd: Move zero copy flag into multifd_socket_setup migration/multifd-zlib.c | 9 ++- migration/multifd-zstd.c | 9 ++- migration/multifd.c | 164 +-- migration/multifd.h | 6 +- migration/socket.c | 90 - 5 files changed, 128 insertions(+), 150 deletions(-) -- 2.35.3
[PATCH 4/5] migration/multifd: Simplify zero copy send
During the multifd send phase, the multifd packet header is included
as the first element of the iovec, except in the special case of a
socket migration with zero copy enabled. In that case the packet
header is sent separately. To avoid the first position of the iovec
being empty, we play with the p->iovs_num value to make sure
send_prepare() fills the iovec from the correct position depending on
whether the header is at the first position or not.
This is confusing at first sight and could be made simpler if we
always put the header at the first position in the iovec and advance
the iovec pointer when sending with zero copy. That way we can keep
that logic restricted to the socket code.
Signed-off-by: Fabiano Rosas
---
migration/multifd-zlib.c | 3 ---
migration/multifd-zstd.c | 3 ---
migration/multifd.c | 11 +--
migration/socket.c | 19 +++
4 files changed, 16 insertions(+), 20 deletions(-)
diff --git a/migration/multifd-zlib.c b/migration/multifd-zlib.c
index 0859efa60f..af6ef96670 100644
--- a/migration/multifd-zlib.c
+++ b/migration/multifd-zlib.c
@@ -176,9 +176,6 @@ static int zlib_send_prepare(MultiFDSendParams *p, Error
**errp)
static int zlib_send(MultiFDSendParams *p, Error **errp)
{
-p->iov[0].iov_len = p->packet_len;
-p->iov[0].iov_base = p->packet;
-
return qio_channel_writev_full_all(p->c, p->iov, p->iovs_num, NULL,
0, p->write_flags, errp);
}
diff --git a/migration/multifd-zstd.c b/migration/multifd-zstd.c
index ca0fc79fdd..6d533eaa54 100644
--- a/migration/multifd-zstd.c
+++ b/migration/multifd-zstd.c
@@ -165,9 +165,6 @@ static int zstd_send_prepare(MultiFDSendParams *p, Error
**errp)
static int zstd_send(MultiFDSendParams *p, Error **errp)
{
-p->iov[0].iov_len = p->packet_len;
-p->iov[0].iov_base = p->packet;
-
return qio_channel_writev_full_all(p->c, p->iov, p->iovs_num, NULL,
0, p->write_flags, errp);
}
diff --git a/migration/multifd.c b/migration/multifd.c
index 9f509699c2..358a4dbf8f 100644
--- a/migration/multifd.c
+++ b/migration/multifd.c
@@ -171,6 +171,9 @@ static void multifd_send_fill_packet(MultiFDSendParams *p)
packet->offset[i] = cpu_to_be64(temp);
}
+
+p->iov[0].iov_len = p->packet_len;
+p->iov[0].iov_base = p->packet;
}
static int multifd_recv_unfill_packet(MultiFDRecvParams *p, Error **errp)
@@ -546,7 +549,6 @@ static void *multifd_send_thread(void *opaque)
MigrationThread *thread = NULL;
Error *local_err = NULL;
int ret = 0;
-bool use_zero_copy_send = migrate_zero_copy_send();
thread = migration_threads_add(p->name, qemu_get_thread_id());
@@ -574,11 +576,8 @@ static void *multifd_send_thread(void *opaque)
uint32_t flags;
p->normal_num = 0;
-if (use_zero_copy_send) {
-p->iovs_num = 0;
-} else {
-p->iovs_num = 1;
-}
+/* The header is always added to the vector */
+p->iovs_num = 1;
for (int i = 0; i < p->pages->num; i++) {
p->normal[p->normal_num] = p->pages->offset[i];
diff --git a/migration/socket.c b/migration/socket.c
index 608f30975e..af22ff7cc4 100644
--- a/migration/socket.c
+++ b/migration/socket.c
@@ -16,6 +16,7 @@
#include "qemu/osdep.h"
#include "qemu/cutils.h"
+#include "qemu/iov.h"
#include "exec/ramblock.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
@@ -230,22 +231,24 @@ static int multifd_socket_send_prepare(MultiFDSendParams
*p, Error **errp)
static int multifd_socket_send(MultiFDSendParams *p, Error **errp)
{
+struct iovec *iov = p->iov;
int ret;
if (migrate_zero_copy_send()) {
-/* Send header first, without zerocopy */
-ret = qio_channel_write_all(p->c, (void *)p->packet, p->packet_len,
-errp);
+/*
+ * The first iovec element is always the header. Sent it first
+ * without zerocopy.
+ */
+ret = qio_channel_writev_all(p->c, iov, 1, errp);
if (ret) {
return ret;
}
-} else {
-/* Send header using the same writev call */
-p->iov[0].iov_len = p->packet_len;
-p->iov[0].iov_base = p->packet;
+
+/* header sent, discard it */
+iov_discard_front(, >iovs_num, iov[0].iov_len);
}
-return qio_channel_writev_full_all(p->c, p->iov, p->iovs_num, NULL,
+return qio_channel_writev_full_all(p->c, iov, p->iovs_num, NULL,
0, p->write_flags, errp);
}
--
2.35.3
[PATCH 1/5] migration/multifd: Separate compression ops from non-compression
For multifd we currently choose exclusively between migration using
compression or migration without compression. The compression method
is chosen via the multifd_compression parameter (none, zlib,
zstd). We've been using the 'none' value to mean the regular socket
migration.
Rename the 'multifd_ops' array to 'multifd_compression_ops' and move
the 'nocomp_multifd_ops' out of it. We don't need to have the
non-compression methods in an array because they are not registered
dynamically and cannot be compiled out like the compression code.
Rename the 'nocomp' functions to 'multifd_socket' and remove the
comments which are useless IMHO. Next patch moves the functions into a
socket specific file.
Signed-off-by: Fabiano Rosas
---
migration/multifd-zlib.c | 2 +-
migration/multifd-zstd.c | 2 +-
migration/multifd.c | 109 +++
migration/multifd.h | 3 +-
4 files changed, 34 insertions(+), 82 deletions(-)
diff --git a/migration/multifd-zlib.c b/migration/multifd-zlib.c
index 37ce48621e..d89163e975 100644
--- a/migration/multifd-zlib.c
+++ b/migration/multifd-zlib.c
@@ -319,7 +319,7 @@ static MultiFDMethods multifd_zlib_ops = {
static void multifd_zlib_register(void)
{
-multifd_register_ops(MULTIFD_COMPRESSION_ZLIB, _zlib_ops);
+multifd_register_compression(MULTIFD_COMPRESSION_ZLIB, _zlib_ops);
}
migration_init(multifd_zlib_register);
diff --git a/migration/multifd-zstd.c b/migration/multifd-zstd.c
index b471daadcd..a90788540e 100644
--- a/migration/multifd-zstd.c
+++ b/migration/multifd-zstd.c
@@ -310,7 +310,7 @@ static MultiFDMethods multifd_zstd_ops = {
static void multifd_zstd_register(void)
{
-multifd_register_ops(MULTIFD_COMPRESSION_ZSTD, _zstd_ops);
+multifd_register_compression(MULTIFD_COMPRESSION_ZSTD, _zstd_ops);
}
migration_init(multifd_zstd_register);
diff --git a/migration/multifd.c b/migration/multifd.c
index 25cbc6dc6b..2968649500 100644
--- a/migration/multifd.c
+++ b/migration/multifd.c
@@ -45,48 +45,17 @@ typedef struct {
uint64_t unused2[4];/* Reserved for future use */
} __attribute__((packed)) MultiFDInit_t;
-/* Multifd without compression */
-
-/**
- * nocomp_send_setup: setup send side
- *
- * For no compression this function does nothing.
- *
- * Returns 0 for success or -1 for error
- *
- * @p: Params for the channel that we are using
- * @errp: pointer to an error
- */
-static int nocomp_send_setup(MultiFDSendParams *p, Error **errp)
+static int multifd_socket_send_setup(MultiFDSendParams *p, Error **errp)
{
return 0;
}
-/**
- * nocomp_send_cleanup: cleanup send side
- *
- * For no compression this function does nothing.
- *
- * @p: Params for the channel that we are using
- * @errp: pointer to an error
- */
-static void nocomp_send_cleanup(MultiFDSendParams *p, Error **errp)
+static void multifd_socket_send_cleanup(MultiFDSendParams *p, Error **errp)
{
return;
}
-/**
- * nocomp_send_prepare: prepare date to be able to send
- *
- * For no compression we just have to calculate the size of the
- * packet.
- *
- * Returns 0 for success or -1 for error
- *
- * @p: Params for the channel that we are using
- * @errp: pointer to an error
- */
-static int nocomp_send_prepare(MultiFDSendParams *p, Error **errp)
+static int multifd_socket_send_prepare(MultiFDSendParams *p, Error **errp)
{
MultiFDPages_t *pages = p->pages;
@@ -101,43 +70,16 @@ static int nocomp_send_prepare(MultiFDSendParams *p, Error
**errp)
return 0;
}
-/**
- * nocomp_recv_setup: setup receive side
- *
- * For no compression this function does nothing.
- *
- * Returns 0 for success or -1 for error
- *
- * @p: Params for the channel that we are using
- * @errp: pointer to an error
- */
-static int nocomp_recv_setup(MultiFDRecvParams *p, Error **errp)
+static int multifd_socket_recv_setup(MultiFDRecvParams *p, Error **errp)
{
return 0;
}
-/**
- * nocomp_recv_cleanup: setup receive side
- *
- * For no compression this function does nothing.
- *
- * @p: Params for the channel that we are using
- */
-static void nocomp_recv_cleanup(MultiFDRecvParams *p)
+static void multifd_socket_recv_cleanup(MultiFDRecvParams *p)
{
}
-/**
- * nocomp_recv_pages: read the data from the channel into actual pages
- *
- * For no compression we just need to read things into the correct place.
- *
- * Returns 0 for success or -1 for error
- *
- * @p: Params for the channel that we are using
- * @errp: pointer to an error
- */
-static int nocomp_recv_pages(MultiFDRecvParams *p, Error **errp)
+static int multifd_socket_recv_pages(MultiFDRecvParams *p, Error **errp)
{
uint32_t flags = p->flags & MULTIFD_FLAG_COMPRESSION_MASK;
@@ -153,23 +95,34 @@ static int nocomp_recv_pages(MultiFDRecvParams *p, Error
**errp)
return qio_channel_readv_all(p->c, p->iov, p->normal_num, errp);
}
-static MultiFDMethods multifd_nocomp_ops = {
-.send_setup = nocomp_send_setup,
-.send_cleanup =
[PATCH v2 21/23] target/tricore: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/tricore/cpu.c | 20
target/tricore/gdbstub.c | 6 ++
target/tricore/helper.c| 3 +--
target/tricore/translate.c | 3 +--
4 files changed, 8 insertions(+), 24 deletions(-)
diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
index 8acacdf0c0..7f0609090c 100644
--- a/target/tricore/cpu.c
+++ b/target/tricore/cpu.c
@@ -36,38 +36,26 @@ static const gchar *tricore_gdb_arch_name(CPUState *cs)
static void tricore_cpu_set_pc(CPUState *cs, vaddr value)
{
-TriCoreCPU *cpu = TRICORE_CPU(cs);
-CPUTriCoreState *env = >env;
-
-env->PC = value & ~(target_ulong)1;
+cpu_env(cs)->PC = value & ~(target_ulong)1;
}
static vaddr tricore_cpu_get_pc(CPUState *cs)
{
-TriCoreCPU *cpu = TRICORE_CPU(cs);
-CPUTriCoreState *env = >env;
-
-return env->PC;
+return cpu_env(cs)->PC;
}
static void tricore_cpu_synchronize_from_tb(CPUState *cs,
const TranslationBlock *tb)
{
-TriCoreCPU *cpu = TRICORE_CPU(cs);
-CPUTriCoreState *env = >env;
-
tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL));
-env->PC = tb->pc;
+cpu_env(cs)->PC = tb->pc;
}
static void tricore_restore_state_to_opc(CPUState *cs,
const TranslationBlock *tb,
const uint64_t *data)
{
-TriCoreCPU *cpu = TRICORE_CPU(cs);
-CPUTriCoreState *env = >env;
-
-env->PC = data[0];
+cpu_env(cs)->PC = data[0];
}
static void tricore_cpu_reset_hold(Object *obj)
diff --git a/target/tricore/gdbstub.c b/target/tricore/gdbstub.c
index e8f8e5e6ea..f9309c5e27 100644
--- a/target/tricore/gdbstub.c
+++ b/target/tricore/gdbstub.c
@@ -106,8 +106,7 @@ static void tricore_cpu_gdb_write_csfr(CPUTriCoreState
*env, int n,
int tricore_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
-TriCoreCPU *cpu = TRICORE_CPU(cs);
-CPUTriCoreState *env = >env;
+CPUTriCoreState *env = cpu_env(cs);
if (n < 16) { /* data registers */
return gdb_get_reg32(mem_buf, env->gpr_d[n]);
@@ -121,8 +120,7 @@ int tricore_cpu_gdb_read_register(CPUState *cs, GByteArray
*mem_buf, int n)
int tricore_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
-TriCoreCPU *cpu = TRICORE_CPU(cs);
-CPUTriCoreState *env = >env;
+CPUTriCoreState *env = cpu_env(cs);
uint32_t tmp;
tmp = ldl_p(mem_buf);
diff --git a/target/tricore/helper.c b/target/tricore/helper.c
index 174f666e1e..d328414c99 100644
--- a/target/tricore/helper.c
+++ b/target/tricore/helper.c
@@ -67,8 +67,7 @@ bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
MMUAccessType rw, int mmu_idx,
bool probe, uintptr_t retaddr)
{
-TriCoreCPU *cpu = TRICORE_CPU(cs);
-CPUTriCoreState *env = >env;
+CPUTriCoreState *env = cpu_env(cs);
hwaddr physical;
int prot;
int ret = 0;
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index 66553d1be0..ad314bdf3c 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -95,8 +95,7 @@ enum {
void tricore_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
-TriCoreCPU *cpu = TRICORE_CPU(cs);
-CPUTriCoreState *env = >env;
+CPUTriCoreState *env = cpu_env(cs);
uint32_t psw;
int i;
--
2.41.0
[PATCH v2 03/23] bulk: Call in place single use cpu_env()
Avoid CPUArchState local variable when cpu_env() is used once.
Mechanical patch using the following Coccinelle spatch script:
@@
type CPUArchState;
identifier env;
expression cs;
@@
{
-CPUArchState *env = cpu_env(cs);
... when != env
- env
+ cpu_env(cs)
... when != env
}
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/cpu-exec.c | 3 +--
linux-user/i386/cpu_loop.c | 4 ++--
target/hppa/mem_helper.c | 3 +--
target/hppa/translate.c | 3 +--
target/i386/nvmm/nvmm-all.c | 6 ++
target/i386/whpx/whpx-all.c | 18 ++
target/loongarch/tcg/translate.c | 3 +--
target/rx/translate.c| 3 +--
target/sh4/op_helper.c | 4 +---
9 files changed, 16 insertions(+), 31 deletions(-)
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 67eda9865e..86206484f8 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -445,7 +445,6 @@ const void *HELPER(lookup_tb_ptr)(CPUArchState *env)
static inline TranslationBlock * QEMU_DISABLE_CFI
cpu_tb_exec(CPUState *cpu, TranslationBlock *itb, int *tb_exit)
{
-CPUArchState *env = cpu_env(cpu);
uintptr_t ret;
TranslationBlock *last_tb;
const void *tb_ptr = itb->tc.ptr;
@@ -455,7 +454,7 @@ cpu_tb_exec(CPUState *cpu, TranslationBlock *itb, int
*tb_exit)
}
qemu_thread_jit_execute();
-ret = tcg_qemu_tb_exec(env, tb_ptr);
+ret = tcg_qemu_tb_exec(cpu_env(cpu), tb_ptr);
cpu->neg.can_do_io = true;
qemu_plugin_disable_mem_helpers(cpu);
/*
diff --git a/linux-user/i386/cpu_loop.c b/linux-user/i386/cpu_loop.c
index 42ecb4bf0a..92beb6830c 100644
--- a/linux-user/i386/cpu_loop.c
+++ b/linux-user/i386/cpu_loop.c
@@ -323,8 +323,8 @@ void cpu_loop(CPUX86State *env)
static void target_cpu_free(void *obj)
{
-CPUArchState *env = cpu_env(obj);
-target_munmap(env->gdt.base, sizeof(uint64_t) * TARGET_GDT_ENTRIES);
+target_munmap(cpu_env(obj)->gdt.base,
+ sizeof(uint64_t) * TARGET_GDT_ENTRIES);
g_free(obj);
}
diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c
index 4fcc612754..bb85962d50 100644
--- a/target/hppa/mem_helper.c
+++ b/target/hppa/mem_helper.c
@@ -518,7 +518,6 @@ void HELPER(iitlbt_pa20)(CPUHPPAState *env, target_ulong
r1, target_ulong r2)
/* Purge (Insn/Data) TLB. */
static void ptlb_work(CPUState *cpu, run_on_cpu_data data)
{
-CPUHPPAState *env = cpu_env(cpu);
vaddr start = data.target_ptr;
vaddr end;
@@ -532,7 +531,7 @@ static void ptlb_work(CPUState *cpu, run_on_cpu_data data)
end = (vaddr)TARGET_PAGE_SIZE << (2 * end);
end = start + end - 1;
-hppa_flush_tlb_range(env, start, end);
+hppa_flush_tlb_range(cpu_env(cpu), start, end);
}
/* This is local to the current cpu. */
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 3ef39b1bd7..5735335254 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -3805,8 +3805,7 @@ static bool trans_b_gate(DisasContext *ctx, arg_b_gate *a)
#ifndef CONFIG_USER_ONLY
if (ctx->tb_flags & PSW_C) {
-CPUHPPAState *env = cpu_env(ctx->cs);
-int type = hppa_artype_for_page(env, ctx->base.pc_next);
+int type = hppa_artype_for_page(cpu_env(ctx->cs), ctx->base.pc_next);
/* If we could not find a TLB entry, then we need to generate an
ITLB miss exception so the kernel will provide it.
The resulting TLB fill operation will invalidate this TB and
diff --git a/target/i386/nvmm/nvmm-all.c b/target/i386/nvmm/nvmm-all.c
index cfdca91123..49a3a3b916 100644
--- a/target/i386/nvmm/nvmm-all.c
+++ b/target/i386/nvmm/nvmm-all.c
@@ -340,7 +340,6 @@ nvmm_get_registers(CPUState *cpu)
static bool
nvmm_can_take_int(CPUState *cpu)
{
-CPUX86State *env = cpu_env(cpu);
AccelCPUState *qcpu = cpu->accel;
struct nvmm_vcpu *vcpu = >vcpu;
struct nvmm_machine *mach = get_nvmm_mach();
@@ -349,7 +348,7 @@ nvmm_can_take_int(CPUState *cpu)
return false;
}
-if (qcpu->int_shadow || !(env->eflags & IF_MASK)) {
+if (qcpu->int_shadow || !(cpu_env(cpu)->eflags & IF_MASK)) {
struct nvmm_x64_state *state = vcpu->state;
/* Exit on interrupt window. */
@@ -645,13 +644,12 @@ static int
nvmm_handle_halted(struct nvmm_machine *mach, CPUState *cpu,
struct nvmm_vcpu_exit *exit)
{
-CPUX86State *env = cpu_env(cpu);
int ret = 0;
bql_lock();
if (!((cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
- (env->eflags & IF_MASK)) &&
+ (cpu_env(cpu)->eflags & IF_MASK)) &&
!(cpu->interrupt_request & CPU_INTERRUPT_NMI)) {
cpu->exception_index = EXCP_HLT;
cpu->halted = true;
diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c
index a7262654ac..31eec7048c 100644
--- a/target/i386/whpx/whpx-all.c
+++ b/target/i386/whpx/whpx-all.c
@@ -300,7 +300,6 @@ static SegmentCache
[PATCH v2 20/23] target/sh4: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/sh4/cpu.c | 15 +--
target/sh4/gdbstub.c | 6 ++
target/sh4/helper.c| 11 +++
target/sh4/translate.c | 3 +--
4 files changed, 11 insertions(+), 24 deletions(-)
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index 806a0ef875..786c77615e 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -71,8 +71,7 @@ static void superh_restore_state_to_opc(CPUState *cs,
static bool superh_io_recompile_replay_branch(CPUState *cs,
const TranslationBlock *tb)
{
-SuperHCPU *cpu = SUPERH_CPU(cs);
-CPUSH4State *env = >env;
+CPUSH4State *env = cpu_env(cs);
if ((env->flags & (TB_FLAG_DELAY_SLOT | TB_FLAG_DELAY_SLOT_COND))
&& !(cs->tcg_cflags & CF_PCREL) && env->pc != tb->pc) {
@@ -144,8 +143,7 @@ out:
static void sh7750r_cpu_initfn(Object *obj)
{
-SuperHCPU *cpu = SUPERH_CPU(obj);
-CPUSH4State *env = >env;
+CPUSH4State *env = cpu_env(CPU(obj));
env->id = SH_CPU_SH7750R;
env->features = SH_FEATURE_BCR3_AND_BCR4;
@@ -162,8 +160,7 @@ static void sh7750r_class_init(ObjectClass *oc, void *data)
static void sh7751r_cpu_initfn(Object *obj)
{
-SuperHCPU *cpu = SUPERH_CPU(obj);
-CPUSH4State *env = >env;
+CPUSH4State *env = cpu_env(CPU(obj));
env->id = SH_CPU_SH7751R;
env->features = SH_FEATURE_BCR3_AND_BCR4;
@@ -180,8 +177,7 @@ static void sh7751r_class_init(ObjectClass *oc, void *data)
static void sh7785_cpu_initfn(Object *obj)
{
-SuperHCPU *cpu = SUPERH_CPU(obj);
-CPUSH4State *env = >env;
+CPUSH4State *env = cpu_env(CPU(obj));
env->id = SH_CPU_SH7785;
env->features = SH_FEATURE_SH4A;
@@ -216,8 +212,7 @@ static void superh_cpu_realizefn(DeviceState *dev, Error
**errp)
static void superh_cpu_initfn(Object *obj)
{
-SuperHCPU *cpu = SUPERH_CPU(obj);
-CPUSH4State *env = >env;
+CPUSH4State *env = cpu_env(CPU(obj));
env->movcal_backup_tail = &(env->movcal_backup);
}
diff --git a/target/sh4/gdbstub.c b/target/sh4/gdbstub.c
index d8e199fc06..75926d4e04 100644
--- a/target/sh4/gdbstub.c
+++ b/target/sh4/gdbstub.c
@@ -26,8 +26,7 @@
int superh_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
-SuperHCPU *cpu = SUPERH_CPU(cs);
-CPUSH4State *env = >env;
+CPUSH4State *env = cpu_env(cs);
switch (n) {
case 0 ... 7:
@@ -76,8 +75,7 @@ int superh_cpu_gdb_read_register(CPUState *cs, GByteArray
*mem_buf, int n)
int superh_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
-SuperHCPU *cpu = SUPERH_CPU(cs);
-CPUSH4State *env = >env;
+CPUSH4State *env = cpu_env(cs);
switch (n) {
case 0 ... 7:
diff --git a/target/sh4/helper.c b/target/sh4/helper.c
index 5a6f653c12..28b81a5c54 100644
--- a/target/sh4/helper.c
+++ b/target/sh4/helper.c
@@ -55,8 +55,7 @@ int cpu_sh4_is_cached(CPUSH4State *env, target_ulong addr)
void superh_cpu_do_interrupt(CPUState *cs)
{
-SuperHCPU *cpu = SUPERH_CPU(cs);
-CPUSH4State *env = >env;
+CPUSH4State *env = cpu_env(cs);
int do_irq = cs->interrupt_request & CPU_INTERRUPT_HARD;
int do_exp, irq_vector = cs->exception_index;
@@ -782,11 +781,8 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr)
bool superh_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
if (interrupt_request & CPU_INTERRUPT_HARD) {
-SuperHCPU *cpu = SUPERH_CPU(cs);
-CPUSH4State *env = >env;
-
/* Delay slots are indivisible, ignore interrupts */
-if (env->flags & TB_FLAG_DELAY_SLOT_MASK) {
+if (cpu_env(cs)->flags & TB_FLAG_DELAY_SLOT_MASK) {
return false;
} else {
superh_cpu_do_interrupt(cs);
@@ -800,8 +796,7 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr)
{
-SuperHCPU *cpu = SUPERH_CPU(cs);
-CPUSH4State *env = >env;
+CPUSH4State *env = cpu_env(cs);
int ret;
target_ulong physical;
diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index 81f825f125..4a933adad8 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -159,8 +159,7 @@ void sh4_translate_init(void)
void superh_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
-SuperHCPU *cpu = SUPERH_CPU(cs);
-CPUSH4State *env = >env;
+CPUSH4State *env = cpu_env(cs);
int i;
qemu_fprintf(f, "pc=0x%08x sr=0x%08x pr=0x%08x fpscr=0x%08x\n",
--
2.41.0
[PATCH v2 16/23] target/ppc: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ppc/mpc8544_guts.c | 3 +--
hw/ppc/pnv.c | 3 +--
hw/ppc/pnv_xscom.c| 5 +
hw/ppc/ppce500_spin.c | 3 +--
hw/ppc/spapr.c| 3 +--
hw/ppc/spapr_caps.c | 6 ++
target/ppc/cpu_init.c | 11 +++
target/ppc/excp_helper.c | 3 +--
target/ppc/gdbstub.c | 12
target/ppc/kvm.c | 6 ++
target/ppc/ppc-qmp-cmds.c | 3 +--
target/ppc/user_only_helper.c | 3 +--
12 files changed, 19 insertions(+), 42 deletions(-)
diff --git a/hw/ppc/mpc8544_guts.c b/hw/ppc/mpc8544_guts.c
index a26e83d048..e3540b0281 100644
--- a/hw/ppc/mpc8544_guts.c
+++ b/hw/ppc/mpc8544_guts.c
@@ -71,8 +71,7 @@ static uint64_t mpc8544_guts_read(void *opaque, hwaddr addr,
unsigned size)
{
uint32_t value = 0;
-PowerPCCPU *cpu = POWERPC_CPU(current_cpu);
-CPUPPCState *env = >env;
+CPUPPCState *env = cpu_env(current_cpu);
addr &= MPC8544_GUTS_MMIO_SIZE - 1;
switch (addr) {
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 0297871bdd..a202b377e1 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -2294,8 +2294,7 @@ static void pnv_machine_set_hb(Object *obj, bool value,
Error **errp)
static void pnv_cpu_do_nmi_on_cpu(CPUState *cs, run_on_cpu_data arg)
{
-PowerPCCPU *cpu = POWERPC_CPU(cs);
-CPUPPCState *env = >env;
+CPUPPCState *env = cpu_env(cs);
cpu_synchronize_state(cs);
ppc_cpu_do_system_reset(cs);
diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c
index 805b1d0c87..a17816d072 100644
--- a/hw/ppc/pnv_xscom.c
+++ b/hw/ppc/pnv_xscom.c
@@ -44,15 +44,12 @@ static void xscom_complete(CPUState *cs, uint64_t hmer_bits)
* passed for the cpu, and no CPU completion is generated.
*/
if (cs) {
-PowerPCCPU *cpu = POWERPC_CPU(cs);
-CPUPPCState *env = >env;
-
/*
* TODO: Need a CPU helper to set HMER, also handle generation
* of HMIs
*/
cpu_synchronize_state(cs);
-env->spr[SPR_HMER] |= hmer_bits;
+cpu_env(cs)->spr[SPR_HMER] |= hmer_bits;
}
}
diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c
index bbce63e8a4..dfbe759481 100644
--- a/hw/ppc/ppce500_spin.c
+++ b/hw/ppc/ppce500_spin.c
@@ -90,8 +90,7 @@ static void mmubooke_create_initial_mapping(CPUPPCState *env,
static void spin_kick(CPUState *cs, run_on_cpu_data data)
{
-PowerPCCPU *cpu = POWERPC_CPU(cs);
-CPUPPCState *env = >env;
+CPUPPCState *env = cpu_env(cs);
SpinInfo *curspin = data.host_ptr;
hwaddr map_size = 64 * MiB;
hwaddr map_start;
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index e8dabc8614..d7edfc2a1a 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -3487,8 +3487,7 @@ static void spapr_machine_finalizefn(Object *obj)
void spapr_do_system_reset_on_cpu(CPUState *cs, run_on_cpu_data arg)
{
SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
-PowerPCCPU *cpu = POWERPC_CPU(cs);
-CPUPPCState *env = >env;
+CPUPPCState *env = cpu_env(cs);
cpu_synchronize_state(cs);
/* If FWNMI is inactive, addr will be -1, which will deliver to 0x100 */
diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c
index e889244e52..39edec0f84 100644
--- a/hw/ppc/spapr_caps.c
+++ b/hw/ppc/spapr_caps.c
@@ -194,8 +194,7 @@ static void cap_htm_apply(SpaprMachineState *spapr, uint8_t
val, Error **errp)
static void cap_vsx_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
{
ERRP_GUARD();
-PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
-CPUPPCState *env = >env;
+CPUPPCState *env = cpu_env(first_cpu);
if (!val) {
/* TODO: We don't support disabling vsx yet */
@@ -213,8 +212,7 @@ static void cap_vsx_apply(SpaprMachineState *spapr, uint8_t
val, Error **errp)
static void cap_dfp_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
{
ERRP_GUARD();
-PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
-CPUPPCState *env = >env;
+CPUPPCState *env = cpu_env(first_cpu);
if (!val) {
/* TODO: We don't support disabling dfp yet */
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 344196a8ce..f39f426fa9 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7195,12 +7195,9 @@ static void ppc_cpu_reset_hold(Object *obj)
static bool ppc_cpu_is_big_endian(CPUState *cs)
{
-PowerPCCPU *cpu = POWERPC_CPU(cs);
-CPUPPCState *env = >env;
-
cpu_synchronize_state(cs);
-return !FIELD_EX64(env->msr, MSR, LE);
+return !FIELD_EX64(cpu_env(cs)->msr, MSR, LE);
}
static bool ppc_get_irq_stats(InterruptStatsProvider *obj,
@@ -7287,8 +7284,7 @@ static bool ppc_pvr_match_default(PowerPCCPUClass *pcc,
uint32_t pvr, bool best)
static void ppc_disas_set_info(CPUState *cs,
[PATCH v2 04/23] target/alpha: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/alpha/cpu.c| 31 +++
target/alpha/gdbstub.c| 6 ++
target/alpha/helper.c | 12
target/alpha/mem_helper.c | 11 +++
4 files changed, 16 insertions(+), 44 deletions(-)
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index b8ed29e343..e21a8936c7 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -130,40 +130,27 @@ static ObjectClass *alpha_cpu_class_by_name(const char
*cpu_model)
static void ev4_cpu_initfn(Object *obj)
{
-AlphaCPU *cpu = ALPHA_CPU(obj);
-CPUAlphaState *env = >env;
-
-env->implver = IMPLVER_2106x;
+cpu_env(CPU(obj))->implver = IMPLVER_2106x;
}
static void ev5_cpu_initfn(Object *obj)
{
-AlphaCPU *cpu = ALPHA_CPU(obj);
-CPUAlphaState *env = >env;
-
-env->implver = IMPLVER_21164;
+cpu_env(CPU(obj))->implver = IMPLVER_21164;
}
static void ev56_cpu_initfn(Object *obj)
{
-AlphaCPU *cpu = ALPHA_CPU(obj);
-CPUAlphaState *env = >env;
-
-env->amask |= AMASK_BWX;
+cpu_env(CPU(obj))->amask |= AMASK_BWX;
}
static void pca56_cpu_initfn(Object *obj)
{
-AlphaCPU *cpu = ALPHA_CPU(obj);
-CPUAlphaState *env = >env;
-
-env->amask |= AMASK_MVI;
+cpu_env(CPU(obj))->amask |= AMASK_MVI;
}
static void ev6_cpu_initfn(Object *obj)
{
-AlphaCPU *cpu = ALPHA_CPU(obj);
-CPUAlphaState *env = >env;
+CPUAlphaState *env = cpu_env(CPU(obj));
env->implver = IMPLVER_21264;
env->amask = AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_TRAP;
@@ -171,16 +158,12 @@ static void ev6_cpu_initfn(Object *obj)
static void ev67_cpu_initfn(Object *obj)
{
-AlphaCPU *cpu = ALPHA_CPU(obj);
-CPUAlphaState *env = >env;
-
-env->amask |= AMASK_CIX | AMASK_PREFETCH;
+cpu_env(CPU(obj))->amask |= AMASK_CIX | AMASK_PREFETCH;
}
static void alpha_cpu_initfn(Object *obj)
{
-AlphaCPU *cpu = ALPHA_CPU(obj);
-CPUAlphaState *env = >env;
+CPUAlphaState *env = cpu_env(CPU(obj));
env->lock_addr = -1;
#if defined(CONFIG_USER_ONLY)
diff --git a/target/alpha/gdbstub.c b/target/alpha/gdbstub.c
index 0f8fa150f8..13694fd321 100644
--- a/target/alpha/gdbstub.c
+++ b/target/alpha/gdbstub.c
@@ -23,8 +23,7 @@
int alpha_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
-AlphaCPU *cpu = ALPHA_CPU(cs);
-CPUAlphaState *env = >env;
+CPUAlphaState *env = cpu_env(cs);
uint64_t val;
CPU_DoubleU d;
@@ -59,8 +58,7 @@ int alpha_cpu_gdb_read_register(CPUState *cs, GByteArray
*mem_buf, int n)
int alpha_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
-AlphaCPU *cpu = ALPHA_CPU(cs);
-CPUAlphaState *env = >env;
+CPUAlphaState *env = cpu_env(cs);
target_ulong tmp = ldtul_p(mem_buf);
CPU_DoubleU d;
diff --git a/target/alpha/helper.c b/target/alpha/helper.c
index 970c869771..eeed874e5a 100644
--- a/target/alpha/helper.c
+++ b/target/alpha/helper.c
@@ -298,8 +298,7 @@ bool alpha_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr)
{
-AlphaCPU *cpu = ALPHA_CPU(cs);
-CPUAlphaState *env = >env;
+CPUAlphaState *env = cpu_env(cs);
target_ulong phys;
int prot, fail;
@@ -325,8 +324,7 @@ bool alpha_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
void alpha_cpu_do_interrupt(CPUState *cs)
{
-AlphaCPU *cpu = ALPHA_CPU(cs);
-CPUAlphaState *env = >env;
+CPUAlphaState *env = cpu_env(cs);
int i = cs->exception_index;
if (qemu_loglevel_mask(CPU_LOG_INT)) {
@@ -435,8 +433,7 @@ void alpha_cpu_do_interrupt(CPUState *cs)
bool alpha_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
-AlphaCPU *cpu = ALPHA_CPU(cs);
-CPUAlphaState *env = >env;
+CPUAlphaState *env = cpu_env(cs);
int idx = -1;
/* We never take interrupts while in PALmode. */
@@ -487,8 +484,7 @@ void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags)
"a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
"t10", "t11", "ra", "t12", "at", "gp", "sp"
};
-AlphaCPU *cpu = ALPHA_CPU(cs);
-CPUAlphaState *env = >env;
+CPUAlphaState *env = cpu_env(cs);
int i;
qemu_fprintf(f, "PC " TARGET_FMT_lx " PS %02x\n",
diff --git a/target/alpha/mem_helper.c b/target/alpha/mem_helper.c
index a39b52c5dd..872955f5e7 100644
--- a/target/alpha/mem_helper.c
+++ b/target/alpha/mem_helper.c
@@ -42,18 +42,14 @@ static void do_unaligned_access(CPUAlphaState *env, vaddr
addr, uintptr_t retadd
void alpha_cpu_record_sigbus(CPUState *cs, vaddr addr,
MMUAccessType access_type, uintptr_t retaddr)
{
-AlphaCPU *cpu = ALPHA_CPU(cs);
-CPUAlphaState *env = >env;
-
-do_unaligned_access(env, addr, retaddr);
+
[PATCH v2 23/23] target/sparc: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/sparc/cpu.c | 14 --
target/sparc/gdbstub.c | 3 +--
target/sparc/int32_helper.c | 3 +--
target/sparc/int64_helper.c | 3 +--
target/sparc/ldst_helper.c | 6 ++
target/sparc/mmu_helper.c | 15 +--
target/sparc/translate.c| 3 +--
7 files changed, 15 insertions(+), 32 deletions(-)
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index befa7fc4eb..a53c200d8b 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -83,8 +83,7 @@ static void sparc_cpu_reset_hold(Object *obj)
static bool sparc_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
if (interrupt_request & CPU_INTERRUPT_HARD) {
-SPARCCPU *cpu = SPARC_CPU(cs);
-CPUSPARCState *env = >env;
+CPUSPARCState *env = cpu_env(cs);
if (cpu_interrupts_enabled(env) && env->interrupt_index > 0) {
int pil = env->interrupt_index & 0xf;
@@ -613,8 +612,7 @@ static void cpu_print_cc(FILE *f, uint32_t cc)
static void sparc_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
-SPARCCPU *cpu = SPARC_CPU(cs);
-CPUSPARCState *env = >env;
+CPUSPARCState *env = cpu_env(cs);
int i, x;
qemu_fprintf(f, "pc: " TARGET_FMT_lx " npc: " TARGET_FMT_lx "\n", env->pc,
@@ -711,11 +709,8 @@ static void sparc_cpu_synchronize_from_tb(CPUState *cs,
static bool sparc_cpu_has_work(CPUState *cs)
{
-SPARCCPU *cpu = SPARC_CPU(cs);
-CPUSPARCState *env = >env;
-
return (cs->interrupt_request & CPU_INTERRUPT_HARD) &&
- cpu_interrupts_enabled(env);
+ cpu_interrupts_enabled(cpu_env(cs));
}
static char *sparc_cpu_type_name(const char *cpu_model)
@@ -749,8 +744,7 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error
**errp)
CPUState *cs = CPU(dev);
SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(dev);
Error *local_err = NULL;
-SPARCCPU *cpu = SPARC_CPU(dev);
-CPUSPARCState *env = >env;
+CPUSPARCState *env = cpu_env(cs);
#if defined(CONFIG_USER_ONLY)
/* We are emulating the kernel, which will trap and emulate float128. */
diff --git a/target/sparc/gdbstub.c b/target/sparc/gdbstub.c
index a1c8fdc4d5..5257c49a0d 100644
--- a/target/sparc/gdbstub.c
+++ b/target/sparc/gdbstub.c
@@ -29,8 +29,7 @@
int sparc_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
-SPARCCPU *cpu = SPARC_CPU(cs);
-CPUSPARCState *env = >env;
+CPUSPARCState *env = cpu_env(cs);
if (n < 8) {
/* g0..g7 */
diff --git a/target/sparc/int32_helper.c b/target/sparc/int32_helper.c
index 058dd712b5..6b7d65b031 100644
--- a/target/sparc/int32_helper.c
+++ b/target/sparc/int32_helper.c
@@ -99,8 +99,7 @@ void cpu_check_irqs(CPUSPARCState *env)
void sparc_cpu_do_interrupt(CPUState *cs)
{
-SPARCCPU *cpu = SPARC_CPU(cs);
-CPUSPARCState *env = >env;
+CPUSPARCState *env = cpu_env(cs);
int cwp, intno = cs->exception_index;
if (qemu_loglevel_mask(CPU_LOG_INT)) {
diff --git a/target/sparc/int64_helper.c b/target/sparc/int64_helper.c
index 27df9dba89..bd14c7a0db 100644
--- a/target/sparc/int64_helper.c
+++ b/target/sparc/int64_helper.c
@@ -130,8 +130,7 @@ void cpu_check_irqs(CPUSPARCState *env)
void sparc_cpu_do_interrupt(CPUState *cs)
{
-SPARCCPU *cpu = SPARC_CPU(cs);
-CPUSPARCState *env = >env;
+CPUSPARCState *env = cpu_env(cs);
int intno = cs->exception_index;
trap_state *tsptr;
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index 09066d5487..203441bfb2 100644
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper.c
@@ -421,8 +421,7 @@ static void sparc_raise_mmu_fault(CPUState *cs, hwaddr addr,
bool is_write, bool is_exec, int is_asi,
unsigned size, uintptr_t retaddr)
{
-SPARCCPU *cpu = SPARC_CPU(cs);
-CPUSPARCState *env = >env;
+CPUSPARCState *env = cpu_env(cs);
int fault_type;
#ifdef DEBUG_UNASSIGNED
@@ -483,8 +482,7 @@ static void sparc_raise_mmu_fault(CPUState *cs, hwaddr addr,
bool is_write, bool is_exec, int is_asi,
unsigned size, uintptr_t retaddr)
{
-SPARCCPU *cpu = SPARC_CPU(cs);
-CPUSPARCState *env = >env;
+CPUSPARCState *env = cpu_env(cs);
#ifdef DEBUG_UNASSIGNED
printf("Unassigned mem access to " HWADDR_FMT_plx " from " TARGET_FMT_lx
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index 453498c670..a05ee22315 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
@@ -206,8 +206,7 @@ bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr)
{
-SPARCCPU *cpu = SPARC_CPU(cs);
-
[PATCH v2 22/23] target/xtensa: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/xtensa/dbg_helper.c | 3 +--
target/xtensa/exc_helper.c | 3 +--
target/xtensa/gdbstub.c| 6 ++
target/xtensa/helper.c | 9 +++--
target/xtensa/translate.c | 3 +--
5 files changed, 8 insertions(+), 16 deletions(-)
diff --git a/target/xtensa/dbg_helper.c b/target/xtensa/dbg_helper.c
index 497dafca71..5546c82ecd 100644
--- a/target/xtensa/dbg_helper.c
+++ b/target/xtensa/dbg_helper.c
@@ -66,8 +66,7 @@ void HELPER(wsr_ibreaka)(CPUXtensaState *env, uint32_t i,
uint32_t v)
bool xtensa_debug_check_breakpoint(CPUState *cs)
{
-XtensaCPU *cpu = XTENSA_CPU(cs);
-CPUXtensaState *env = >env;
+CPUXtensaState *env = cpu_env(cs);
unsigned int i;
if (xtensa_get_cintlevel(env) >= env->config->debug_level) {
diff --git a/target/xtensa/exc_helper.c b/target/xtensa/exc_helper.c
index 168419a505..0514c2c1f3 100644
--- a/target/xtensa/exc_helper.c
+++ b/target/xtensa/exc_helper.c
@@ -205,8 +205,7 @@ static void handle_interrupt(CPUXtensaState *env)
/* Called from cpu_handle_interrupt with BQL held */
void xtensa_cpu_do_interrupt(CPUState *cs)
{
-XtensaCPU *cpu = XTENSA_CPU(cs);
-CPUXtensaState *env = >env;
+CPUXtensaState *env = cpu_env(cs);
if (cs->exception_index == EXC_IRQ) {
qemu_log_mask(CPU_LOG_INT,
diff --git a/target/xtensa/gdbstub.c b/target/xtensa/gdbstub.c
index 4b3bfb7e59..4748fb6532 100644
--- a/target/xtensa/gdbstub.c
+++ b/target/xtensa/gdbstub.c
@@ -65,8 +65,7 @@ void xtensa_count_regs(const XtensaConfig *config,
int xtensa_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
-XtensaCPU *cpu = XTENSA_CPU(cs);
-CPUXtensaState *env = >env;
+CPUXtensaState *env = cpu_env(cs);
const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
#ifdef CONFIG_USER_ONLY
int num_regs = env->config->gdb_regmap.num_core_regs;
@@ -120,8 +119,7 @@ int xtensa_cpu_gdb_read_register(CPUState *cs, GByteArray
*mem_buf, int n)
int xtensa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
-XtensaCPU *cpu = XTENSA_CPU(cs);
-CPUXtensaState *env = >env;
+CPUXtensaState *env = cpu_env(cs);
uint32_t tmp;
const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
#ifdef CONFIG_USER_ONLY
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index a9f8907083..ca214b948a 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -217,8 +217,7 @@ static uint32_t check_hw_breakpoints(CPUXtensaState *env)
void xtensa_breakpoint_handler(CPUState *cs)
{
-XtensaCPU *cpu = XTENSA_CPU(cs);
-CPUXtensaState *env = >env;
+CPUXtensaState *env = cpu_env(cs);
if (cs->watchpoint_hit) {
if (cs->watchpoint_hit->flags & BP_CPU) {
@@ -266,8 +265,7 @@ bool xtensa_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr)
{
-XtensaCPU *cpu = XTENSA_CPU(cs);
-CPUXtensaState *env = >env;
+CPUXtensaState *env = cpu_env(cs);
uint32_t paddr;
uint32_t page_size;
unsigned access;
@@ -297,8 +295,7 @@ void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr
physaddr, vaddr addr,
int mmu_idx, MemTxAttrs attrs,
MemTxResult response, uintptr_t retaddr)
{
-XtensaCPU *cpu = XTENSA_CPU(cs);
-CPUXtensaState *env = >env;
+CPUXtensaState *env = cpu_env(cs);
cpu_restore_state(cs, retaddr);
HELPER(exception_cause_vaddr)(env, env->pc,
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index 87947236ca..426dcb6169 100644
--- a/target/xtensa/translate.c
+++ b/target/xtensa/translate.c
@@ -1248,8 +1248,7 @@ void gen_intermediate_code(CPUState *cpu,
TranslationBlock *tb, int *max_insns,
void xtensa_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
-XtensaCPU *cpu = XTENSA_CPU(cs);
-CPUXtensaState *env = >env;
+CPUXtensaState *env = cpu_env(cs);
xtensa_isa isa = env->config->isa;
int i, j;
--
2.41.0
[PATCH v2 10/23] target/i386: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/i386/hvf/vmx.h | 13 +++---
hw/i386/vmmouse.c | 6 ++---
hw/i386/xen/xen-hvm.c | 3 +--
target/i386/arch_memory_mapping.c | 3 +--
target/i386/cpu-dump.c | 3 +--
target/i386/cpu.c | 37 +--
target/i386/helper.c| 39 -
target/i386/hvf/hvf.c | 8 ++
target/i386/hvf/x86.c | 4 +--
target/i386/hvf/x86_emu.c | 6 ++---
target/i386/hvf/x86_task.c | 10 +++-
target/i386/hvf/x86hvf.c| 6 ++---
target/i386/kvm/kvm.c | 6 ++---
target/i386/kvm/xen-emu.c | 32 ---
target/i386/tcg/sysemu/bpt_helper.c | 3 +--
target/i386/tcg/tcg-cpu.c | 14 +++
target/i386/tcg/user/excp_helper.c | 3 +--
target/i386/tcg/user/seg_helper.c | 3 +--
18 files changed, 59 insertions(+), 140 deletions(-)
diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h
index 0fffcfa46c..1ad042269b 100644
--- a/target/i386/hvf/vmx.h
+++ b/target/i386/hvf/vmx.h
@@ -175,8 +175,7 @@ static inline void macvm_set_cr4(hv_vcpuid_t vcpu, uint64_t
cr4)
static inline void macvm_set_rip(CPUState *cpu, uint64_t rip)
{
-X86CPU *x86_cpu = X86_CPU(cpu);
-CPUX86State *env = _cpu->env;
+CPUX86State *env = cpu_env(cpu);
uint64_t val;
/* BUG, should take considering overlap.. */
@@ -196,10 +195,7 @@ static inline void macvm_set_rip(CPUState *cpu, uint64_t
rip)
static inline void vmx_clear_nmi_blocking(CPUState *cpu)
{
-X86CPU *x86_cpu = X86_CPU(cpu);
-CPUX86State *env = _cpu->env;
-
-env->hflags2 &= ~HF2_NMI_MASK;
+cpu_env(cpu)->hflags2 &= ~HF2_NMI_MASK;
uint32_t gi = (uint32_t) rvmcs(cpu->accel->fd,
VMCS_GUEST_INTERRUPTIBILITY);
gi &= ~VMCS_INTERRUPTIBILITY_NMI_BLOCKING;
wvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY, gi);
@@ -207,10 +203,7 @@ static inline void vmx_clear_nmi_blocking(CPUState *cpu)
static inline void vmx_set_nmi_blocking(CPUState *cpu)
{
-X86CPU *x86_cpu = X86_CPU(cpu);
-CPUX86State *env = _cpu->env;
-
-env->hflags2 |= HF2_NMI_MASK;
+cpu_env(cpu)->hflags2 |= HF2_NMI_MASK;
uint32_t gi = (uint32_t)rvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY);
gi |= VMCS_INTERRUPTIBILITY_NMI_BLOCKING;
wvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY, gi);
diff --git a/hw/i386/vmmouse.c b/hw/i386/vmmouse.c
index a8d014d09a..f292a14a15 100644
--- a/hw/i386/vmmouse.c
+++ b/hw/i386/vmmouse.c
@@ -74,8 +74,7 @@ struct VMMouseState {
static void vmmouse_get_data(uint32_t *data)
{
-X86CPU *cpu = X86_CPU(current_cpu);
-CPUX86State *env = >env;
+CPUX86State *env = cpu_env(current_cpu);
data[0] = env->regs[R_EAX]; data[1] = env->regs[R_EBX];
data[2] = env->regs[R_ECX]; data[3] = env->regs[R_EDX];
@@ -84,8 +83,7 @@ static void vmmouse_get_data(uint32_t *data)
static void vmmouse_set_data(const uint32_t *data)
{
-X86CPU *cpu = X86_CPU(current_cpu);
-CPUX86State *env = >env;
+CPUX86State *env = cpu_env(current_cpu);
env->regs[R_EAX] = data[0]; env->regs[R_EBX] = data[1];
env->regs[R_ECX] = data[2]; env->regs[R_EDX] = data[3];
diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c
index f42621e674..61e5060117 100644
--- a/hw/i386/xen/xen-hvm.c
+++ b/hw/i386/xen/xen-hvm.c
@@ -487,8 +487,7 @@ static void regs_to_cpu(vmware_regs_t *vmport_regs, ioreq_t
*req)
static void regs_from_cpu(vmware_regs_t *vmport_regs)
{
-X86CPU *cpu = X86_CPU(current_cpu);
-CPUX86State *env = >env;
+CPUX86State *env = cpu_env(current_cpu);
vmport_regs->ebx = env->regs[R_EBX];
vmport_regs->ecx = env->regs[R_ECX];
diff --git a/target/i386/arch_memory_mapping.c
b/target/i386/arch_memory_mapping.c
index d1ff659128..c0604d5956 100644
--- a/target/i386/arch_memory_mapping.c
+++ b/target/i386/arch_memory_mapping.c
@@ -269,8 +269,7 @@ static void walk_pml5e(MemoryMappingList *list,
AddressSpace *as,
bool x86_cpu_get_memory_mapping(CPUState *cs, MemoryMappingList *list,
Error **errp)
{
-X86CPU *cpu = X86_CPU(cs);
-CPUX86State *env = >env;
+CPUX86State *env = cpu_env(cs);
int32_t a20_mask;
if (!cpu_paging_enabled(cs)) {
diff --git a/target/i386/cpu-dump.c b/target/i386/cpu-dump.c
index 40697064d9..5459d84abd 100644
--- a/target/i386/cpu-dump.c
+++ b/target/i386/cpu-dump.c
@@ -343,8 +343,7 @@ void x86_cpu_dump_local_apic_state(CPUState *cs, int flags)
void x86_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
-X86CPU *cpu = X86_CPU(cs);
-CPUX86State *env = >env;
+CPUX86State *env = cpu_env(cs);
int eflags, i, nb;
char cc_op_name[32];
static const char *seg_name[6] = { "ES", "CS",
[PATCH v2 07/23] target/cris: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/cris/cpu.c | 5 +
target/cris/gdbstub.c | 9 +++--
target/cris/helper.c| 12
target/cris/translate.c | 3 +--
4 files changed, 9 insertions(+), 20 deletions(-)
diff --git a/target/cris/cpu.c b/target/cris/cpu.c
index 9ba08e8b0c..8ec32fade8 100644
--- a/target/cris/cpu.c
+++ b/target/cris/cpu.c
@@ -142,10 +142,7 @@ static void cris_cpu_set_irq(void *opaque, int irq, int
level)
static void cris_disas_set_info(CPUState *cpu, disassemble_info *info)
{
-CRISCPU *cc = CRIS_CPU(cpu);
-CPUCRISState *env = >env;
-
-if (env->pregs[PR_VR] != 32) {
+if (cpu_env(cpu)->pregs[PR_VR] != 32) {
info->mach = bfd_mach_cris_v0_v10;
info->print_insn = print_insn_crisv10;
} else {
diff --git a/target/cris/gdbstub.c b/target/cris/gdbstub.c
index 25c0ca33a5..9e87069da8 100644
--- a/target/cris/gdbstub.c
+++ b/target/cris/gdbstub.c
@@ -23,8 +23,7 @@
int crisv10_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
-CRISCPU *cpu = CRIS_CPU(cs);
-CPUCRISState *env = >env;
+CPUCRISState *env = cpu_env(cs);
if (n < 15) {
return gdb_get_reg32(mem_buf, env->regs[n]);
@@ -55,8 +54,7 @@ int crisv10_cpu_gdb_read_register(CPUState *cs, GByteArray
*mem_buf, int n)
int cris_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
-CRISCPU *cpu = CRIS_CPU(cs);
-CPUCRISState *env = >env;
+CPUCRISState *env = cpu_env(cs);
uint8_t srs;
srs = env->pregs[PR_SRS];
@@ -90,8 +88,7 @@ int cris_cpu_gdb_read_register(CPUState *cs, GByteArray
*mem_buf, int n)
int cris_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
-CRISCPU *cpu = CRIS_CPU(cs);
-CPUCRISState *env = >env;
+CPUCRISState *env = cpu_env(cs);
uint32_t tmp;
if (n > 49) {
diff --git a/target/cris/helper.c b/target/cris/helper.c
index c0bf987e3e..1c3f86876f 100644
--- a/target/cris/helper.c
+++ b/target/cris/helper.c
@@ -53,8 +53,7 @@ bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr)
{
-CRISCPU *cpu = CRIS_CPU(cs);
-CPUCRISState *env = >env;
+CPUCRISState *env = cpu_env(cs);
struct cris_mmu_result res;
int prot, miss;
target_ulong phy;
@@ -97,8 +96,7 @@ bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
void crisv10_cpu_do_interrupt(CPUState *cs)
{
-CRISCPU *cpu = CRIS_CPU(cs);
-CPUCRISState *env = >env;
+CPUCRISState *env = cpu_env(cs);
int ex_vec = -1;
D_LOG("exception index=%d interrupt_req=%d\n",
@@ -159,8 +157,7 @@ void crisv10_cpu_do_interrupt(CPUState *cs)
void cris_cpu_do_interrupt(CPUState *cs)
{
-CRISCPU *cpu = CRIS_CPU(cs);
-CPUCRISState *env = >env;
+CPUCRISState *env = cpu_env(cs);
int ex_vec = -1;
D_LOG("exception index=%d interrupt_req=%d\n",
@@ -262,8 +259,7 @@ hwaddr cris_cpu_get_phys_page_debug(CPUState *cs, vaddr
addr)
bool cris_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
CPUClass *cc = CPU_GET_CLASS(cs);
-CRISCPU *cpu = CRIS_CPU(cs);
-CPUCRISState *env = >env;
+CPUCRISState *env = cpu_env(cs);
bool ret = false;
if (interrupt_request & CPU_INTERRUPT_HARD
diff --git a/target/cris/translate.c b/target/cris/translate.c
index b3974ba0bb..a935167f00 100644
--- a/target/cris/translate.c
+++ b/target/cris/translate.c
@@ -3180,8 +3180,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock
*tb, int *max_insns,
void cris_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
-CRISCPU *cpu = CRIS_CPU(cs);
-CPUCRISState *env = >env;
+CPUCRISState *env = cpu_env(cs);
const char * const *regnames;
const char * const *pregnames;
int i;
--
2.41.0
[PATCH v2 13/23] target/mips: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/cpu.c | 11 +++---
target/mips/gdbstub.c | 6 ++
target/mips/kvm.c | 27 +
target/mips/sysemu/physaddr.c | 3 +--
target/mips/tcg/exception.c | 3 +--
target/mips/tcg/op_helper.c | 3 +--
target/mips/tcg/sysemu/special_helper.c | 3 +--
target/mips/tcg/sysemu/tlb_helper.c | 6 ++
target/mips/tcg/translate.c | 3 +--
9 files changed, 21 insertions(+), 44 deletions(-)
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index a0023edd43..d9c0c0dada 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -80,8 +80,7 @@ static void fpu_dump_state(CPUMIPSState *env, FILE *f, int
flags)
static void mips_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
-MIPSCPU *cpu = MIPS_CPU(cs);
-CPUMIPSState *env = >env;
+CPUMIPSState *env = cpu_env(cs);
int i;
qemu_fprintf(f, "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx
@@ -137,8 +136,7 @@ static vaddr mips_cpu_get_pc(CPUState *cs)
static bool mips_cpu_has_work(CPUState *cs)
{
-MIPSCPU *cpu = MIPS_CPU(cs);
-CPUMIPSState *env = >env;
+CPUMIPSState *env = cpu_env(cs);
bool has_work = false;
/*
@@ -428,10 +426,7 @@ static void mips_cpu_reset_hold(Object *obj)
static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info)
{
-MIPSCPU *cpu = MIPS_CPU(s);
-CPUMIPSState *env = >env;
-
-if (!(env->insn_flags & ISA_NANOMIPS32)) {
+if (!(cpu_env(s)->insn_flags & ISA_NANOMIPS32)) {
#if TARGET_BIG_ENDIAN
info->print_insn = print_insn_big_mips;
#else
diff --git a/target/mips/gdbstub.c b/target/mips/gdbstub.c
index 62d7b72407..169d47416a 100644
--- a/target/mips/gdbstub.c
+++ b/target/mips/gdbstub.c
@@ -25,8 +25,7 @@
int mips_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
-MIPSCPU *cpu = MIPS_CPU(cs);
-CPUMIPSState *env = >env;
+CPUMIPSState *env = cpu_env(cs);
if (n < 32) {
return gdb_get_regl(mem_buf, env->active_tc.gpr[n]);
@@ -78,8 +77,7 @@ int mips_cpu_gdb_read_register(CPUState *cs, GByteArray
*mem_buf, int n)
int mips_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
-MIPSCPU *cpu = MIPS_CPU(cs);
-CPUMIPSState *env = >env;
+CPUMIPSState *env = cpu_env(cs);
target_ulong tmp;
tmp = ldtul_p(mem_buf);
diff --git a/target/mips/kvm.c b/target/mips/kvm.c
index 15d0cf9adb..6c52e59f55 100644
--- a/target/mips/kvm.c
+++ b/target/mips/kvm.c
@@ -63,8 +63,7 @@ int kvm_arch_irqchip_create(KVMState *s)
int kvm_arch_init_vcpu(CPUState *cs)
{
-MIPSCPU *cpu = MIPS_CPU(cs);
-CPUMIPSState *env = >env;
+CPUMIPSState *env = cpu_env(cs);
int ret = 0;
qemu_add_vm_change_state_handler(kvm_mips_update_state, cs);
@@ -460,8 +459,7 @@ static inline int kvm_mips_change_one_reg(CPUState *cs,
uint64_t reg_id,
*/
static int kvm_mips_save_count(CPUState *cs)
{
-MIPSCPU *cpu = MIPS_CPU(cs);
-CPUMIPSState *env = >env;
+CPUMIPSState *env = cpu_env(cs);
uint64_t count_ctl;
int err, ret = 0;
@@ -502,8 +500,7 @@ static int kvm_mips_save_count(CPUState *cs)
*/
static int kvm_mips_restore_count(CPUState *cs)
{
-MIPSCPU *cpu = MIPS_CPU(cs);
-CPUMIPSState *env = >env;
+CPUMIPSState *env = cpu_env(cs);
uint64_t count_ctl;
int err_dc, err, ret = 0;
@@ -590,8 +587,7 @@ static void kvm_mips_update_state(void *opaque, bool
running, RunState state)
static int kvm_mips_put_fpu_registers(CPUState *cs, int level)
{
-MIPSCPU *cpu = MIPS_CPU(cs);
-CPUMIPSState *env = >env;
+CPUMIPSState *env = cpu_env(cs);
int err, ret = 0;
unsigned int i;
@@ -670,8 +666,7 @@ static int kvm_mips_put_fpu_registers(CPUState *cs, int
level)
static int kvm_mips_get_fpu_registers(CPUState *cs)
{
-MIPSCPU *cpu = MIPS_CPU(cs);
-CPUMIPSState *env = >env;
+CPUMIPSState *env = cpu_env(cs);
int err, ret = 0;
unsigned int i;
@@ -751,8 +746,7 @@ static int kvm_mips_get_fpu_registers(CPUState *cs)
static int kvm_mips_put_cp0_registers(CPUState *cs, int level)
{
-MIPSCPU *cpu = MIPS_CPU(cs);
-CPUMIPSState *env = >env;
+CPUMIPSState *env = cpu_env(cs);
int err, ret = 0;
(void)level;
@@ -974,8 +968,7 @@ static int kvm_mips_put_cp0_registers(CPUState *cs, int
level)
static int kvm_mips_get_cp0_registers(CPUState *cs)
{
-MIPSCPU *cpu = MIPS_CPU(cs);
-CPUMIPSState *env = >env;
+CPUMIPSState *env = cpu_env(cs);
int err, ret = 0;
err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_CP0_INDEX, >CP0_Index);
@@ -1181,8 +1174,7 @@ static int kvm_mips_get_cp0_registers(CPUState *cs)
int kvm_arch_put_registers(CPUState *cs, int level)
{
-MIPSCPU *cpu = MIPS_CPU(cs);
-
[PATCH v2 12/23] target/microblaze: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/microblaze/helper.c| 3 +--
target/microblaze/translate.c | 3 +--
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
index 98bdb82de8..bf955dd425 100644
--- a/target/microblaze/helper.c
+++ b/target/microblaze/helper.c
@@ -253,8 +253,7 @@ hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState *cs, vaddr
addr,
bool mb_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
-MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
-CPUMBState *env = >env;
+CPUMBState *env = cpu_env(cs);
if ((interrupt_request & CPU_INTERRUPT_HARD)
&& (env->msr & MSR_IE)
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 49bfb4a0ea..1c6e4fcfe4 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -1800,8 +1800,7 @@ void gen_intermediate_code(CPUState *cpu,
TranslationBlock *tb, int *max_insns,
void mb_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
-MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
-CPUMBState *env = >env;
+CPUMBState *env = cpu_env(cs);
uint32_t iflags;
int i;
--
2.41.0
[PATCH v2 14/23] target/nios2: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/nios2/cpu.c| 15 +++
target/nios2/helper.c | 3 +--
target/nios2/nios2-semi.c | 6 ++
3 files changed, 6 insertions(+), 18 deletions(-)
diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c
index a27732bf2b..a2eaf35c1a 100644
--- a/target/nios2/cpu.c
+++ b/target/nios2/cpu.c
@@ -28,28 +28,19 @@
static void nios2_cpu_set_pc(CPUState *cs, vaddr value)
{
-Nios2CPU *cpu = NIOS2_CPU(cs);
-CPUNios2State *env = >env;
-
-env->pc = value;
+cpu_env(cs)->pc = value;
}
static vaddr nios2_cpu_get_pc(CPUState *cs)
{
-Nios2CPU *cpu = NIOS2_CPU(cs);
-CPUNios2State *env = >env;
-
-return env->pc;
+return cpu_env(cs)->pc;
}
static void nios2_restore_state_to_opc(CPUState *cs,
const TranslationBlock *tb,
const uint64_t *data)
{
-Nios2CPU *cpu = NIOS2_CPU(cs);
-CPUNios2State *env = >env;
-
-env->pc = data[0];
+cpu_env(cs)->pc = data[0];
}
static bool nios2_cpu_has_work(CPUState *cs)
diff --git a/target/nios2/helper.c b/target/nios2/helper.c
index bb3b09e5a7..ac57121afc 100644
--- a/target/nios2/helper.c
+++ b/target/nios2/helper.c
@@ -287,8 +287,7 @@ void nios2_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
MMUAccessType access_type,
int mmu_idx, uintptr_t retaddr)
{
-Nios2CPU *cpu = NIOS2_CPU(cs);
-CPUNios2State *env = >env;
+CPUNios2State *env = cpu_env(cs);
env->ctrl[CR_BADADDR] = addr;
cs->exception_index = EXCP_UNALIGN;
diff --git a/target/nios2/nios2-semi.c b/target/nios2/nios2-semi.c
index 0b84fcb6b6..420702e293 100644
--- a/target/nios2/nios2-semi.c
+++ b/target/nios2/nios2-semi.c
@@ -75,8 +75,7 @@ static int host_to_gdb_errno(int err)
static void nios2_semi_u32_cb(CPUState *cs, uint64_t ret, int err)
{
-Nios2CPU *cpu = NIOS2_CPU(cs);
-CPUNios2State *env = >env;
+CPUNios2State *env = cpu_env(cs);
target_ulong args = env->regs[R_ARG1];
if (put_user_u32(ret, args) ||
@@ -93,8 +92,7 @@ static void nios2_semi_u32_cb(CPUState *cs, uint64_t ret, int
err)
static void nios2_semi_u64_cb(CPUState *cs, uint64_t ret, int err)
{
-Nios2CPU *cpu = NIOS2_CPU(cs);
-CPUNios2State *env = >env;
+CPUNios2State *env = cpu_env(cs);
target_ulong args = env->regs[R_ARG1];
if (put_user_u32(ret >> 32, args) ||
--
2.41.0
[PATCH v2 15/23] target/openrisc: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/openrisc/gdbstub.c | 3 +--
target/openrisc/interrupt.c | 6 ++
target/openrisc/translate.c | 3 +--
3 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/target/openrisc/gdbstub.c b/target/openrisc/gdbstub.c
index d1074a0581..0cce8d4f92 100644
--- a/target/openrisc/gdbstub.c
+++ b/target/openrisc/gdbstub.c
@@ -23,8 +23,7 @@
int openrisc_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
-OpenRISCCPU *cpu = OPENRISC_CPU(cs);
-CPUOpenRISCState *env = >env;
+CPUOpenRISCState *env = cpu_env(cs);
if (n < 32) {
return gdb_get_reg32(mem_buf, cpu_get_gpr(env, n));
diff --git a/target/openrisc/interrupt.c b/target/openrisc/interrupt.c
index d4fdb8ce8e..b3b5b40577 100644
--- a/target/openrisc/interrupt.c
+++ b/target/openrisc/interrupt.c
@@ -29,8 +29,7 @@
void openrisc_cpu_do_interrupt(CPUState *cs)
{
-OpenRISCCPU *cpu = OPENRISC_CPU(cs);
-CPUOpenRISCState *env = >env;
+CPUOpenRISCState *env = cpu_env(cs);
int exception = cs->exception_index;
env->epcr = env->pc;
@@ -105,8 +104,7 @@ void openrisc_cpu_do_interrupt(CPUState *cs)
bool openrisc_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
-OpenRISCCPU *cpu = OPENRISC_CPU(cs);
-CPUOpenRISCState *env = >env;
+CPUOpenRISCState *env = cpu_env(cs);
int idx = -1;
if ((interrupt_request & CPU_INTERRUPT_HARD) && (env->sr & SR_IEE)) {
diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c
index ecff4412b7..aff53c0065 100644
--- a/target/openrisc/translate.c
+++ b/target/openrisc/translate.c
@@ -1668,8 +1668,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock
*tb, int *max_insns,
void openrisc_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
-OpenRISCCPU *cpu = OPENRISC_CPU(cs);
-CPUOpenRISCState *env = >env;
+CPUOpenRISCState *env = cpu_env(cs);
int i;
qemu_fprintf(f, "PC=%08x\n", env->pc);
--
2.41.0
[PATCH v2 08/23] target/hppa: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/hppa/cpu.c| 8 ++--
target/hppa/int_helper.c | 8 ++--
target/hppa/mem_helper.c | 3 +--
3 files changed, 5 insertions(+), 14 deletions(-)
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 14e17fa9aa..3200de0998 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -106,11 +106,8 @@ void hppa_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
MMUAccessType access_type, int mmu_idx,
uintptr_t retaddr)
{
-HPPACPU *cpu = HPPA_CPU(cs);
-CPUHPPAState *env = >env;
-
cs->exception_index = EXCP_UNALIGN;
-hppa_set_ior_and_isr(env, addr, MMU_IDX_MMU_DISABLED(mmu_idx));
+hppa_set_ior_and_isr(cpu_env(cs), addr, MMU_IDX_MMU_DISABLED(mmu_idx));
cpu_loop_exit_restore(cs, retaddr);
}
@@ -145,8 +142,7 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error
**errp)
static void hppa_cpu_initfn(Object *obj)
{
CPUState *cs = CPU(obj);
-HPPACPU *cpu = HPPA_CPU(obj);
-CPUHPPAState *env = >env;
+CPUHPPAState *env = cpu_env(CPU(obj));
cs->exception_index = -1;
cpu_hppa_loaded_fr0(env);
diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c
index efe638b36e..d072ad2af7 100644
--- a/target/hppa/int_helper.c
+++ b/target/hppa/int_helper.c
@@ -99,8 +99,7 @@ void HELPER(write_eiem)(CPUHPPAState *env, target_ulong val)
void hppa_cpu_do_interrupt(CPUState *cs)
{
-HPPACPU *cpu = HPPA_CPU(cs);
-CPUHPPAState *env = >env;
+CPUHPPAState *env = cpu_env(cs);
int i = cs->exception_index;
uint64_t old_psw;
@@ -268,9 +267,6 @@ void hppa_cpu_do_interrupt(CPUState *cs)
bool hppa_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
-HPPACPU *cpu = HPPA_CPU(cs);
-CPUHPPAState *env = >env;
-
if (interrupt_request & CPU_INTERRUPT_NMI) {
/* Raise TOC (NMI) interrupt */
cpu_reset_interrupt(cs, CPU_INTERRUPT_NMI);
@@ -280,7 +276,7 @@ bool hppa_cpu_exec_interrupt(CPUState *cs, int
interrupt_request)
}
/* If interrupts are requested and enabled, raise them. */
-if ((env->psw & PSW_I) && (interrupt_request & CPU_INTERRUPT_HARD)) {
+if ((cpu_env(cs)->psw & PSW_I) && (interrupt_request &
CPU_INTERRUPT_HARD)) {
cs->exception_index = EXCP_EXT_INTERRUPT;
hppa_cpu_do_interrupt(cs);
return true;
diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c
index bb85962d50..7e73b80788 100644
--- a/target/hppa/mem_helper.c
+++ b/target/hppa/mem_helper.c
@@ -357,8 +357,7 @@ bool hppa_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
MMUAccessType type, int mmu_idx,
bool probe, uintptr_t retaddr)
{
-HPPACPU *cpu = HPPA_CPU(cs);
-CPUHPPAState *env = >env;
+CPUHPPAState *env = cpu_env(cs);
HPPATLBEntry *ent;
int prot, excp, a_prot;
hwaddr phys;
--
2.41.0
[PATCH v2 19/23] target/s390x: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/s390x/cpu-dump.c| 3 +--
target/s390x/gdbstub.c | 6 ++
target/s390x/helper.c | 3 +--
target/s390x/kvm/kvm.c | 6 ++
target/s390x/tcg/excp_helper.c | 11 +++
target/s390x/tcg/translate.c | 3 +--
6 files changed, 10 insertions(+), 22 deletions(-)
diff --git a/target/s390x/cpu-dump.c b/target/s390x/cpu-dump.c
index ffa9e94d84..69cc9f7746 100644
--- a/target/s390x/cpu-dump.c
+++ b/target/s390x/cpu-dump.c
@@ -27,8 +27,7 @@
void s390_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
-S390CPU *cpu = S390_CPU(cs);
-CPUS390XState *env = >env;
+CPUS390XState *env = cpu_env(cs);
int i;
qemu_fprintf(f, "PSW=mask %016" PRIx64 " addr %016" PRIx64,
diff --git a/target/s390x/gdbstub.c b/target/s390x/gdbstub.c
index 6fbfd41bc8..f02fa316e5 100644
--- a/target/s390x/gdbstub.c
+++ b/target/s390x/gdbstub.c
@@ -30,8 +30,7 @@
int s390_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
-S390CPU *cpu = S390_CPU(cs);
-CPUS390XState *env = >env;
+CPUS390XState *env = cpu_env(cs);
switch (n) {
case S390_PSWM_REGNUM:
@@ -46,8 +45,7 @@ int s390_cpu_gdb_read_register(CPUState *cs, GByteArray
*mem_buf, int n)
int s390_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
-S390CPU *cpu = S390_CPU(cs);
-CPUS390XState *env = >env;
+CPUS390XState *env = cpu_env(cs);
target_ulong tmpl = ldtul_p(mem_buf);
switch (n) {
diff --git a/target/s390x/helper.c b/target/s390x/helper.c
index d76c06381b..00d5d403f3 100644
--- a/target/s390x/helper.c
+++ b/target/s390x/helper.c
@@ -139,8 +139,7 @@ void do_restart_interrupt(CPUS390XState *env)
void s390_cpu_recompute_watchpoints(CPUState *cs)
{
const int wp_flags = BP_CPU | BP_MEM_WRITE | BP_STOP_BEFORE_ACCESS;
-S390CPU *cpu = S390_CPU(cs);
-CPUS390XState *env = >env;
+CPUS390XState *env = cpu_env(cs);
/* We are called when the watchpoints have changed. First
remove them all. */
diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c
index 888d6c1a1c..4ce809c5d4 100644
--- a/target/s390x/kvm/kvm.c
+++ b/target/s390x/kvm/kvm.c
@@ -474,8 +474,7 @@ static int can_sync_regs(CPUState *cs, int regs)
int kvm_arch_put_registers(CPUState *cs, int level)
{
-S390CPU *cpu = S390_CPU(cs);
-CPUS390XState *env = >env;
+CPUS390XState *env = cpu_env(cs);
struct kvm_fpu fpu = {};
int r;
int i;
@@ -601,8 +600,7 @@ int kvm_arch_put_registers(CPUState *cs, int level)
int kvm_arch_get_registers(CPUState *cs)
{
-S390CPU *cpu = S390_CPU(cs);
-CPUS390XState *env = >env;
+CPUS390XState *env = cpu_env(cs);
struct kvm_fpu fpu;
int i, r;
diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c
index b875bf14e5..f1c33f7967 100644
--- a/target/s390x/tcg/excp_helper.c
+++ b/target/s390x/tcg/excp_helper.c
@@ -90,10 +90,7 @@ void HELPER(data_exception)(CPUS390XState *env, uint32_t dxc)
static G_NORETURN
void do_unaligned_access(CPUState *cs, uintptr_t retaddr)
{
-S390CPU *cpu = S390_CPU(cs);
-CPUS390XState *env = >env;
-
-tcg_s390_program_interrupt(env, PGM_SPECIFICATION, retaddr);
+tcg_s390_program_interrupt(cpu_env(cs), PGM_SPECIFICATION, retaddr);
}
#if defined(CONFIG_USER_ONLY)
@@ -146,8 +143,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr)
{
-S390CPU *cpu = S390_CPU(cs);
-CPUS390XState *env = >env;
+CPUS390XState *env = cpu_env(cs);
target_ulong vaddr, raddr;
uint64_t asc, tec;
int prot, excp;
@@ -600,8 +596,7 @@ bool s390_cpu_exec_interrupt(CPUState *cs, int
interrupt_request)
void s390x_cpu_debug_excp_handler(CPUState *cs)
{
-S390CPU *cpu = S390_CPU(cs);
-CPUS390XState *env = >env;
+CPUS390XState *env = cpu_env(cs);
CPUWatchpoint *wp_hit = cs->watchpoint_hit;
if (wp_hit && wp_hit->flags & BP_CPU) {
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index 8df00b7df9..9995689bc8 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -6558,8 +6558,7 @@ void s390x_restore_state_to_opc(CPUState *cs,
const TranslationBlock *tb,
const uint64_t *data)
{
-S390CPU *cpu = S390_CPU(cs);
-CPUS390XState *env = >env;
+CPUS390XState *env = cpu_env(cs);
int cc_op = data[1];
env->psw.addr = data[0];
--
2.41.0
[PATCH v2 18/23] target/rx: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/rx/gdbstub.c | 6 ++
target/rx/helper.c| 6 ++
target/rx/translate.c | 3 +--
3 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/target/rx/gdbstub.c b/target/rx/gdbstub.c
index d7e0e6689b..f222bf003b 100644
--- a/target/rx/gdbstub.c
+++ b/target/rx/gdbstub.c
@@ -21,8 +21,7 @@
int rx_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
-RXCPU *cpu = RX_CPU(cs);
-CPURXState *env = >env;
+CPURXState *env = cpu_env(cs);
switch (n) {
case 0 ... 15:
@@ -53,8 +52,7 @@ int rx_cpu_gdb_read_register(CPUState *cs, GByteArray
*mem_buf, int n)
int rx_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
-RXCPU *cpu = RX_CPU(cs);
-CPURXState *env = >env;
+CPURXState *env = cpu_env(cs);
uint32_t psw;
switch (n) {
case 0 ... 15:
diff --git a/target/rx/helper.c b/target/rx/helper.c
index dad5fb4976..80912e8dcb 100644
--- a/target/rx/helper.c
+++ b/target/rx/helper.c
@@ -45,8 +45,7 @@ void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int rte)
#define INT_FLAGS (CPU_INTERRUPT_HARD | CPU_INTERRUPT_FIR)
void rx_cpu_do_interrupt(CPUState *cs)
{
-RXCPU *cpu = RX_CPU(cs);
-CPURXState *env = >env;
+CPURXState *env = cpu_env(cs);
int do_irq = cs->interrupt_request & INT_FLAGS;
uint32_t save_psw;
@@ -122,8 +121,7 @@ void rx_cpu_do_interrupt(CPUState *cs)
bool rx_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
-RXCPU *cpu = RX_CPU(cs);
-CPURXState *env = >env;
+CPURXState *env = cpu_env(cs);
int accept = 0;
/* hardware interrupt (Normal) */
if ((interrupt_request & CPU_INTERRUPT_HARD) &&
diff --git a/target/rx/translate.c b/target/rx/translate.c
index 1829a0b1cd..26aaf7a6b5 100644
--- a/target/rx/translate.c
+++ b/target/rx/translate.c
@@ -131,8 +131,7 @@ static int bdsp_s(DisasContext *ctx, int d)
void rx_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
-RXCPU *cpu = RX_CPU(cs);
-CPURXState *env = >env;
+CPURXState *env = cpu_env(cs);
int i;
uint32_t psw;
--
2.41.0
[PATCH v2 17/23] target/riscv: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/riscv/arch_dump.c | 6 ++
target/riscv/cpu.c | 17 +
target/riscv/cpu_helper.c | 14 --
target/riscv/debug.c | 9 +++--
target/riscv/gdbstub.c | 6 ++
target/riscv/kvm/kvm-cpu.c | 6 ++
target/riscv/tcg/tcg-cpu.c | 9 +++--
target/riscv/translate.c | 3 +--
8 files changed, 22 insertions(+), 48 deletions(-)
diff --git a/target/riscv/arch_dump.c b/target/riscv/arch_dump.c
index 434c8a3dbb..994709647f 100644
--- a/target/riscv/arch_dump.c
+++ b/target/riscv/arch_dump.c
@@ -68,8 +68,7 @@ int riscv_cpu_write_elf64_note(WriteCoreDumpFunction f,
CPUState *cs,
int cpuid, DumpState *s)
{
struct riscv64_note note;
-RISCVCPU *cpu = RISCV_CPU(cs);
-CPURISCVState *env = >env;
+CPURISCVState *env = cpu_env(cs);
int ret, i = 0;
const char name[] = "CORE";
@@ -137,8 +136,7 @@ int riscv_cpu_write_elf32_note(WriteCoreDumpFunction f,
CPUState *cs,
int cpuid, DumpState *s)
{
struct riscv32_note note;
-RISCVCPU *cpu = RISCV_CPU(cs);
-CPURISCVState *env = >env;
+CPURISCVState *env = cpu_env(cs);
int ret, i;
const char name[] = "CORE";
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 8cbfc7e781..fe21393655 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -419,8 +419,7 @@ static void riscv_any_cpu_init(Object *obj)
static void riscv_max_cpu_init(Object *obj)
{
-RISCVCPU *cpu = RISCV_CPU(obj);
-CPURISCVState *env = >env;
+CPURISCVState *env = cpu_env(CPU(obj));
RISCVMXL mlx = MXL_RV64;
#ifdef TARGET_RISCV32
@@ -828,8 +827,7 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int
flags)
static void riscv_cpu_set_pc(CPUState *cs, vaddr value)
{
-RISCVCPU *cpu = RISCV_CPU(cs);
-CPURISCVState *env = >env;
+CPURISCVState *env = cpu_env(cs);
if (env->xl == MXL_RV32) {
env->pc = (int32_t)value;
@@ -840,8 +838,7 @@ static void riscv_cpu_set_pc(CPUState *cs, vaddr value)
static vaddr riscv_cpu_get_pc(CPUState *cs)
{
-RISCVCPU *cpu = RISCV_CPU(cs);
-CPURISCVState *env = >env;
+CPURISCVState *env = cpu_env(cs);
/* Match cpu_get_tb_cpu_state. */
if (env->xl == MXL_RV32) {
@@ -853,8 +850,7 @@ static vaddr riscv_cpu_get_pc(CPUState *cs)
static bool riscv_cpu_has_work(CPUState *cs)
{
#ifndef CONFIG_USER_ONLY
-RISCVCPU *cpu = RISCV_CPU(cs);
-CPURISCVState *env = >env;
+CPURISCVState *env = cpu_env(cs);
/*
* Definition of the WFI instruction requires it to ignore the privilege
* mode and delegation registers, but respect individual enables
@@ -1642,10 +1638,7 @@ static void rva22s64_profile_cpu_init(Object *obj)
static const gchar *riscv_gdb_arch_name(CPUState *cs)
{
-RISCVCPU *cpu = RISCV_CPU(cs);
-CPURISCVState *env = >env;
-
-switch (riscv_cpu_mxl(env)) {
+switch (riscv_cpu_mxl(cpu_env(cs))) {
case MXL_RV32:
return "riscv:rv32";
case MXL_RV64:
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index c7cc7eb423..9d4798b841 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -493,9 +493,7 @@ static int riscv_cpu_local_irq_pending(CPURISCVState *env)
bool riscv_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
if (interrupt_request & CPU_INTERRUPT_HARD) {
-RISCVCPU *cpu = RISCV_CPU(cs);
-CPURISCVState *env = >env;
-int interruptno = riscv_cpu_local_irq_pending(env);
+int interruptno = riscv_cpu_local_irq_pending(cpu_env(cs));
if (interruptno >= 0) {
cs->exception_index = RISCV_EXCP_INT_FLAG | interruptno;
riscv_cpu_do_interrupt(cs);
@@ -1223,8 +1221,7 @@ void riscv_cpu_do_transaction_failed(CPUState *cs, hwaddr
physaddr,
int mmu_idx, MemTxAttrs attrs,
MemTxResult response, uintptr_t retaddr)
{
-RISCVCPU *cpu = RISCV_CPU(cs);
-CPURISCVState *env = >env;
+CPURISCVState *env = cpu_env(cs);
if (access_type == MMU_DATA_STORE) {
cs->exception_index = RISCV_EXCP_STORE_AMO_ACCESS_FAULT;
@@ -1244,8 +1241,7 @@ void riscv_cpu_do_unaligned_access(CPUState *cs, vaddr
addr,
MMUAccessType access_type, int mmu_idx,
uintptr_t retaddr)
{
-RISCVCPU *cpu = RISCV_CPU(cs);
-CPURISCVState *env = >env;
+CPURISCVState *env = cpu_env(cs);
switch (access_type) {
case MMU_INST_FETCH:
cs->exception_index = RISCV_EXCP_INST_ADDR_MIS;
@@ -1631,9 +1627,7 @@ static target_ulong riscv_transformed_insn(CPURISCVState
*env,
void riscv_cpu_do_interrupt(CPUState *cs)
{
#if !defined(CONFIG_USER_ONLY)
-
-RISCVCPU
[PATCH v2 06/23] target/avr: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/avr/cpu.c | 27 +++
target/avr/gdbstub.c | 6 ++
target/avr/helper.c | 10 +++---
3 files changed, 12 insertions(+), 31 deletions(-)
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index f5cbdc4a8c..2ad24373a8 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -43,31 +43,22 @@ static vaddr avr_cpu_get_pc(CPUState *cs)
static bool avr_cpu_has_work(CPUState *cs)
{
-AVRCPU *cpu = AVR_CPU(cs);
-CPUAVRState *env = >env;
-
return (cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_RESET))
-&& cpu_interrupts_enabled(env);
+&& cpu_interrupts_enabled(cpu_env(cs));
}
static void avr_cpu_synchronize_from_tb(CPUState *cs,
const TranslationBlock *tb)
{
-AVRCPU *cpu = AVR_CPU(cs);
-CPUAVRState *env = >env;
-
tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL));
-env->pc_w = tb->pc / 2; /* internally PC points to words */
+cpu_env(cs)->pc_w = tb->pc / 2; /* internally PC points to words */
}
static void avr_restore_state_to_opc(CPUState *cs,
const TranslationBlock *tb,
const uint64_t *data)
{
-AVRCPU *cpu = AVR_CPU(cs);
-CPUAVRState *env = >env;
-
-env->pc_w = data[0];
+cpu_env(cs)->pc_w = data[0];
}
static void avr_cpu_reset_hold(Object *obj)
@@ -165,8 +156,7 @@ static ObjectClass *avr_cpu_class_by_name(const char
*cpu_model)
static void avr_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
-AVRCPU *cpu = AVR_CPU(cs);
-CPUAVRState *env = >env;
+CPUAVRState *env = cpu_env(cs);
int i;
qemu_fprintf(f, "\n");
@@ -276,8 +266,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
*/
static void avr_avr5_initfn(Object *obj)
{
-AVRCPU *cpu = AVR_CPU(obj);
-CPUAVRState *env = >env;
+CPUAVRState *env = cpu_env(CPU(obj));
set_avr_feature(env, AVR_FEATURE_LPM);
set_avr_feature(env, AVR_FEATURE_IJMP_ICALL);
@@ -305,8 +294,7 @@ static void avr_avr5_initfn(Object *obj)
*/
static void avr_avr51_initfn(Object *obj)
{
-AVRCPU *cpu = AVR_CPU(obj);
-CPUAVRState *env = >env;
+CPUAVRState *env = cpu_env(CPU(obj));
set_avr_feature(env, AVR_FEATURE_LPM);
set_avr_feature(env, AVR_FEATURE_IJMP_ICALL);
@@ -335,8 +323,7 @@ static void avr_avr51_initfn(Object *obj)
*/
static void avr_avr6_initfn(Object *obj)
{
-AVRCPU *cpu = AVR_CPU(obj);
-CPUAVRState *env = >env;
+CPUAVRState *env = cpu_env(CPU(obj));
set_avr_feature(env, AVR_FEATURE_LPM);
set_avr_feature(env, AVR_FEATURE_IJMP_ICALL);
diff --git a/target/avr/gdbstub.c b/target/avr/gdbstub.c
index 150344d8b9..22bf4e 100644
--- a/target/avr/gdbstub.c
+++ b/target/avr/gdbstub.c
@@ -23,8 +23,7 @@
int avr_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
-AVRCPU *cpu = AVR_CPU(cs);
-CPUAVRState *env = >env;
+CPUAVRState *env = cpu_env(cs);
/* R */
if (n < 32) {
@@ -53,8 +52,7 @@ int avr_cpu_gdb_read_register(CPUState *cs, GByteArray
*mem_buf, int n)
int avr_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
-AVRCPU *cpu = AVR_CPU(cs);
-CPUAVRState *env = >env;
+CPUAVRState *env = cpu_env(cs);
/* R */
if (n < 32) {
diff --git a/target/avr/helper.c b/target/avr/helper.c
index fdc9884ea0..eeca415c43 100644
--- a/target/avr/helper.c
+++ b/target/avr/helper.c
@@ -30,8 +30,7 @@
bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
-AVRCPU *cpu = AVR_CPU(cs);
-CPUAVRState *env = >env;
+CPUAVRState *env = cpu_env(cs);
/*
* We cannot separate a skip from the next instruction,
@@ -69,8 +68,7 @@ bool avr_cpu_exec_interrupt(CPUState *cs, int
interrupt_request)
void avr_cpu_do_interrupt(CPUState *cs)
{
-AVRCPU *cpu = AVR_CPU(cs);
-CPUAVRState *env = >env;
+CPUAVRState *env = cpu_env(cs);
uint32_t ret = env->pc_w;
int vector = 0;
@@ -144,9 +142,7 @@ bool avr_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
if (probe) {
page_size = 1;
} else {
-AVRCPU *cpu = AVR_CPU(cs);
-CPUAVRState *env = >env;
-env->fullacc = 1;
+cpu_env(cs)->fullacc = 1;
cpu_loop_exit_restore(cs, retaddr);
}
}
--
2.41.0
[PATCH v2 11/23] target/m68k: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
target/m68k/cpu.c | 30 ++
target/m68k/gdbstub.c | 6 ++
target/m68k/helper.c| 3 +--
target/m68k/m68k-semi.c | 6 ++
target/m68k/op_helper.c | 11 +++
target/m68k/translate.c | 3 +--
6 files changed, 19 insertions(+), 40 deletions(-)
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 1421e77c2c..c122fd96fb 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -117,8 +117,7 @@ static ObjectClass *m68k_cpu_class_by_name(const char
*cpu_model)
static void m5206_cpu_initfn(Object *obj)
{
-M68kCPU *cpu = M68K_CPU(obj);
-CPUM68KState *env = >env;
+CPUM68KState *env = cpu_env(CPU(obj));
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV);
@@ -127,8 +126,7 @@ static void m5206_cpu_initfn(Object *obj)
/* Base feature set, including isns. for m68k family */
static void m68000_cpu_initfn(Object *obj)
{
-M68kCPU *cpu = M68K_CPU(obj);
-CPUM68KState *env = >env;
+CPUM68KState *env = cpu_env(CPU(obj));
m68k_set_feature(env, M68K_FEATURE_M68K);
m68k_set_feature(env, M68K_FEATURE_USP);
@@ -141,8 +139,7 @@ static void m68000_cpu_initfn(Object *obj)
*/
static void m68010_cpu_initfn(Object *obj)
{
-M68kCPU *cpu = M68K_CPU(obj);
-CPUM68KState *env = >env;
+CPUM68KState *env = cpu_env(CPU(obj));
m68000_cpu_initfn(obj);
m68k_set_feature(env, M68K_FEATURE_M68010);
@@ -161,8 +158,7 @@ static void m68010_cpu_initfn(Object *obj)
*/
static void m68020_cpu_initfn(Object *obj)
{
-M68kCPU *cpu = M68K_CPU(obj);
-CPUM68KState *env = >env;
+CPUM68KState *env = cpu_env(CPU(obj));
m68010_cpu_initfn(obj);
m68k_unset_feature(env, M68K_FEATURE_M68010);
@@ -192,8 +188,7 @@ static void m68020_cpu_initfn(Object *obj)
*/
static void m68030_cpu_initfn(Object *obj)
{
-M68kCPU *cpu = M68K_CPU(obj);
-CPUM68KState *env = >env;
+CPUM68KState *env = cpu_env(CPU(obj));
m68020_cpu_initfn(obj);
m68k_unset_feature(env, M68K_FEATURE_M68020);
@@ -219,8 +214,7 @@ static void m68030_cpu_initfn(Object *obj)
*/
static void m68040_cpu_initfn(Object *obj)
{
-M68kCPU *cpu = M68K_CPU(obj);
-CPUM68KState *env = >env;
+CPUM68KState *env = cpu_env(CPU(obj));
m68030_cpu_initfn(obj);
m68k_unset_feature(env, M68K_FEATURE_M68030);
@@ -240,8 +234,7 @@ static void m68040_cpu_initfn(Object *obj)
*/
static void m68060_cpu_initfn(Object *obj)
{
-M68kCPU *cpu = M68K_CPU(obj);
-CPUM68KState *env = >env;
+CPUM68KState *env = cpu_env(CPU(obj));
m68040_cpu_initfn(obj);
m68k_unset_feature(env, M68K_FEATURE_M68040);
@@ -254,8 +247,7 @@ static void m68060_cpu_initfn(Object *obj)
static void m5208_cpu_initfn(Object *obj)
{
-M68kCPU *cpu = M68K_CPU(obj);
-CPUM68KState *env = >env;
+CPUM68KState *env = cpu_env(CPU(obj));
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
@@ -267,8 +259,7 @@ static void m5208_cpu_initfn(Object *obj)
static void cfv4e_cpu_initfn(Object *obj)
{
-M68kCPU *cpu = M68K_CPU(obj);
-CPUM68KState *env = >env;
+CPUM68KState *env = cpu_env(CPU(obj));
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
@@ -281,8 +272,7 @@ static void cfv4e_cpu_initfn(Object *obj)
static void any_cpu_initfn(Object *obj)
{
-M68kCPU *cpu = M68K_CPU(obj);
-CPUM68KState *env = >env;
+CPUM68KState *env = cpu_env(CPU(obj));
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
diff --git a/target/m68k/gdbstub.c b/target/m68k/gdbstub.c
index 1e5f033a12..15547e2313 100644
--- a/target/m68k/gdbstub.c
+++ b/target/m68k/gdbstub.c
@@ -23,8 +23,7 @@
int m68k_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
-M68kCPU *cpu = M68K_CPU(cs);
-CPUM68KState *env = >env;
+CPUM68KState *env = cpu_env(cs);
if (n < 8) {
/* D0-D7 */
@@ -50,8 +49,7 @@ int m68k_cpu_gdb_read_register(CPUState *cs, GByteArray
*mem_buf, int n)
int m68k_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
-M68kCPU *cpu = M68K_CPU(cs);
-CPUM68KState *env = >env;
+CPUM68KState *env = cpu_env(cs);
uint32_t tmp;
tmp = ldl_p(mem_buf);
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index 14508dfa11..85f3cd1680 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -894,8 +894,7 @@ txfail:
hwaddr m68k_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
{
-M68kCPU *cpu = M68K_CPU(cs);
-CPUM68KState *env = >env;
+CPUM68KState *env = cpu_env(cs);
hwaddr phys_addr;
int prot;
int access_type;
diff --git a/target/m68k/m68k-semi.c
[PATCH v2 09/23] target/i386/hvf: Use CPUState typedef
QEMU coding style recommend using structure typedefs:
https://www.qemu.org/docs/master/devel/style.html#typedefs
Signed-off-by: Philippe Mathieu-Daudé
---
target/i386/hvf/x86.h | 26 +-
target/i386/hvf/x86_descr.h | 14 +++---
target/i386/hvf/x86_emu.h | 4 ++--
target/i386/hvf/x86_mmu.h | 6 +++---
target/i386/hvf/x86.c | 26 +-
target/i386/hvf/x86_descr.c | 8
target/i386/hvf/x86_mmu.c | 14 +++---
7 files changed, 49 insertions(+), 49 deletions(-)
diff --git a/target/i386/hvf/x86.h b/target/i386/hvf/x86.h
index 947b98da41..3570f29aa9 100644
--- a/target/i386/hvf/x86.h
+++ b/target/i386/hvf/x86.h
@@ -248,30 +248,30 @@ typedef struct x68_segment_selector {
#define BH(cpu)RH(cpu, R_EBX)
/* deal with GDT/LDT descriptors in memory */
-bool x86_read_segment_descriptor(struct CPUState *cpu,
+bool x86_read_segment_descriptor(CPUState *cpu,
struct x86_segment_descriptor *desc,
x68_segment_selector sel);
-bool x86_write_segment_descriptor(struct CPUState *cpu,
+bool x86_write_segment_descriptor(CPUState *cpu,
struct x86_segment_descriptor *desc,
x68_segment_selector sel);
-bool x86_read_call_gate(struct CPUState *cpu, struct x86_call_gate *idt_desc,
+bool x86_read_call_gate(CPUState *cpu, struct x86_call_gate *idt_desc,
int gate);
/* helpers */
-bool x86_is_protected(struct CPUState *cpu);
-bool x86_is_real(struct CPUState *cpu);
-bool x86_is_v8086(struct CPUState *cpu);
-bool x86_is_long_mode(struct CPUState *cpu);
-bool x86_is_long64_mode(struct CPUState *cpu);
-bool x86_is_paging_mode(struct CPUState *cpu);
-bool x86_is_pae_enabled(struct CPUState *cpu);
+bool x86_is_protected(CPUState *cpu);
+bool x86_is_real(CPUState *cpu);
+bool x86_is_v8086(CPUState *cpu);
+bool x86_is_long_mode(CPUState *cpu);
+bool x86_is_long64_mode(CPUState *cpu);
+bool x86_is_paging_mode(CPUState *cpu);
+bool x86_is_pae_enabled(CPUState *cpu);
enum X86Seg;
-target_ulong linear_addr(struct CPUState *cpu, target_ulong addr, enum X86Seg
seg);
-target_ulong linear_addr_size(struct CPUState *cpu, target_ulong addr, int
size,
+target_ulong linear_addr(CPUState *cpu, target_ulong addr, enum X86Seg seg);
+target_ulong linear_addr_size(CPUState *cpu, target_ulong addr, int size,
enum X86Seg seg);
-target_ulong linear_rip(struct CPUState *cpu, target_ulong rip);
+target_ulong linear_rip(CPUState *cpu, target_ulong rip);
static inline uint64_t rdtscp(void)
{
diff --git a/target/i386/hvf/x86_descr.h b/target/i386/hvf/x86_descr.h
index c356932fa4..9f06014b56 100644
--- a/target/i386/hvf/x86_descr.h
+++ b/target/i386/hvf/x86_descr.h
@@ -29,29 +29,29 @@ typedef struct vmx_segment {
} vmx_segment;
/* deal with vmstate descriptors */
-void vmx_read_segment_descriptor(struct CPUState *cpu,
+void vmx_read_segment_descriptor(CPUState *cpu,
struct vmx_segment *desc, enum X86Seg seg);
void vmx_write_segment_descriptor(CPUState *cpu, struct vmx_segment *desc,
enum X86Seg seg);
-x68_segment_selector vmx_read_segment_selector(struct CPUState *cpu,
+x68_segment_selector vmx_read_segment_selector(CPUState *cpu,
enum X86Seg seg);
-void vmx_write_segment_selector(struct CPUState *cpu,
+void vmx_write_segment_selector(CPUState *cpu,
x68_segment_selector selector,
enum X86Seg seg);
-uint64_t vmx_read_segment_base(struct CPUState *cpu, enum X86Seg seg);
-void vmx_write_segment_base(struct CPUState *cpu, enum X86Seg seg,
+uint64_t vmx_read_segment_base(CPUState *cpu, enum X86Seg seg);
+void vmx_write_segment_base(CPUState *cpu, enum X86Seg seg,
uint64_t base);
-void x86_segment_descriptor_to_vmx(struct CPUState *cpu,
+void x86_segment_descriptor_to_vmx(CPUState *cpu,
x68_segment_selector selector,
struct x86_segment_descriptor *desc,
struct vmx_segment *vmx_desc);
uint32_t vmx_read_segment_limit(CPUState *cpu, enum X86Seg seg);
uint32_t vmx_read_segment_ar(CPUState *cpu, enum X86Seg seg);
-void vmx_segment_to_x86_descriptor(struct CPUState *cpu,
+void vmx_segment_to_x86_descriptor(CPUState *cpu,
struct vmx_segment *vmx_desc,
struct x86_segment_descriptor *desc);
diff --git a/target/i386/hvf/x86_emu.h b/target/i386/hvf/x86_emu.h
index 4b846ba80e..8bd97608c4 100644
--- a/target/i386/hvf/x86_emu.h
+++ b/target/i386/hvf/x86_emu.h
@@ -26,8 +26,8 @@
void init_emu(void);
bool exec_instruction(CPUX86State *env, struct x86_decode *ins);
-void
[PATCH v2 05/23] target/arm: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/intc/arm_gicv3_cpuif_common.c | 5 +
target/arm/cpu.c | 19 +--
target/arm/debug_helper.c| 8 ++--
target/arm/gdbstub.c | 6 ++
target/arm/gdbstub64.c | 6 ++
target/arm/helper.c | 9 +++--
target/arm/hvf/hvf.c | 12
target/arm/kvm.c | 3 +--
target/arm/ptw.c | 3 +--
target/arm/tcg/cpu32.c | 3 +--
10 files changed, 22 insertions(+), 52 deletions(-)
diff --git a/hw/intc/arm_gicv3_cpuif_common.c b/hw/intc/arm_gicv3_cpuif_common.c
index ff1239f65d..bab3c3cdbd 100644
--- a/hw/intc/arm_gicv3_cpuif_common.c
+++ b/hw/intc/arm_gicv3_cpuif_common.c
@@ -15,8 +15,5 @@
void gicv3_set_gicv3state(CPUState *cpu, GICv3CPUState *s)
{
-ARMCPU *arm_cpu = ARM_CPU(cpu);
-CPUARMState *env = _cpu->env;
-
-env->gicv3state = (void *)s;
+cpu_env(cpu)->gicv3state = (void *)s;
};
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 593695b424..3970223f33 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -51,8 +51,7 @@
static void arm_cpu_set_pc(CPUState *cs, vaddr value)
{
-ARMCPU *cpu = ARM_CPU(cs);
-CPUARMState *env = >env;
+CPUARMState *env = cpu_env(cs);
if (is_a64(env)) {
env->pc = value;
@@ -65,8 +64,7 @@ static void arm_cpu_set_pc(CPUState *cs, vaddr value)
static vaddr arm_cpu_get_pc(CPUState *cs)
{
-ARMCPU *cpu = ARM_CPU(cs);
-CPUARMState *env = >env;
+CPUARMState *env = cpu_env(cs);
if (is_a64(env)) {
return env->pc;
@@ -994,19 +992,15 @@ static void arm_cpu_kvm_set_irq(void *opaque, int irq,
int level)
static bool arm_cpu_virtio_is_big_endian(CPUState *cs)
{
-ARMCPU *cpu = ARM_CPU(cs);
-CPUARMState *env = >env;
-
cpu_synchronize_state(cs);
-return arm_cpu_data_is_big_endian(env);
+return arm_cpu_data_is_big_endian(cpu_env(cs));
}
#endif
static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)
{
-ARMCPU *ac = ARM_CPU(cpu);
-CPUARMState *env = >env;
+CPUARMState *env = cpu_env(cpu);
bool sctlr_b;
if (is_a64(env)) {
@@ -2428,10 +2422,7 @@ static Property arm_cpu_properties[] = {
static const gchar *arm_gdb_arch_name(CPUState *cs)
{
-ARMCPU *cpu = ARM_CPU(cs);
-CPUARMState *env = >env;
-
-if (arm_feature(env, ARM_FEATURE_IWMMXT)) {
+if (arm_feature(cpu_env(cs), ARM_FEATURE_IWMMXT)) {
return "iwmmxt";
}
return "arm";
diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c
index 7d856acddf..7bd5467414 100644
--- a/target/arm/debug_helper.c
+++ b/target/arm/debug_helper.c
@@ -468,8 +468,7 @@ void arm_debug_excp_handler(CPUState *cs)
* Called by core code when a watchpoint or breakpoint fires;
* need to check which one and raise the appropriate exception.
*/
-ARMCPU *cpu = ARM_CPU(cs);
-CPUARMState *env = >env;
+CPUARMState *env = cpu_env(cs);
CPUWatchpoint *wp_hit = cs->watchpoint_hit;
if (wp_hit) {
@@ -757,9 +756,6 @@ void hw_breakpoint_update_all(ARMCPU *cpu)
vaddr arm_adjust_watchpoint_address(CPUState *cs, vaddr addr, int len)
{
-ARMCPU *cpu = ARM_CPU(cs);
-CPUARMState *env = >env;
-
/*
* In BE32 system mode, target memory is stored byteswapped (on a
* little-endian host system), and by the time we reach here (via an
@@ -767,7 +763,7 @@ vaddr arm_adjust_watchpoint_address(CPUState *cs, vaddr
addr, int len)
* to account for that, which means that watchpoints will not match.
* Undo the adjustment here.
*/
-if (arm_sctlr_b(env)) {
+if (arm_sctlr_b(cpu_env(cs))) {
if (len == 1) {
addr ^= 3;
} else if (len == 2) {
diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c
index 28f546a5ff..dc6c29669c 100644
--- a/target/arm/gdbstub.c
+++ b/target/arm/gdbstub.c
@@ -40,8 +40,7 @@ typedef struct RegisterSysregXmlParam {
int arm_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
-ARMCPU *cpu = ARM_CPU(cs);
-CPUARMState *env = >env;
+CPUARMState *env = cpu_env(cs);
if (n < 16) {
/* Core integer register. */
@@ -61,8 +60,7 @@ int arm_cpu_gdb_read_register(CPUState *cs, GByteArray
*mem_buf, int n)
int arm_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
-ARMCPU *cpu = ARM_CPU(cs);
-CPUARMState *env = >env;
+CPUARMState *env = cpu_env(cs);
uint32_t tmp;
tmp = ldl_p(mem_buf);
diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c
index d7b79a6589..b9f29b0a60 100644
--- a/target/arm/gdbstub64.c
+++ b/target/arm/gdbstub64.c
@@ -24,8 +24,7 @@
int aarch64_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
-ARMCPU *cpu = ARM_CPU(cs);
-CPUARMState *env = >env;
+
[PATCH v2 02/23] scripts/coccinelle: Add cpu_env.cocci_template script
Add a Coccinelle script to convert the following slow path
(due to the QOM cast macro):
_CPU(..)->env
to the following fast path:
cpu_env(..)
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS | 1 +
scripts/coccinelle/cpu_env.cocci_template | 92 +++
2 files changed, 93 insertions(+)
create mode 100644 scripts/coccinelle/cpu_env.cocci_template
diff --git a/MAINTAINERS b/MAINTAINERS
index dfaca8323e..1d57130ff8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -157,6 +157,7 @@ F: accel/tcg/
F: accel/stubs/tcg-stub.c
F: util/cacheinfo.c
F: util/cacheflush.c
+F: scripts/coccinelle/cpu_env.cocci_template
F: scripts/decodetree.py
F: docs/devel/decodetree.rst
F: docs/devel/tcg*
diff --git a/scripts/coccinelle/cpu_env.cocci_template
b/scripts/coccinelle/cpu_env.cocci_template
new file mode 100644
index 00..462ed418bb
--- /dev/null
+++ b/scripts/coccinelle/cpu_env.cocci_template
@@ -0,0 +1,92 @@
+/*
+
+ Convert _CPU(..)->env to use cpu_env(..).
+
+ Rationale: ARCH_CPU() might be slow, being a QOM cast macro.
+cpu_env() is its fast equivalent.
+
+ SPDX-License-Identifier: GPL-2.0-or-later
+ SPDX-FileCopyrightText: Linaro Ltd 2024
+ SPDX-FileContributor: Philippe Mathieu-Daudé
+
+ Usage as of v8.2.0:
+
+ $ for targetdir in target/*; do test -d $targetdir || continue; \
+ export target=${targetdir:7}; \
+ sed \
+ -e "s/__CPUArchState__/$( \
+ git grep -h --no-line-number '@env: #CPU.*State' \
+ target/$target/cpu.h \
+ | sed -n -e 's/.*\(CPU.*State\).\?/\1/p')/g" \
+ -e "s/__ARCHCPU__/$( \
+ git grep -h --no-line-number OBJECT_DECLARE_CPU_TYPE.*CPU \
+ target/$target/cpu-qom.h \
+ | sed -n -e 's/.*(\(.*\), .*, .*)/\1/p')/g" \
+ -e "s/__ARCH_CPU__/$( \
+ git grep -h --no-line-number OBJECT_DECLARE_CPU_TYPE.*CPU \
+ target/$target/cpu-qom.h \
+ | sed -n -e 's/.*(.*, .*, \(.*\))/\1/p')/g" \
+ < scripts/coccinelle/cpu_env.cocci_template \
+ > $TMPDIR/cpu_env_$target.cocci; \
+ for dir in hw target/$target; do \
+ spatch --macro-file scripts/cocci-macro-file.h \
+ --sp-file $TMPDIR/cpu_env_$target.cocci \
+ --keep-comments \
+ --dir $dir \
+ --in-place; \
+ done; \
+ done
+
+*/
+
+/* Argument is CPUState* */
+@ CPUState_arg_used @
+CPUState *cs;
+identifier cpu;
+identifier env;
+@@
+-__ARCHCPU__ *cpu = __ARCH_CPU__(cs);
+-__CPUArchState__ *env = >env;
++__CPUArchState__ *env = cpu_env(cs);
+ ... when != cpu
+
+/*
+ * Argument is not CPUState* but a related QOM object.
+ * CPU() is not a QOM macro but a cast (See commit 0d6d1ab499).
+ */
+@ depends on never CPUState_arg_used @
+identifier obj;
+identifier cpu;
+identifier env;
+@@
+-__ARCHCPU__ *cpu = __ARCH_CPU__(obj);
+-__CPUArchState__ *env = >env;
++__CPUArchState__ *env = cpu_env(CPU(obj));
+ ... when != cpu
+
+/* Both first_cpu/current_cpu are CPUState* */
+@@
+symbol first_cpu;
+symbol current_cpu;
+@@
+(
+-CPU(first_cpu)
++first_cpu
+|
+-CPU(current_cpu)
++current_cpu
+)
+
+/* When single use of 'env', call cpu_env() in place */
+@@
+type CPUArchState;
+identifier env;
+expression cs;
+@@
+ {
+-CPUArchState *env = cpu_env(cs);
+ ... when != env
+- env
++ cpu_env(cs)
+ ... when != env
+ }
--
2.41.0
[PATCH v2 01/23] hw/acpi/cpu: Use CPUState typedef
QEMU coding style recommend using structure typedefs:
https://www.qemu.org/docs/master/devel/style.html#typedefs
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/acpi/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/acpi/cpu.h b/include/hw/acpi/cpu.h
index bc901660fb..209e1773f8 100644
--- a/include/hw/acpi/cpu.h
+++ b/include/hw/acpi/cpu.h
@@ -19,7 +19,7 @@
#include "hw/hotplug.h"
typedef struct AcpiCpuStatus {
-struct CPUState *cpu;
+CPUState *cpu;
uint64_t arch_id;
bool is_inserting;
bool is_removing;
--
2.41.0
[PATCH v2 00/23] hw, target: Prefer fast cpu_env() over slower CPU QOM cast macro
Use cpu_env() -- which is fast path -- when possible. Bulk conversion using Coccinelle spatch (script included). Since v1: - Avoid CPU() cast (Paolo) - Split per targets (Thomas) Philippe Mathieu-Daudé (23): hw/acpi/cpu: Use CPUState typedef scripts/coccinelle: Add cpu_env.cocci_template script bulk: Call in place single use cpu_env() target/alpha: Prefer fast cpu_env() over slower CPU QOM cast macro target/arm: Prefer fast cpu_env() over slower CPU QOM cast macro target/avr: Prefer fast cpu_env() over slower CPU QOM cast macro target/cris: Prefer fast cpu_env() over slower CPU QOM cast macro target/hppa: Prefer fast cpu_env() over slower CPU QOM cast macro target/i386/hvf: Use CPUState typedef target/i386: Prefer fast cpu_env() over slower CPU QOM cast macro target/m68k: Prefer fast cpu_env() over slower CPU QOM cast macro target/microblaze: Prefer fast cpu_env() over slower CPU QOM cast macro target/mips: Prefer fast cpu_env() over slower CPU QOM cast macro target/nios2: Prefer fast cpu_env() over slower CPU QOM cast macro target/openrisc: Prefer fast cpu_env() over slower CPU QOM cast macro target/ppc: Prefer fast cpu_env() over slower CPU QOM cast macro target/riscv: Prefer fast cpu_env() over slower CPU QOM cast macro target/rx: Prefer fast cpu_env() over slower CPU QOM cast macro target/s390x: Prefer fast cpu_env() over slower CPU QOM cast macro target/sh4: Prefer fast cpu_env() over slower CPU QOM cast macro target/tricore: Prefer fast cpu_env() over slower CPU QOM cast macro target/xtensa: Prefer fast cpu_env() over slower CPU QOM cast macro target/sparc: Prefer fast cpu_env() over slower CPU QOM cast macro MAINTAINERS | 1 + include/hw/acpi/cpu.h | 2 +- target/i386/hvf/vmx.h | 13 +--- target/i386/hvf/x86.h | 26 +++ target/i386/hvf/x86_descr.h | 14 ++-- target/i386/hvf/x86_emu.h | 4 +- target/i386/hvf/x86_mmu.h | 6 +- accel/tcg/cpu-exec.c | 3 +- hw/i386/vmmouse.c | 6 +- hw/i386/xen/xen-hvm.c | 3 +- hw/intc/arm_gicv3_cpuif_common.c | 5 +- hw/ppc/mpc8544_guts.c | 3 +- hw/ppc/pnv.c | 3 +- hw/ppc/pnv_xscom.c| 5 +- hw/ppc/ppce500_spin.c | 3 +- hw/ppc/spapr.c| 3 +- hw/ppc/spapr_caps.c | 6 +- linux-user/i386/cpu_loop.c| 4 +- target/alpha/cpu.c| 31 ++-- target/alpha/gdbstub.c| 6 +- target/alpha/helper.c | 12 +-- target/alpha/mem_helper.c | 11 +-- target/arm/cpu.c | 19 ++--- target/arm/debug_helper.c | 8 +- target/arm/gdbstub.c | 6 +- target/arm/gdbstub64.c| 6 +- target/arm/helper.c | 9 +-- target/arm/hvf/hvf.c | 12 +-- target/arm/kvm.c | 3 +- target/arm/ptw.c | 3 +- target/arm/tcg/cpu32.c| 3 +- target/avr/cpu.c | 27 ++- target/avr/gdbstub.c | 6 +- target/avr/helper.c | 10 +-- target/cris/cpu.c | 5 +- target/cris/gdbstub.c | 9 +-- target/cris/helper.c | 12 +-- target/cris/translate.c | 3 +- target/hppa/cpu.c | 8 +- target/hppa/int_helper.c | 8 +- target/hppa/mem_helper.c | 6 +- target/hppa/translate.c | 3 +- target/i386/arch_memory_mapping.c | 3 +- target/i386/cpu-dump.c| 3 +- target/i386/cpu.c | 37 +++-- target/i386/helper.c | 39 +++--- target/i386/hvf/hvf.c | 8 +- target/i386/hvf/x86.c | 30 target/i386/hvf/x86_descr.c | 8 +- target/i386/hvf/x86_emu.c | 6 +- target/i386/hvf/x86_mmu.c | 14 ++-- target/i386/hvf/x86_task.c| 10 +-- target/i386/hvf/x86hvf.c | 6 +- target/i386/kvm/kvm.c | 6 +- target/i386/kvm/xen-emu.c | 32 +++- target/i386/nvmm/nvmm-all.c | 6 +- target/i386/tcg/sysemu/bpt_helper.c | 3 +- target/i386/tcg/tcg-cpu.c | 14 +--- target/i386/tcg/user/excp_helper.c| 3 +- target/i386/tcg/user/seg_helper.c | 3 +- target/i386/whpx/whpx-all.c | 18 ++--- target/loongarch/tcg/translate.c | 3 +- target/m68k/cpu.c | 30 +++-
Re: Re: [PATCH v4 4/4] hw/misc/pvpanic: add support for normal shutdowns
Hi Alejandro,
On 2024-01-26 13:47:33-0500, Alejandro Jimenez wrote:
> On 1/7/24 09:05, Thomas Weißschuh wrote:
> > Shutdown requests are normally hardware dependent.
> > By extending pvpanic to also handle shutdown requests, guests can
> > submit such requests with an easily implementable and cross-platform
> > mechanism.
> >
> > Signed-off-by: Thomas Weißschuh
> > ---
> > docs/specs/pvpanic.rst| 2 ++
> > hw/misc/pvpanic.c | 5 +
> > include/hw/misc/pvpanic.h | 3 ++-
> > 3 files changed, 9 insertions(+), 1 deletion(-)
> >
> [snip]
>
> > -
> > diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
> > index a4982cc5928e..246f9ae4e992 100644
> > --- a/hw/misc/pvpanic.c
> > +++ b/hw/misc/pvpanic.c
> > @@ -40,6 +40,11 @@ static void handle_event(int event)
> > qemu_system_guest_crashloaded(NULL);
> > return;
> > }
> > +
> > +if (event & PVPANIC_SHUTDOWN) {
> > +qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
>
> I would suggest that instead of directly requesting a system shutdown,
> we should follow the same convention/handling of the other pvpanic
> events and emit a QMP message signaling the specific event that took
> place, to help a management layer application that might be listening
> to determine the cause of the shutdown. It can also be a helpful
> signal to let us know if a guest is (ab)using the new functionality.
This sounds reasonable, thanks for the suggestion and patch.
> If you agree with my reasoning and you'd allow me to piggyback on your
> series, please add my complementary [PATCH 5/4] change that implements
> the suggestion:
I picked up the patch and will test and resend the series in a few days.
[snip]
If one of the maintainers reads this:
Maybe patch 1, 2 and 3 could already be picked up as they seem not to be
controversial.
Then I can also continue to remove the UAPI header on the kernel side.
Thomas
Re: [PATCH 2/2] bulk: Prefer fast cpu_env() over slower CPU QOM cast macro
On 26/1/24 18:09, Thomas Huth wrote:
On 25/01/2024 17.56, Philippe Mathieu-Daudé wrote:
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Signed-off-by: Philippe Mathieu-Daudé
---
114 files changed, 273 insertions(+), 548 deletions(-)
A huge patch ... I wonder whether it would make sense to split it up by
target architecture to ease the review?
...
diff --git a/hw/i386/vmmouse.c b/hw/i386/vmmouse.c
index a8d014d09a..eb0613bfbe 100644
--- a/hw/i386/vmmouse.c
+++ b/hw/i386/vmmouse.c
@@ -74,8 +74,7 @@ struct VMMouseState {
static void vmmouse_get_data(uint32_t *data)
{
- X86CPU *cpu = X86_CPU(current_cpu);
- CPUX86State *env = >env;
+ CPUX86State *env = cpu_env(CPU(current_cpu));
No need for the CPU() cast here, current_cpu is already
of type "CPUState *".
Yes, Paolo noticed and I fixed for v2.
I'll stop here, please respin with the cpu_env(CPU(current_cpu)) fixed to
cpu_env(current_cpu), and please split the patch by target CPU types.
Well I don't know, this is an reproducible mechanical patch..
But indeed as Paolo you found an optimization so worth not making
human review a pain.
I was about to post v2 but I'll see how to split.
Thanks for the review!
Phil.
Re: spapr watchdog vs watchdog_perform_action() / QMP watchdog-set-action
Peter Maydell writes: > Hi; one of the "bitesized tasks" we have listed is to convert > watchdog timers which directly call qemu_system_reset_request() on > watchdog timeout to call watchdog_perform_action() instead. This > means they honour the QMP commands that let the user specifiy > the behaviour on watchdog expiry: > https://www.qemu.org/docs/master/interop/qemu-qmp-ref.html#qapidoc-141 > https://www.qemu.org/docs/master/interop/qemu-qmp-ref.html#qapidoc-129 > (choices include reset, power off the system, do nothing, etc). > > There are only a few remaining watchdogs that don't use the > watchdog_perform_action() function. In most cases the change > is obvious and easy: just make them do that instead of calling > qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET). > > However, the hw/watchdog/spapr_watchdog.c case is trickier. As > far as I can tell from the sources, this is a watchdog set up via > a hypercall, and the guest makes a choice of "power off, restart, > or dump and restart" for its on-expiry action. > > What should this watchdog's interaction with the watchdog-set-action > QMP command be? If the user says "do X" and the guest says "do Y", > which do we do? (With the current code, we always honour what > the guest asks for and ignore what the user asks for.) Gut reaction: when the user says "do X", the guest should not get a say. But one of the values of X could be "whatever the guest says". > (The bitesized task for watchdog_perform_action() is > https://gitlab.com/qemu-project/qemu/-/issues/2124 . For the > purposes of this email thread I'm only after a concrete decision > about what we think the right thing is, not for any code. Then > I can write that up in the bug for potential new contributors.) > > thanks > -- PMM
[PATCH 1/3] hw/display : Add device DM163
This device implements the IM120417002 colors shield v1.1 for Arduino
(which relies on the DM163 8x3-channel led driving logic) and features
a simple display of an 8x8 RGB matrix. The columns of the matrix are
driven by the DM163 and the rows are driven externally.
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
hw/display/Kconfig | 3 +
hw/display/dm163.c | 307 +
hw/display/meson.build | 1 +
hw/display/trace-events| 13 ++
include/hw/display/dm163.h | 57 +++
5 files changed, 381 insertions(+)
create mode 100644 hw/display/dm163.c
create mode 100644 include/hw/display/dm163.h
diff --git a/hw/display/Kconfig b/hw/display/Kconfig
index 1aafe1923d..4dbfc6e7af 100644
--- a/hw/display/Kconfig
+++ b/hw/display/Kconfig
@@ -139,3 +139,6 @@ config XLNX_DISPLAYPORT
bool
# defaults to "N", enabled by specific boards
depends on PIXMAN
+
+config DM163
+bool
diff --git a/hw/display/dm163.c b/hw/display/dm163.c
new file mode 100644
index 00..565fc84ddf
--- /dev/null
+++ b/hw/display/dm163.c
@@ -0,0 +1,307 @@
+/*
+ * QEMU DM163 8x3-channel constant current led driver
+ * driving columns of associated 8x8 RGB matrix.
+ *
+ * Copyright (C) 2024 Samuel Tardieu
+ * Copyright (C) 2024 Arnaud Minier
+ * Copyright (C) 2024 Inès Varhol
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+/*
+ * The reference used for the DM163 is the following :
+ * http://www.siti.com.tw/product/spec/LED/DM163.pdf
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "migration/vmstate.h"
+#include "hw/irq.h"
+#include "hw/qdev-properties.h"
+#include "hw/display/dm163.h"
+#include "ui/console.h"
+#include "trace.h"
+
+#define LED_SQUARE_SIZE 100
+/* Number of frames a row stays visible after being turned off. */
+#define ROW_PERSISTANCE 2
+
+static const VMStateDescription vmstate_dm163 = {
+.name = TYPE_DM163,
+.version_id = 1,
+.minimum_version_id = 1,
+.fields = (const VMStateField[]) {
+VMSTATE_UINT8(activated_rows, DM163State),
+VMSTATE_UINT64_ARRAY(bank0_shift_register, DM163State, 3),
+VMSTATE_UINT64_ARRAY(bank1_shift_register, DM163State, 3),
+VMSTATE_UINT16_ARRAY(latched_outputs, DM163State, DM163_NUM_LEDS),
+VMSTATE_UINT16_ARRAY(outputs, DM163State, DM163_NUM_LEDS),
+VMSTATE_UINT8(dck, DM163State),
+VMSTATE_UINT8(en_b, DM163State),
+VMSTATE_UINT8(lat_b, DM163State),
+VMSTATE_UINT8(rst_b, DM163State),
+VMSTATE_UINT8(selbk, DM163State),
+VMSTATE_UINT8(sin, DM163State),
+VMSTATE_UINT32_2DARRAY(buffer, DM163State,
+COLOR_BUFFER_SIZE + 1, RGB_MATRIX_NUM_COLS),
+VMSTATE_UINT8(last_buffer_idx, DM163State),
+VMSTATE_UINT8_ARRAY(buffer_idx_of_row, DM163State,
RGB_MATRIX_NUM_ROWS),
+VMSTATE_UINT8_ARRAY(age_of_row, DM163State, RGB_MATRIX_NUM_ROWS),
+VMSTATE_END_OF_LIST()
+}
+};
+
+static void dm163_reset_hold(Object *obj)
+{
+DM163State *s = DM163(obj);
+
+/* Reset only stops the PWM. */
+memset(s->outputs, 0, sizeof(s->outputs));
+
+/* The last row of the buffer stores a turned off row */
+memset(s->buffer[COLOR_BUFFER_SIZE], 0, sizeof(s->buffer[0]));
+}
+
+static void dm163_dck_gpio_handler(void *opaque, int line, int new_state)
+{
+DM163State *s = DM163(opaque);
+
+if (new_state && !s->dck) {
+/*
+ * On raising dck, sample selbk to get the bank to use, and
+ * sample sin for the bit to enter into the bank shift buffer.
+ */
+uint64_t *sb =
+s->selbk ? s->bank1_shift_register : s->bank0_shift_register;
+/* Output the outgoing bit on sout */
+const bool sout = (s->selbk ? sb[2] & MAKE_64BIT_MASK(63, 1) :
+ sb[2] & MAKE_64BIT_MASK(15, 1)) != 0;
+qemu_set_irq(s->sout, sout);
+/* Enter sin into the shift buffer */
+sb[2] = (sb[2] << 1) | ((sb[1] >> 63) & 1);
+sb[1] = (sb[1] << 1) | ((sb[0] >> 63) & 1);
+sb[0] = (sb[0] << 1) | s->sin;
+}
+
+s->dck = new_state;
+trace_dm163_dck(new_state);
+}
+
+static void dm163_propagate_outputs(DM163State *s)
+{
+s->last_buffer_idx = (s->last_buffer_idx + 1) % COLOR_BUFFER_SIZE;
+/* Values are output when reset and enable are both high. */
+if (s->rst_b && !s->en_b) {
+memcpy(s->outputs, s->latched_outputs, sizeof(s->outputs));
+} else {
+memset(s->outputs, 0, sizeof(s->outputs));
+}
+for (unsigned x = 0; x < RGB_MATRIX_NUM_COLS; x++) {
+trace_dm163_channels(3 * x, (uint8_t)(s->outputs[3 * x] >> 6));
+trace_dm163_channels(3 * x + 1, (uint8_t)(s->outputs[3 * x + 1] >> 6));
+trace_dm163_channels(3 * x + 2, (uint8_t)(s->outputs[3 * x + 2] >> 6));
+s->buffer[s->last_buffer_idx][x] =
+(s->outputs[3 * x + 2] >> 6) |
+((s->outputs[3 * x + 1] << 2) & 0xFF00) |
[PATCH 3/3] tests/qtest : Add testcase for DM163
`test_dm163_bank()`
Checks that the pin "sout" of the DM163 led driver outputs the values
received on pin "sin" with the expected latency (depending on the bank).
`test_dm163_gpio_connection()`
Check that changes to relevant STM32L4x5 GPIO pins are prpagated to the
DM163 device.
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
tests/qtest/dm163-test.c | 192 +++
tests/qtest/meson.build | 1 +
2 files changed, 193 insertions(+)
create mode 100644 tests/qtest/dm163-test.c
diff --git a/tests/qtest/dm163-test.c b/tests/qtest/dm163-test.c
new file mode 100644
index 00..7691ce1af0
--- /dev/null
+++ b/tests/qtest/dm163-test.c
@@ -0,0 +1,192 @@
+/*
+ * QTest testcase for DM163
+ *
+ * Copyright (C) 2024 Samuel Tardieu
+ * Copyright (C) 2024 Arnaud Minier
+ * Copyright (C) 2024 Inès Varhol
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "libqtest.h"
+
+#define SIN 8
+#define DCK 9
+#define RST_B 10
+#define LAT_B 11
+#define SELBK 12
+#define EN_B 13
+
+#define DEVICE_NAME "/machine/soc/dm163"
+#define GPIO_OUT(name, value) qtest_set_irq_in(qts, DEVICE_NAME, NULL, name,
\
+ value)
+#define GPIO_PULSE(name)
\
+ do {
\
+GPIO_OUT(name, 1);
\
+GPIO_OUT(name, 0);
\
+ } while (0)
+
+
+static void rise_gpio_pin_dck(QTestState *qts)
+{
+/* Configure output mode for pin PB1 */
+qtest_writel(qts, 0x48000400, 0xFEB7);
+/* Write 1 in ODR for PB1 */
+qtest_writel(qts, 0x48000414, 0x0002);
+}
+
+static void lower_gpio_pin_dck(QTestState *qts)
+{
+/* Configure output mode for pin PB1 */
+qtest_writel(qts, 0x48000400, 0xFEB7);
+/* Write 0 in ODR for PB1 */
+qtest_writel(qts, 0x48000414, 0x);
+}
+
+static void rise_gpio_pin_selbk(QTestState *qts)
+{
+/* Configure output mode for pin PC5 */
+qtest_writel(qts, 0x48000800, 0xF7FF);
+/* Write 1 in ODR for PC5 */
+qtest_writel(qts, 0x48000814, 0x0020);
+}
+
+static void lower_gpio_pin_selbk(QTestState *qts)
+{
+/* Configure output mode for pin PC5 */
+qtest_writel(qts, 0x48000800, 0xF7FF);
+/* Write 0 in ODR for PC5 */
+qtest_writel(qts, 0x48000814, 0x);
+}
+
+static void rise_gpio_pin_lat_b(QTestState *qts)
+{
+/* Configure output mode for pin PC4 */
+qtest_writel(qts, 0x48000800, 0xFDFF);
+/* Write 1 in ODR for PC4 */
+qtest_writel(qts, 0x48000814, 0x0010);
+}
+
+static void lower_gpio_pin_lat_b(QTestState *qts)
+{
+/* Configure output mode for pin PC4 */
+qtest_writel(qts, 0x48000800, 0xFDFF);
+/* Write 0 in ODR for PC4 */
+qtest_writel(qts, 0x48000814, 0x);
+}
+
+static void rise_gpio_pin_rst_b(QTestState *qts)
+{
+/* Configure output mode for pin PC3 */
+qtest_writel(qts, 0x48000800, 0xFF7F);
+/* Write 1 in ODR for PC3 */
+qtest_writel(qts, 0x48000814, 0x0008);
+}
+
+static void lower_gpio_pin_rst_b(QTestState *qts)
+{
+/* Configure output mode for pin PC3 */
+qtest_writel(qts, 0x48000800, 0xFF7F);
+/* Write 0 in ODR for PC3 */
+qtest_writel(qts, 0x48000814, 0x);
+}
+
+static void rise_gpio_pin_sin(QTestState *qts)
+{
+/* Configure output mode for pin PA4 */
+qtest_writel(qts, 0x4800, 0xFDFF);
+/* Write 1 in ODR for PA4 */
+qtest_writel(qts, 0x4814, 0x0010);
+}
+
+static void lower_gpio_pin_sin(QTestState *qts)
+{
+/* Configure output mode for pin PA4 */
+qtest_writel(qts, 0x4800, 0xFDFF);
+/* Write 0 in ODR for PA4 */
+qtest_writel(qts, 0x4814, 0x);
+}
+
+static void test_dm163_bank(const void *opaque)
+{
+const long bank = (uintptr_t) opaque;
+const int width = bank ? 192 : 144;
+
+QTestState *qts = qtest_initf("-M b-l475e-iot01a");
+qtest_irq_intercept_out_named(qts, DEVICE_NAME, "sout");
+GPIO_OUT(RST_B, 1);
+GPIO_OUT(EN_B, 0);
+GPIO_OUT(DCK, 0);
+GPIO_OUT(SELBK, bank);
+GPIO_OUT(LAT_B, 1);
+
+/* Fill bank with zeroes */
+GPIO_OUT(SIN, 0);
+for (int i = 0; i < width; i++) {
+GPIO_PULSE(DCK);
+}
+/* Fill bank with ones, check that we get the previous zeroes */
+GPIO_OUT(SIN, 1);
+for (int i = 0; i < width; i++) {
+GPIO_PULSE(DCK);
+g_assert(!qtest_get_irq(qts, 0));
+}
+
+/* Pulse one more bit in the bank, check that we get a one */
+GPIO_PULSE(DCK);
+g_assert(qtest_get_irq(qts, 0));
+
+qtest_quit(qts);
+}
+
+static void test_dm163_gpio_connection(void)
+{
+QTestState *qts = qtest_init("-M b-l475e-iot01a");
+qtest_irq_intercept_in(qts, "/machine/soc/dm163");
+
+
[PATCH 0/3] Add device DM163 (led driver, matrix colors shield & display)
This device implements the IM120417002 colors shield v1.1 for Arduino (which relies on the DM163 8x3-channel led driving logic) and features a simple display of an 8x8 RGB matrix. This color shield can be plugged on the Arduino board (or the B-L475E-IOT01A board) to drive an 8x8 RGB led matrix. This RGB led matrix takes advantage of retinal persistance to seemingly display different colors in each row. It'd be convenient to set the QEMU console's refresh rate in order to ensure that the delay before turning off rows (2 frames currently) isn't too short. However `dpy_ui_info_supported(s->console)` can't be used. I saw that Kconfig configurable components aren't visible in C files, does that mean it's impossible to make the DM163 device optional when using the B-L475E-IOT01A board? Based-on: 20240123122505.516393-1-ines.var...@telecom-paris.fr ([PATCH v3 0/3] Add device STM32L4x5 GPIO) Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol Inès Varhol (3): hw/display : Add device DM163 hw/arm : Connect DM163 to STM32L4x5 tests/qtest : Add testcase for DM163 hw/arm/Kconfig | 1 + hw/arm/stm32l4x5_soc.c | 55 +- hw/display/Kconfig | 3 + hw/display/dm163.c | 307 + hw/display/meson.build | 1 + hw/display/trace-events| 13 ++ include/hw/arm/stm32l4x5_soc.h | 3 + include/hw/display/dm163.h | 57 ++ tests/qtest/dm163-test.c | 192 + tests/qtest/meson.build| 1 + 10 files changed, 632 insertions(+), 1 deletion(-) create mode 100644 hw/display/dm163.c create mode 100644 include/hw/display/dm163.h create mode 100644 tests/qtest/dm163-test.c -- 2.43.0
[PATCH 2/3] hw/arm : Connect DM163 to STM32L4x5
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
hw/arm/Kconfig | 1 +
hw/arm/stm32l4x5_soc.c | 55 +-
include/hw/arm/stm32l4x5_soc.h | 3 ++
3 files changed, 58 insertions(+), 1 deletion(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 3e49b913f8..818aa2f1a2 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -463,6 +463,7 @@ config STM32L4X5_SOC
select STM32L4X5_SYSCFG
select STM32L4X5_RCC
select STM32L4X5_GPIO
+select DM163
config XLNX_ZYNQMP_ARM
bool
diff --git a/hw/arm/stm32l4x5_soc.c b/hw/arm/stm32l4x5_soc.c
index 478c6ba056..8663546901 100644
--- a/hw/arm/stm32l4x5_soc.c
+++ b/hw/arm/stm32l4x5_soc.c
@@ -26,7 +26,9 @@
#include "qapi/error.h"
#include "exec/address-spaces.h"
#include "sysemu/sysemu.h"
+#include "hw/core/split-irq.h"
#include "hw/arm/stm32l4x5_soc.h"
+#include "hw/display/dm163.h"
#include "hw/qdev-clock.h"
#include "hw/misc/unimp.h"
@@ -78,6 +80,31 @@ static const int exti_irq[NUM_EXTI_IRQ] = {
#define RCC_BASE_ADDRESS 0x40021000
#define RCC_IRQ 5
+/*
+ * There are actually 14 input pins in the DM163 device.
+ * Here the DM163 input pin EN isn't connected to the STM32L4x5
+ * GPIOs as the IM120417002 colors shield doesn't actually use
+ * this pin to drive the RGB matrix.
+ */
+#define NUM_DM163_INPUTS 13
+
+static const int dm163_input[NUM_DM163_INPUTS] = {
+1 * 16 + 2, /* ROW0 PB2 */
+0 * 16 + 15, /* ROW1 PA15 */
+0 * 16 + 2, /* ROW2 PA2 */
+0 * 16 + 7, /* ROW3 PA7 */
+0 * 16 + 6, /* ROW4 PA6 */
+0 * 16 + 5, /* ROW5 PA5 */
+1 * 16 + 0, /* ROW6 PB0 */
+0 * 16 + 3, /* ROW7 PA3 */
+0 * 16 + 4, /* SIN (SDA) PA4 */
+1 * 16 + 1, /* DCK (SCK) PB1 */
+2 * 16 + 3, /* RST_B (RST) PC3 */
+2 * 16 + 4, /* LAT_B (LAT) PC4 */
+2 * 16 + 5, /* SELBK (SB) PC5 */
+};
+
+
static const uint32_t gpio_addr[] = {
0x4800,
0x48000400,
@@ -116,6 +143,8 @@ static void stm32l4x5_soc_initfn(Object *obj)
g_autofree char *name = g_strdup_printf("gpio%c", 'a' + i);
object_initialize_child(obj, name, >gpio[i], TYPE_STM32L4X5_GPIO);
}
+
+object_initialize_child(obj, "dm163", >dm163, TYPE_DM163);
}
static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp)
@@ -124,9 +153,10 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc,
Error **errp)
Stm32l4x5SocState *s = STM32L4X5_SOC(dev_soc);
const Stm32l4x5SocClass *sc = STM32L4X5_SOC_GET_CLASS(dev_soc);
MemoryRegion *system_memory = get_system_memory();
-DeviceState *armv7m, *dev;
+DeviceState *armv7m, *dev, *gpio_output_fork;
SysBusDevice *busdev;
uint32_t pin_index;
+int gpio, pin;
if (!memory_region_init_rom(>flash, OBJECT(dev_soc), "flash",
sc->flash_size, errp)) {
@@ -166,6 +196,12 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc,
Error **errp)
return;
}
+/* DM163 */
+dev = DEVICE(>dm163);
+if (!qdev_realize(dev, NULL, errp)) {
+return;
+}
+
/* GPIOs */
for (unsigned i = 0; i < NUM_GPIOS; i++) {
g_autofree char *name = g_strdup_printf("%c", 'A' + i);
@@ -204,6 +240,23 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc,
Error **errp)
}
}
+for (unsigned i = 0; i < NUM_DM163_INPUTS; i++) {
+gpio_output_fork = qdev_new(TYPE_SPLIT_IRQ);
+qdev_prop_set_uint32(gpio_output_fork, "num-lines", 2);
+qdev_realize_and_unref(gpio_output_fork, NULL, _fatal);
+
+qdev_connect_gpio_out(gpio_output_fork, 0,
+ qdev_get_gpio_in(DEVICE(>syscfg),
+ dm163_input[i]));
+qdev_connect_gpio_out(gpio_output_fork, 1,
+ qdev_get_gpio_in(DEVICE(>dm163),
+ i));
+gpio = dm163_input[i] / 16;
+pin = dm163_input[i] % 16;
+qdev_connect_gpio_out(DEVICE(>gpio[gpio]), pin,
+ qdev_get_gpio_in(DEVICE(gpio_output_fork), 0));
+}
+
/* EXTI device */
busdev = SYS_BUS_DEVICE(>exti);
if (!sysbus_realize(busdev, errp)) {
diff --git a/include/hw/arm/stm32l4x5_soc.h b/include/hw/arm/stm32l4x5_soc.h
index cb4da08629..60b31d430e 100644
--- a/include/hw/arm/stm32l4x5_soc.h
+++ b/include/hw/arm/stm32l4x5_soc.h
@@ -30,6 +30,7 @@
#include "hw/misc/stm32l4x5_exti.h"
#include "hw/misc/stm32l4x5_rcc.h"
#include "hw/gpio/stm32l4x5_gpio.h"
+#include "hw/display/dm163.h"
#include "qom/object.h"
#define TYPE_STM32L4X5_SOC "stm32l4x5-soc"
@@ -48,6 +49,8 @@ struct Stm32l4x5SocState {
Stm32l4x5RccState rcc;
Stm32l4x5GpioState gpio[NUM_GPIOS];
+DM163State dm163;
+
MemoryRegion sram1;
MemoryRegion sram2;
MemoryRegion flash;
--
2.43.0
[PATCH] target/arm: Reinstate "vfp" property on AArch32 CPUs
In commit 4315f7c614743 we restructured the logic for creating the
VFP related properties to avoid testing the aa32_simd_r32 feature on
AArch64 CPUs. However in the process we accidentally stopped
exposing the "vfp" QOM property on AArch32 TCG CPUs.
This mostly hasn't had any ill effects because not many people want
to disable VFP, but it wasn't intentional. Reinstate the property.
Cc: qemu-sta...@nongnu.org
Fixes: 4315f7c614743 ("target/arm: Restructure has_vfp_d32 test")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2098
Signed-off-by: Peter Maydell
---
target/arm/cpu.c | 4
1 file changed, 4 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 593695b4247..2bed5987619 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1620,6 +1620,10 @@ void arm_cpu_post_init(Object *obj)
}
} else if (cpu_isar_feature(aa32_vfp, cpu)) {
cpu->has_vfp = true;
+if (tcg_enabled() || qtest_enabled()) {
+qdev_property_add_static(DEVICE(obj),
+ _cpu_has_vfp_property);
+}
if (cpu_isar_feature(aa32_simd_r32, cpu)) {
cpu->has_vfp_d32 = true;
/*
--
2.34.1
Re: [PATCH v4 4/4] hw/misc/pvpanic: add support for normal shutdowns
Hi Thomas,
On 1/7/24 09:05, Thomas Weißschuh wrote:
Shutdown requests are normally hardware dependent.
By extending pvpanic to also handle shutdown requests, guests can
submit such requests with an easily implementable and cross-platform
mechanism.
Signed-off-by: Thomas Weißschuh
---
docs/specs/pvpanic.rst| 2 ++
hw/misc/pvpanic.c | 5 +
include/hw/misc/pvpanic.h | 3 ++-
3 files changed, 9 insertions(+), 1 deletion(-)
[snip]
-
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index a4982cc5928e..246f9ae4e992 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -40,6 +40,11 @@ static void handle_event(int event)
qemu_system_guest_crashloaded(NULL);
return;
}
+
+if (event & PVPANIC_SHUTDOWN) {
+qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
I would suggest that instead of directly requesting a system shutdown, we
should follow the same convention/handling of the other pvpanic events and emit
a QMP message signaling the specific event that took place, to help a
management layer application that might be listening to determine the cause of
the shutdown. It can also be a helpful signal to let us know if a guest is
(ab)using the new functionality.
If you agree with my reasoning and you'd allow me to piggyback on your series,
please add my complementary [PATCH 5/4] change that implements the suggestion:
--
From da4355344771206b69fc97d40ae9cc6510239e14 Mon Sep 17 00:00:00 2001
From: Alejandro Jimenez
Date: Fri, 26 Jan 2024 17:54:16 +
Subject: [PATCH 5/4] pvpanic: Emit GUEST_PVSHUTDOWN QMP event on pvpanic
shutdown signal
Emit a QMP event on receiving a PVPANIC_SHUTDOWN event. Even though a typical
SHUTDOWN event will be sent, it will be indistinguishable from a shutdown
originating from other cases (e.g. KVM exit due to KVM_SYSTEM_EVENT_SHUTDOWN)
that also issue the guest-shutdown cause.
A management layer application can detect the new GUEST_PVSHUTDOWN event to
determine if the guest is using the pvpanic interface to request shutdowns.
Signed-off-by: Alejandro Jimenez
---
To be applied on top of the series:
hw/misc/pvpanic: add support for normal shutdowns
https://lore.kernel.org/all/20240107-pvpanic-shutdown-v4-0-81500a7e4...@t-8ch.de/#t
---
hw/misc/pvpanic.c | 2 +-
include/sysemu/runstate.h | 1 +
qapi/run-state.json | 14 ++
system/runstate.c | 6 ++
4 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 246f9ae4e9..24001b9437 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -42,7 +42,7 @@ static void handle_event(int event)
}
if (event & PVPANIC_SHUTDOWN) {
-qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
+ qemu_system_guest_pvshutdown();
return;
}
}
diff --git a/include/sysemu/runstate.h b/include/sysemu/runstate.h
index 0117d243c4..e210a37abf 100644
--- a/include/sysemu/runstate.h
+++ b/include/sysemu/runstate.h
@@ -104,6 +104,7 @@ void qemu_system_killed(int signal, pid_t pid);
void qemu_system_reset(ShutdownCause reason);
void qemu_system_guest_panicked(GuestPanicInformation *info);
void qemu_system_guest_crashloaded(GuestPanicInformation *info);
+void qemu_system_guest_pvshutdown(void);
bool qemu_system_dump_in_progress(void);
#endif
diff --git a/qapi/run-state.json b/qapi/run-state.json
index 08bc99cb85..d5a63e14ba 100644
--- a/qapi/run-state.json
+++ b/qapi/run-state.json
@@ -460,6 +460,20 @@
{ 'event': 'GUEST_CRASHLOADED',
'data': { 'action': 'GuestPanicAction', '*info': 'GuestPanicInformation' } }
+##
+# @GUEST_PVSHUTDOWN:
+#
+# Emitted when guest submits a shutdown request via pvpanic interface
+#
+# Since: 8.3
+#
+# Example:
+#
+# <- { "event": "GUEST_PVSHUTDOWN",
+# "timestamp": { "seconds": 1648245259, "microseconds": 893771 } }
+##
+{ 'event': 'GUEST_PVSHUTDOWN' }
+
##
# @GuestPanicAction:
#
diff --git a/system/runstate.c b/system/runstate.c
index d6ab860eca..02b0a1f8b9 100644
--- a/system/runstate.c
+++ b/system/runstate.c
@@ -572,6 +572,12 @@ void qemu_system_guest_crashloaded(GuestPanicInformation
*info)
qapi_free_GuestPanicInformation(info);
}
+void qemu_system_guest_pvshutdown(void)
+{
+qapi_event_send_guest_pvshutdown();
+qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
+}
+
void qemu_system_reset_request(ShutdownCause reason)
{
if (reboot_action == REBOOT_ACTION_SHUTDOWN &&
--
2.39.3
+return;
+}
}
/* return supported events on read */
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 48f2ec4c86a1..9e36a02d5a4f 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -20,7 +20,8 @@
#define PVPANIC_PANICKED (1 << 0)
#define PVPANIC_CRASH_LOADED (1 << 1)
-#define PVPANIC_EVENTS (PVPANIC_PANICKED | PVPANIC_CRASH_LOADED)
+#define PVPANIC_SHUTDOWN (1 << 2)
+#define PVPANIC_EVENTS
Re: [PATCH v1 2/3] virtio-gpu.c: add resource_destroy class method
On Fri, 26 Jan 2024 at 17:22, Philippe Mathieu-Daudé wrote:
>
> Hi Manos,
>
> On 26/1/24 15:41, Manos Pitsidianakis wrote:
> > When destroying/unrefing resources, devices such as virtio-gpu-rutabaga
> > need to do their own bookkeeping (free rutabaga resources that are
> > associated with the virtio_gpu_simple_resource).
> >
> > This commit adds a class method so that virtio-gpu-rutabaga can override
> > it in the next commit.
> >
> > Signed-off-by: Manos Pitsidianakis
> > ---
> > hw/display/virtio-gpu.c| 19 ---
> > include/hw/virtio/virtio-gpu.h | 2 ++
> > 2 files changed, 18 insertions(+), 3 deletions(-)
>
>
> > static void virtio_gpu_resource_unref(VirtIOGPU *g,
> > @@ -1488,11 +1491,20 @@ static void virtio_gpu_device_unrealize(DeviceState
> > *qdev)
> > static void virtio_gpu_reset_bh(void *opaque)
> > {
> > VirtIOGPU *g = VIRTIO_GPU(opaque);
> > +VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g);
> > struct virtio_gpu_simple_resource *res, *tmp;
> > +int32_t result, resource_id;
> > int i = 0;
> >
> > QTAILQ_FOREACH_SAFE(res, >reslist, next, tmp) {
> > -virtio_gpu_resource_destroy(g, res);
> > +resource_id = res->resource_id;
> > +result = vgc->resource_destroy(g, res);
> > +if (result) {
> > +error_report("%s: %s resource_destroy"
> > + "for resource_id = %d failed with return value =
> > %d;",
>
> '%d' is for 'int', for 'int32_t' you need 'PRId32'.
Thanks,
> But why return that type instead of 'int'?
Because devices might use FFI, and other languages use fixed size
integers. Since rutabaga is the only one doing this right now, I used
their integer width.
> > + __func__, object_get_typename(OBJECT(g)),
> > resource_id,
> > + result);
> > +}
> > }
>
>
> > diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h
> > index 584ba2ed73..5683354236 100644
> > --- a/include/hw/virtio/virtio-gpu.h
> > +++ b/include/hw/virtio/virtio-gpu.h
> > @@ -219,6 +219,8 @@ struct VirtIOGPUClass {
> > void (*update_cursor_data)(VirtIOGPU *g,
> > struct virtio_gpu_scanout *s,
> > uint32_t resource_id);
> > +int32_t (*resource_destroy)(VirtIOGPU *g,
> > +struct virtio_gpu_simple_resource *res);
> > };
> >
> > struct VirtIOGPUGL {
>
Re: [PATCH 0/2] accel/kvm: Sanitize KVM_HAVE_MCE_INJECTION definition
On Wed, Jan 24, 2024 at 4:54 PM Philippe Mathieu-Daudé wrote: > > Trivial replacement of KVM_HAVE_MCE_INJECTION by > KVM_ARCH_HAVE_MCE_INJECTION (not the "ARCH_" difference). I am confused, why can't you just rename the symbol and instead you go through this change? Paolo > Philippe Mathieu-Daudé (2): > accel/kvm: Define KVM_ARCH_HAVE_MCE_INJECTION in each target > accel/kvm: Directly check KVM_ARCH_HAVE_MCE_INJECTION value in place > > include/sysemu/kvm.h | 7 ++- > target/arm/cpu-param.h | 5 + > target/arm/cpu.h | 4 > target/i386/cpu-param.h | 2 ++ > target/i386/cpu.h| 2 -- > target/loongarch/cpu-param.h | 2 ++ > target/mips/cpu-param.h | 2 ++ > target/ppc/cpu-param.h | 2 ++ > target/riscv/cpu-param.h | 2 ++ > target/s390x/cpu-param.h | 2 ++ > accel/kvm/kvm-all.c | 10 +- > 11 files changed, 28 insertions(+), 12 deletions(-) > > -- > 2.41.0 >
Re: [PULL 00/15] Migration 20240126 patches
On Fri, 26 Jan 2024 at 04:18, wrote: > > From: Peter Xu > > The following changes since commit 5bab95dc74d43bbb28c6a96d24c810a664432057: > > Merge tag 'pull-request-2024-01-24' of https://gitlab.com/thuth/qemu into > staging (2024-01-25 12:33:42 +) > > are available in the Git repository at: > > https://gitlab.com/peterx/qemu.git tags/migration-20240126-pull-request > > for you to fetch changes up to 24b0c2ec956ca225282f81470f7c26f5bb844885: > > Make 'uri' optional for migrate QAPI (2024-01-26 11:06:13 +0800) > > > Migration pull for 9.0 > > - Fabiano's patchset to fix migration state references in BHs > - Fabiano's new 'n-1' migration test for CI > - Het's fix on making "uri" optional in QMP migrate cmd > - Markus's HMP leak fix reported by Coverity > - Paolo's cleanup on uffd to replace u64 usage > - Peter's small migration cleanup series all over the places > > This fails CI on the AArch64 host: https://gitlab.com/qemu-project/qemu/-/jobs/6031311759 because it's trying to use the neoverse-n1 CPU with KVM. thanks -- PMM
Re: [PATCH v1 2/3] virtio-gpu.c: add resource_destroy class method
On Fri, 26 Jan 2024 at 20:09, Alex Bennée wrote:
>
> Manos Pitsidianakis writes:
>
> > When destroying/unrefing resources, devices such as virtio-gpu-rutabaga
> > need to do their own bookkeeping (free rutabaga resources that are
> > associated with the virtio_gpu_simple_resource).
> >
> > This commit adds a class method so that virtio-gpu-rutabaga can override
> > it in the next commit.
> >
> > Signed-off-by: Manos Pitsidianakis
> > ---
> > hw/display/virtio-gpu.c| 19 ---
> > include/hw/virtio/virtio-gpu.h | 2 ++
> > 2 files changed, 18 insertions(+), 3 deletions(-)
> >
> > diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c
> > index 2b73ae585b..96420ba74f 100644
> > --- a/hw/display/virtio-gpu.c
> > +++ b/hw/display/virtio-gpu.c
> > @@ -401,8 +401,9 @@ static void virtio_gpu_disable_scanout(VirtIOGPU *g,
> > int scanout_id)
> > scanout->height = 0;
> > }
> >
> > -static void virtio_gpu_resource_destroy(VirtIOGPU *g,
> > -struct virtio_gpu_simple_resource
> > *res)
> > +static int32_t
> > +virtio_gpu_resource_destroy(VirtIOGPU *g,
> > +struct virtio_gpu_simple_resource *res)
> > {
> > int i;
> >
> > @@ -419,6 +420,8 @@ static void virtio_gpu_resource_destroy(VirtIOGPU *g,
> > QTAILQ_REMOVE(>reslist, res, next);
> > g->hostmem -= res->hostmem;
> > g_free(res);
> > +
> > +return 0;
> > }
> >
> > static void virtio_gpu_resource_unref(VirtIOGPU *g,
> > @@ -1488,11 +1491,20 @@ static void virtio_gpu_device_unrealize(DeviceState
> > *qdev)
> > static void virtio_gpu_reset_bh(void *opaque)
> > {
> > VirtIOGPU *g = VIRTIO_GPU(opaque);
> > +VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g);
> > struct virtio_gpu_simple_resource *res, *tmp;
> > +int32_t result, resource_id;
> > int i = 0;
> >
> > QTAILQ_FOREACH_SAFE(res, >reslist, next, tmp) {
> > -virtio_gpu_resource_destroy(g, res);
> > +resource_id = res->resource_id;
> > +result = vgc->resource_destroy(g, res);
> > +if (result) {
> > +error_report("%s: %s resource_destroy"
> > + "for resource_id = %d failed with return value =
> > %d;",
> > + __func__, object_get_typename(OBJECT(g)),
> > resource_id,
> > + result);
> > +}
> > }
> >
> > for (i = 0; i < g->parent_obj.conf.max_outputs; i++) {
> > @@ -1632,6 +1644,7 @@ static void virtio_gpu_class_init(ObjectClass *klass,
> > void *data)
> > vgc->handle_ctrl = virtio_gpu_handle_ctrl;
> > vgc->process_cmd = virtio_gpu_simple_process_cmd;
> > vgc->update_cursor_data = virtio_gpu_update_cursor_data;
> > +vgc->resource_destroy = virtio_gpu_resource_destroy;
> > vgbc->gl_flushed = virtio_gpu_handle_gl_flushed;
> >
> > vdc->realize = virtio_gpu_device_realize;
> > diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h
> > index 584ba2ed73..5683354236 100644
> > --- a/include/hw/virtio/virtio-gpu.h
> > +++ b/include/hw/virtio/virtio-gpu.h
> > @@ -219,6 +219,8 @@ struct VirtIOGPUClass {
> > void (*update_cursor_data)(VirtIOGPU *g,
> > struct virtio_gpu_scanout *s,
> > uint32_t resource_id);
> > +int32_t (*resource_destroy)(VirtIOGPU *g,
> > +struct virtio_gpu_simple_resource
> > *res);
>
> What range of errors to you expect to have here? Otherwise you might as
> well return a bool for success/fail.
Rutabaga can return EINVAL or ESRCH.
> > };
> >
> > struct VirtIOGPUGL {
>
> --
> Alex Bennée
> Virtualisation Tech Lead @ Linaro
Re: [PATCH v1 2/3] virtio-gpu.c: add resource_destroy class method
Manos Pitsidianakis writes:
> When destroying/unrefing resources, devices such as virtio-gpu-rutabaga
> need to do their own bookkeeping (free rutabaga resources that are
> associated with the virtio_gpu_simple_resource).
>
> This commit adds a class method so that virtio-gpu-rutabaga can override
> it in the next commit.
>
> Signed-off-by: Manos Pitsidianakis
> ---
> hw/display/virtio-gpu.c| 19 ---
> include/hw/virtio/virtio-gpu.h | 2 ++
> 2 files changed, 18 insertions(+), 3 deletions(-)
>
> diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c
> index 2b73ae585b..96420ba74f 100644
> --- a/hw/display/virtio-gpu.c
> +++ b/hw/display/virtio-gpu.c
> @@ -401,8 +401,9 @@ static void virtio_gpu_disable_scanout(VirtIOGPU *g, int
> scanout_id)
> scanout->height = 0;
> }
>
> -static void virtio_gpu_resource_destroy(VirtIOGPU *g,
> -struct virtio_gpu_simple_resource
> *res)
> +static int32_t
> +virtio_gpu_resource_destroy(VirtIOGPU *g,
> +struct virtio_gpu_simple_resource *res)
> {
> int i;
>
> @@ -419,6 +420,8 @@ static void virtio_gpu_resource_destroy(VirtIOGPU *g,
> QTAILQ_REMOVE(>reslist, res, next);
> g->hostmem -= res->hostmem;
> g_free(res);
> +
> +return 0;
> }
>
> static void virtio_gpu_resource_unref(VirtIOGPU *g,
> @@ -1488,11 +1491,20 @@ static void virtio_gpu_device_unrealize(DeviceState
> *qdev)
> static void virtio_gpu_reset_bh(void *opaque)
> {
> VirtIOGPU *g = VIRTIO_GPU(opaque);
> +VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g);
> struct virtio_gpu_simple_resource *res, *tmp;
> +int32_t result, resource_id;
> int i = 0;
>
> QTAILQ_FOREACH_SAFE(res, >reslist, next, tmp) {
> -virtio_gpu_resource_destroy(g, res);
> +resource_id = res->resource_id;
> +result = vgc->resource_destroy(g, res);
> +if (result) {
> +error_report("%s: %s resource_destroy"
> + "for resource_id = %d failed with return value =
> %d;",
> + __func__, object_get_typename(OBJECT(g)),
> resource_id,
> + result);
> +}
> }
>
> for (i = 0; i < g->parent_obj.conf.max_outputs; i++) {
> @@ -1632,6 +1644,7 @@ static void virtio_gpu_class_init(ObjectClass *klass,
> void *data)
> vgc->handle_ctrl = virtio_gpu_handle_ctrl;
> vgc->process_cmd = virtio_gpu_simple_process_cmd;
> vgc->update_cursor_data = virtio_gpu_update_cursor_data;
> +vgc->resource_destroy = virtio_gpu_resource_destroy;
> vgbc->gl_flushed = virtio_gpu_handle_gl_flushed;
>
> vdc->realize = virtio_gpu_device_realize;
> diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h
> index 584ba2ed73..5683354236 100644
> --- a/include/hw/virtio/virtio-gpu.h
> +++ b/include/hw/virtio/virtio-gpu.h
> @@ -219,6 +219,8 @@ struct VirtIOGPUClass {
> void (*update_cursor_data)(VirtIOGPU *g,
> struct virtio_gpu_scanout *s,
> uint32_t resource_id);
> +int32_t (*resource_destroy)(VirtIOGPU *g,
> +struct virtio_gpu_simple_resource
> *res);
What range of errors to you expect to have here? Otherwise you might as
well return a bool for success/fail.
> };
>
> struct VirtIOGPUGL {
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Re: FW: [PATCH] vhost-user: add VIRTIO_F_IN_ORDER and VIRTIO_F_NOTIFICATION_DATA feature
On Fri, Jan 26, 2024 at 9:59 AM Wentao Jia wrote:
>
> Hi, Eugenio
>
> Thanks for you comments, Our team has made new change about the patch,
> these features in hw/virtio/virtio.h:DEFINE_VIRTIO_COMMON_FEATURES,
> they are turned off by default , and can be turned on from at qemu command
> line
> Do you have comments about this patch?
>
If the commandline is set to =on on an emulated device, we're back at
square one: The guest will try to use these features in the emulator
device and the kick or the descriptors exchange will fail.
Maybe we can propose their implementation in the emulated devices on
Google Summer of Code? Would you be interested in mentoring this? I
can help with it for sure.
On the other hand I'm not sure about the benefits of notification_data
for emulated devices or even vhost-kernel. My understanding is that
the data written cannot be passed with the eventfd, so QEMU should
fully vmexit to the iowrite (which probably is slower in the event of
a lot of notifications). Unless we can transmit the avail idx, the
device must read the avail ring anyway.
So the question for MST / Jason is, Is this enough justification to
maybe fail the initialization of virtio-net-pci devices with backends
different than vhost-user of vdpa if notification_data=on? Should this
be backed by profiled data?
In my opinion the emulated device should implement it and be =off by
default, just for testing the driver implementation. But maybe it can
be done on top after the early failure?
Thanks!
> Best Regards
> Wentao Jia
>
>
> VIRTIO_F_IN_ORDER and VIRTIO_F_NOTIFICATION_DATA feature are important feature
> for dpdk vdpa packets transmitting performance, add these features at
> vhost-user
> front-end to negotiation with backend.
>
> In this patch, these features are turned off by default, turn on the features
> at
> qemu command line.
> ... notification_data=on,in_order=on ...
>
> Signed-off-by: Wentao Jia
> Signed-off-by: Xinying Yu
> Signed-off-by: Kyle Xu
> Reviewed-by: Shujing Dong
> Reviewed-by: Rick Zhong
> ---
> hw/core/machine.c | 2 ++
> hw/net/vhost_net.c | 2 ++
> include/hw/virtio/virtio.h | 6 +-
> 3 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/hw/core/machine.c b/hw/core/machine.c
> index fb5afdcae4..40489c23a6 100644
> --- a/hw/core/machine.c
> +++ b/hw/core/machine.c
> @@ -40,6 +40,7 @@ GlobalProperty hw_compat_8_1[] = {
> { "ramfb", "x-migrate", "off" },
> { "vfio-pci-nohotplug", "x-ramfb-migrate", "off" },
> { "igb", "x-pcie-flr-init", "off" },
> +{ "virtio-device", "notification_data", "off"},
> };
> const size_t hw_compat_8_1_len = G_N_ELEMENTS(hw_compat_8_1);
>
> @@ -65,6 +66,7 @@ GlobalProperty hw_compat_7_1[] = {
> { "virtio-rng-pci", "vectors", "0" },
> { "virtio-rng-pci-transitional", "vectors", "0" },
> { "virtio-rng-pci-non-transitional", "vectors", "0" },
> +{ "virtio-device", "in_order", "off"},
> };
> const size_t hw_compat_7_1_len = G_N_ELEMENTS(hw_compat_7_1);
>
> diff --git a/hw/net/vhost_net.c b/hw/net/vhost_net.c
> index e8e1661646..211ca859a6 100644
> --- a/hw/net/vhost_net.c
> +++ b/hw/net/vhost_net.c
> @@ -76,6 +76,8 @@ static const int user_feature_bits[] = {
> VIRTIO_F_IOMMU_PLATFORM,
> VIRTIO_F_RING_PACKED,
> VIRTIO_F_RING_RESET,
> +VIRTIO_F_IN_ORDER,
> +VIRTIO_F_NOTIFICATION_DATA,
> VIRTIO_NET_F_RSS,
> VIRTIO_NET_F_HASH_REPORT,
> VIRTIO_NET_F_GUEST_USO4,
> diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h
> index c8f72850bc..e6aa10f01b 100644
> --- a/include/hw/virtio/virtio.h
> +++ b/include/hw/virtio/virtio.h
> @@ -368,7 +368,11 @@ typedef struct VirtIORNGConf VirtIORNGConf;
> DEFINE_PROP_BIT64("packed", _state, _field, \
>VIRTIO_F_RING_PACKED, false), \
> DEFINE_PROP_BIT64("queue_reset", _state, _field, \
> - VIRTIO_F_RING_RESET, true)
> + VIRTIO_F_RING_RESET, true), \
> +DEFINE_PROP_BIT64("in_order", _state, _field, \
> + VIRTIO_F_IN_ORDER, false), \
> +DEFINE_PROP_BIT64("notification_data", _state, _field, \
> + VIRTIO_F_NOTIFICATION_DATA, false)
>
> hwaddr virtio_queue_get_desc_addr(VirtIODevice *vdev, int n);
> bool virtio_queue_enabled_legacy(VirtIODevice *vdev, int n);
> --
> 2.31.1
>
> -Original Message-
> From: Rick Zhong
> Sent: Friday, January 19, 2024 6:39 PM
> To: Eugenio Perez Martin ; Wentao Jia
>
> Cc: qemu-devel@nongnu.org; m...@redhat.com; Jason Wang ;
> Peter Xu ; Guo Zhi
> Subject: 回复: FW: [PATCH] vhost-user: add VIRTIO_F_IN_ORDER and
> VIRTIO_F_NOTIFICATION_DATA feature
>
> Hi Eugenio,
>
> Thanks for your comments. Very helpful. Wentao and I will discuss and get
> back to you later.
>
> Also welcome for any comments from other guys.
>
> Best Regards,
> Rick Zhong
>
> -邮件原件-
> 发件人: Eugenio Perez Martin
> 发送时间: 2024年1月19日 18:26
> 收件人: Wentao Jia
>
[PATCH v4 28/47] hw/arm/npcm7xx: use qemu_configure_nic_device, allow emc0/emc1 as aliases
From: David Woodhouse
Also update the test to specify which device to attach the test socket
to, and remove the comment lamenting the fact that we can't do so.
Signed-off-by: David Woodhouse
---
hw/arm/npcm7xx.c | 16 +---
tests/qtest/npcm7xx_emc-test.c | 18 --
2 files changed, 13 insertions(+), 21 deletions(-)
diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c
index 15ff21d047..ee395864e4 100644
--- a/hw/arm/npcm7xx.c
+++ b/hw/arm/npcm7xx.c
@@ -655,8 +655,9 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp)
/*
* EMC Modules. Cannot fail.
- * The mapping of the device to its netdev backend works as follows:
- * emc[i] = nd_table[i]
+ * Use the available NIC configurations in order, allowing 'emc0' and
+ * 'emc1' to by used as aliases for the model= parameter to override.
+ *
* This works around the inability to specify the netdev property for the
* emc device: it's not pluggable and thus the -device option can't be
* used.
@@ -664,12 +665,13 @@ static void npcm7xx_realize(DeviceState *dev, Error
**errp)
QEMU_BUILD_BUG_ON(ARRAY_SIZE(npcm7xx_emc_addr) != ARRAY_SIZE(s->emc));
QEMU_BUILD_BUG_ON(ARRAY_SIZE(s->emc) != 2);
for (i = 0; i < ARRAY_SIZE(s->emc); i++) {
-s->emc[i].emc_num = i;
SysBusDevice *sbd = SYS_BUS_DEVICE(>emc[i]);
-if (nd_table[i].used) {
-qemu_check_nic_model(_table[i], TYPE_NPCM7XX_EMC);
-qdev_set_nic_properties(DEVICE(sbd), _table[i]);
-}
+char alias[6];
+
+s->emc[i].emc_num = i;
+snprintf(alias, sizeof(alias), "emc%u", i);
+qemu_configure_nic_device(DEVICE(sbd), true, alias);
+
/*
* The device exists regardless of whether it's connected to a QEMU
* netdev backend. So always instantiate it even if there is no
diff --git a/tests/qtest/npcm7xx_emc-test.c b/tests/qtest/npcm7xx_emc-test.c
index b046f1d76a..f7646fae2c 100644
--- a/tests/qtest/npcm7xx_emc-test.c
+++ b/tests/qtest/npcm7xx_emc-test.c
@@ -225,21 +225,11 @@ static int *packet_test_init(int module_num, GString
*cmd_line)
g_assert_cmpint(ret, != , -1);
/*
- * KISS and use -nic. We specify two nics (both emc{0,1}) because there's
- * currently no way to specify only emc1: The driver implicitly relies on
- * emc[i] == nd_table[i].
+ * KISS and use -nic. The driver accepts 'emc0' and 'emc1' as aliases
+ * in the 'model' field to specify the device to match.
*/
-if (module_num == 0) {
-g_string_append_printf(cmd_line,
- " -nic socket,fd=%d,model=" TYPE_NPCM7XX_EMC " "
- " -nic user,model=" TYPE_NPCM7XX_EMC " ",
- test_sockets[1]);
-} else {
-g_string_append_printf(cmd_line,
- " -nic user,model=" TYPE_NPCM7XX_EMC " "
- " -nic socket,fd=%d,model=" TYPE_NPCM7XX_EMC "
",
- test_sockets[1]);
-}
+g_string_append_printf(cmd_line, " -nic socket,fd=%d,model=emc%d ",
+ test_sockets[1], module_num);
g_test_queue_destroy(packet_test_clear, test_sockets);
return test_sockets;
--
2.43.0
[PATCH v4 43/47] hw/xtensa/xtfpga: use qemu_create_nic_device()
From: David Woodhouse
Signed-off-by: David Woodhouse
Reviewed-by: Thomas Huth
---
hw/xtensa/xtfpga.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
index fbad1c83a3..f49e6591dc 100644
--- a/hw/xtensa/xtfpga.c
+++ b/hw/xtensa/xtfpga.c
@@ -141,14 +141,16 @@ static void xtfpga_net_init(MemoryRegion *address_space,
hwaddr base,
hwaddr descriptors,
hwaddr buffers,
-qemu_irq irq, NICInfo *nd)
+qemu_irq irq)
{
DeviceState *dev;
SysBusDevice *s;
MemoryRegion *ram;
-dev = qdev_new("open_eth");
-qdev_set_nic_properties(dev, nd);
+dev = qemu_create_nic_device("open_eth", true, NULL);
+if (!dev) {
+return;
+}
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, _fatal);
@@ -301,10 +303,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board,
MachineState *machine)
memory_region_add_subregion(system_memory, board->io[1], io);
}
xtfpga_fpga_init(system_io, 0x0d02, freq);
-if (nd_table[0].used) {
-xtfpga_net_init(system_io, 0x0d03, 0x0d030400, 0x0d80,
-extints[1], nd_table);
-}
+xtfpga_net_init(system_io, 0x0d03, 0x0d030400, 0x0d80, extints[1]);
serial_mm_init(system_io, 0x0d050020, 2, extints[0],
115200, serial_hd(0), DEVICE_NATIVE_ENDIAN);
--
2.43.0
[PATCH v4 13/47] hw/mips/malta: use pci_init_nic_devices()
From: David Woodhouse
The Malta board setup code would previously place the first NIC into PCI
slot 11 if was a PCNet card, and the rest (including the first if it was
anything other than a PCNet card) would be dynamically assigned.
Now it will place any PCNet NIC into slot 11, and then anything else will
be dynamically assigned.
Signed-off-by: David Woodhouse
Reviewed-by: Thomas Huth
---
hw/mips/malta.c | 15 +++
1 file changed, 3 insertions(+), 12 deletions(-)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index d22bb1edef..af74008c82 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -612,18 +612,9 @@ static MaltaFPGAState *malta_fpga_init(MemoryRegion
*address_space,
/* Network support */
static void network_init(PCIBus *pci_bus)
{
-int i;
-
-for (i = 0; i < nb_nics; i++) {
-NICInfo *nd = _table[i];
-const char *default_devaddr = NULL;
-
-if (i == 0 && (!nd->model || strcmp(nd->model, "pcnet") == 0))
-/* The malta board has a PCNet card using PCI SLOT 11 */
-default_devaddr = "0b";
-
-pci_nic_init_nofail(nd, pci_bus, "pcnet", default_devaddr);
-}
+/* The malta board has a PCNet card using PCI SLOT 11 */
+pci_init_nic_in_slot(pci_bus, "pcnet", NULL, "0b");
+pci_init_nic_devices(pci_bus, "pcnet");
}
static void bl_setup_gt64120_jump_kernel(void **p, uint64_t run_addr,
--
2.43.0
[PATCH v4 14/47] hw/mips/loongson3_virt: use pci_init_nic_devices()
From: David Woodhouse
Signed-off-by: David Woodhouse
Reviewed-by: Thomas Huth
---
hw/mips/loongson3_virt.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/hw/mips/loongson3_virt.c b/hw/mips/loongson3_virt.c
index 33eae01eca..caedde2df0 100644
--- a/hw/mips/loongson3_virt.c
+++ b/hw/mips/loongson3_virt.c
@@ -451,9 +451,7 @@ static inline void loongson3_virt_devices_init(MachineState
*machine,
usb_create_simple(usb_bus_find(-1), "usb-tablet");
}
-for (i = 0; i < nb_nics; i++) {
-pci_nic_init_nofail(_table[i], pci_bus, mc->default_nic, NULL);
-}
+pci_init_nic_devices(pci_bus, mc->default_nic);
}
static void mips_loongson3_virt_init(MachineState *machine)
--
2.43.0
[PATCH v4 01/47] net: add qemu_{configure, create}_nic_device(), qemu_find_nic_info()
From: David Woodhouse
Most code which directly accesses nd_table[] and nb_nics uses them for
one of two things. Either "I have created a NIC device and I'd like a
configuration for it", or "I will create a NIC device *if* there is a
configuration for it". With some variants on the theme around whether
they actually *check* if the model specified in the configuration is
the right one.
Provide functions which perform both of those, allowing platforms to
be a little more consistent and as a step towards making nd_table[]
and nb_nics private to the net code.
One might argue that platforms ought to be consistent about whether
they create the unconfigured devices or not, but making significant
user-visible changes is explicitly *not* the intent right now.
The new functions leave the 'model' field of the NICInfo as NULL after
using it for the default NIC model, unlike the qemu_check_nic_model()
function which does set nd->model to match default_model explicitly.
This is acceptable because there is no code which consumes nd->model
except this NIC-matching code in net/net.c, and no reasonable excuse
for any code wanting to use nd->model in future.
Also export the qemu_find_nic_info() helper, as some platforms have
special cases they need to handle.
Signed-off-by: David Woodhouse
Reviewed-by: Paul Durrant
Reviewed-by: Thomas Huth
---
include/net/net.h | 40 +
net/net.c | 51 +++
2 files changed, 91 insertions(+)
diff --git a/include/net/net.h b/include/net/net.h
index ffbd2c8d56..dff1872b4d 100644
--- a/include/net/net.h
+++ b/include/net/net.h
@@ -207,7 +207,47 @@ int qemu_show_nic_models(const char *arg, const char
*const *models);
void qemu_check_nic_model(NICInfo *nd, const char *model);
int qemu_find_nic_model(NICInfo *nd, const char * const *models,
const char *default_model);
+/**
+ * qemu_find_nic_info: Obtain NIC configuration information
+ * @typename: Name of device object type
+ * @match_default: Match NIC configurations with no model specified
+ * @alias: Additional model string to match (for user convenience and
+ * backward compatibility).
+ *
+ * Search for a NIC configuration matching the NIC model constraints.
+ */
+NICInfo *qemu_find_nic_info(const char *typename, bool match_default,
+const char *alias);
+/**
+ * qemu_configure_nic_device: Apply NIC configuration to a given device
+ * @dev: Network device to be configured
+ * @match_default: Match NIC configurations with no model specified
+ * @alias: Additional model string to match
+ *
+ * Search for a NIC configuration for the provided device, using the
+ * additionally specified matching constraints. If found, apply the
+ * configuration using qdev_set_nic_properties() and return %true.
+ *
+ * This is used by platform code which creates the device anyway,
+ * regardless of whether there is a configuration for it. This tends
+ * to be platforms which ignore `--nodefaults` and create net devices
+ * anyway, for example because the Ethernet device on that board is
+ * always physically present.
+ */
+bool qemu_configure_nic_device(DeviceState *dev, bool match_default,
+ const char *alias);
+/**
+ * qemu_create_nic_device: Create a NIC device if a configuration exists for it
+ * @typename: Object typename of network device
+ * @match_default: Match NIC configurations with no model specified
+ * @alias: Additional model string to match
+ *
+ * Search for a NIC configuration for the provided device type. If found,
+ * create an object of the corresponding type and return it.
+ */
+DeviceState *qemu_create_nic_device(const char *typename, bool match_default,
+const char *alias);
void print_net_client(Monitor *mon, NetClientState *nc);
void net_socket_rs_init(SocketReadState *rs,
SocketReadStateFinalize *finalize,
diff --git a/net/net.c b/net/net.c
index 0520bc1681..aeb7f573fc 100644
--- a/net/net.c
+++ b/net/net.c
@@ -1087,6 +1087,57 @@ static int net_init_nic(const Netdev *netdev, const char
*name,
return idx;
}
+NICInfo *qemu_find_nic_info(const char *typename, bool match_default,
+const char *alias)
+{
+NICInfo *nd;
+int i;
+
+for (i = 0; i < nb_nics; i++) {
+nd = _table[i];
+
+if (!nd->used || nd->instantiated) {
+continue;
+}
+
+if ((match_default && !nd->model) || !g_strcmp0(nd->model, typename)
+|| (alias && !g_strcmp0(nd->model, alias))) {
+return nd;
+}
+}
+return NULL;
+}
+
+
+/* "I have created a device. Please configure it if you can" */
+bool qemu_configure_nic_device(DeviceState *dev, bool match_default,
+ const char *alias)
+{
+NICInfo *nd = qemu_find_nic_info(object_get_typename(OBJECT(dev)),
+
[PATCH v4 46/47] net: remove qemu_show_nic_models(), qemu_find_nic_model()
From: David Woodhouse
These old functions can be removed now too. Let net_param_nic() print
the full set of network devices directly, and also make it note that a
list more specific to this platform/config will be available by using
'-nic model=help' instead.
Signed-off-by: David Woodhouse
---
include/net/net.h | 3 ---
net/net.c | 39 ++-
2 files changed, 6 insertions(+), 36 deletions(-)
diff --git a/include/net/net.h b/include/net/net.h
index 00ee1af7ab..588ee55f28 100644
--- a/include/net/net.h
+++ b/include/net/net.h
@@ -203,9 +203,6 @@ void qemu_set_vnet_hdr_len(NetClientState *nc, int len);
int qemu_set_vnet_le(NetClientState *nc, bool is_le);
int qemu_set_vnet_be(NetClientState *nc, bool is_be);
void qemu_macaddr_default_if_unset(MACAddr *macaddr);
-int qemu_show_nic_models(const char *arg, const char *const *models);
-int qemu_find_nic_model(NICInfo *nd, const char * const *models,
-const char *default_model);
/**
* qemu_find_nic_info: Obtain NIC configuration information
* @typename: Name of device object type
diff --git a/net/net.c b/net/net.c
index ffd4b42d5a..d705e9b0fd 100644
--- a/net/net.c
+++ b/net/net.c
@@ -977,38 +977,6 @@ GPtrArray *qemu_get_nic_models(const char *device_type)
return nic_models;
}
-int qemu_show_nic_models(const char *arg, const char *const *models)
-{
-int i;
-
-if (!arg || !is_help_option(arg)) {
-return 0;
-}
-
-printf("Available NIC models:\n");
-for (i = 0 ; models[i]; i++) {
-printf("%s\n", models[i]);
-}
-return 1;
-}
-
-int qemu_find_nic_model(NICInfo *nd, const char * const *models,
-const char *default_model)
-{
-int i;
-
-if (!nd->model)
-nd->model = g_strdup(default_model);
-
-for (i = 0 ; models[i]; i++) {
-if (strcmp(nd->model, models[i]) == 0)
-return i;
-}
-
-error_report("Unsupported NIC model: %s", nd->model);
-return -1;
-}
-
static int net_init_nic(const Netdev *netdev, const char *name,
NetClientState *peer, Error **errp)
{
@@ -1791,9 +1759,14 @@ static int net_param_nic(void *dummy, QemuOpts *opts,
Error **errp)
}
if (is_help_option(type)) {
GPtrArray *nic_models = qemu_get_nic_models(TYPE_DEVICE);
+int i;
show_netdevs();
printf("\n");
-qemu_show_nic_models(type, (const char **)nic_models->pdata);
+printf("Available NIC models "
+ "(use -nic model=help for a filtered list):\n");
+for (i = 0 ; nic_models->pdata[i]; i++) {
+printf("%s\n", (char *)nic_models->pdata[i]);
+}
g_ptr_array_free(nic_models, true);
exit(0);
}
--
2.43.0
[PATCH v4 39/47] hw/openrisc/openrisc_sim: use qemu_create_nic_device()
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/openrisc/openrisc_sim.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index 35da123aef..bffd6f721f 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -170,7 +170,7 @@ static void openrisc_create_fdt(Or1ksimState *state,
static void openrisc_sim_net_init(Or1ksimState *state, hwaddr base, hwaddr
size,
int num_cpus, OpenRISCCPU *cpus[],
- int irq_pin, NICInfo *nd)
+ int irq_pin)
{
void *fdt = state->fdt;
DeviceState *dev;
@@ -178,8 +178,10 @@ static void openrisc_sim_net_init(Or1ksimState *state,
hwaddr base, hwaddr size,
char *nodename;
int i;
-dev = qdev_new("open_eth");
-qdev_set_nic_properties(dev, nd);
+dev = qemu_create_nic_device("open_eth", true, NULL);
+if (!dev) {
+return;
+}
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, _fatal);
@@ -313,12 +315,10 @@ static void openrisc_sim_init(MachineState *machine)
openrisc_create_fdt(state, or1ksim_memmap, smp_cpus, machine->ram_size,
machine->kernel_cmdline);
-if (nd_table[0].used) {
-openrisc_sim_net_init(state, or1ksim_memmap[OR1KSIM_ETHOC].base,
- or1ksim_memmap[OR1KSIM_ETHOC].size,
- smp_cpus, cpus,
- OR1KSIM_ETHOC_IRQ, nd_table);
-}
+openrisc_sim_net_init(state, or1ksim_memmap[OR1KSIM_ETHOC].base,
+ or1ksim_memmap[OR1KSIM_ETHOC].size,
+ smp_cpus, cpus,
+ OR1KSIM_ETHOC_IRQ);
if (smp_cpus > 1) {
openrisc_sim_ompic_init(state, or1ksim_memmap[OR1KSIM_OMPIC].base,
--
2.43.0
[PATCH v4 18/47] hw/sh4/r2d: use pci_init_nic_devices()
From: David Woodhouse Previously, the first PCI NIC would be assigned to slot 2 even if the user override the model and made it something other than an rtl8139 which is the default. Everything else would be dynamically assigned. Now, the first rtl8139 gets slot 2 and everything else is dynamic. Signed-off-by: David Woodhouse Reviewed-by: Yoshinori Sato --- hw/sh4/r2d.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index 4944994e9c..e9f316a6ce 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -240,7 +240,6 @@ static void r2d_init(MachineState *machine) MemoryRegion *sdram = g_new(MemoryRegion, 1); qemu_irq *irq; DriveInfo *dinfo; -int i; DeviceState *dev; SysBusDevice *busdev; MemoryRegion *address_space_mem = get_system_memory(); @@ -309,9 +308,8 @@ static void r2d_init(MachineState *machine) 0x555, 0x2aa, 0); /* NIC: rtl8139 on-board, and 2 slots. */ -for (i = 0; i < nb_nics; i++) -pci_nic_init_nofail(_table[i], pci_bus, -mc->default_nic, i == 0 ? "2" : NULL); +pci_init_nic_in_slot(pci_bus, mc->default_nic, NULL, "2"); +pci_init_nic_devices(pci_bus, mc->default_nic); /* USB keyboard */ usb_create_simple(usb_bus_find(-1), "usb-kbd"); -- 2.43.0
[PATCH v4 45/47] hw/pci: remove pci_nic_init_nofail()
From: David Woodhouse
This function is no longer used, as all its callers have been converted
to use pci_init_nic_devices() instead.
Signed-off-by: David Woodhouse
Reviewed-by: Thomas Huth
---
hw/pci/pci.c | 72
include/hw/pci/pci.h | 3 --
2 files changed, 75 deletions(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 5849606f66..449abfb182 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -1853,78 +1853,6 @@ const pci_class_desc *get_class_desc(int class)
return desc;
}
-/* Initialize a PCI NIC. */
-PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *rootbus,
- const char *default_model,
- const char *default_devaddr)
-{
-const char *devaddr = nd->devaddr ? nd->devaddr : default_devaddr;
-GPtrArray *pci_nic_models;
-PCIBus *bus;
-PCIDevice *pci_dev;
-DeviceState *dev;
-int devfn;
-int i;
-int dom, busnr;
-unsigned slot;
-
-if (nd->model && !strcmp(nd->model, "virtio")) {
-g_free(nd->model);
-nd->model = g_strdup("virtio-net-pci");
-}
-
-pci_nic_models = qemu_get_nic_models(TYPE_PCI_DEVICE);
-
-if (qemu_show_nic_models(nd->model, (const char **)pci_nic_models->pdata))
{
-exit(0);
-}
-
-i = qemu_find_nic_model(nd, (const char **)pci_nic_models->pdata,
-default_model);
-if (i < 0) {
-exit(1);
-}
-
-if (!rootbus) {
-error_report("No primary PCI bus");
-exit(1);
-}
-
-assert(!rootbus->parent_dev);
-
-if (!devaddr) {
-devfn = -1;
-busnr = 0;
-} else {
-if (pci_parse_devaddr(devaddr, , , , NULL) < 0) {
-error_report("Invalid PCI device address %s for device %s",
- devaddr, nd->model);
-exit(1);
-}
-
-if (dom != 0) {
-error_report("No support for non-zero PCI domains");
-exit(1);
-}
-
-devfn = PCI_DEVFN(slot, 0);
-}
-
-bus = pci_find_bus_nr(rootbus, busnr);
-if (!bus) {
-error_report("Invalid PCI device address %s for device %s",
- devaddr, nd->model);
-exit(1);
-}
-
-pci_dev = pci_new(devfn, nd->model);
-dev = _dev->qdev;
-qdev_set_nic_properties(dev, nd);
-pci_realize_and_unref(pci_dev, bus, _fatal);
-g_ptr_array_free(pci_nic_models, true);
-return pci_dev;
-}
-
void pci_init_nic_devices(PCIBus *bus, const char *default_model)
{
qemu_create_nic_bus_devices(>qbus, TYPE_PCI_DEVICE, default_model,
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 6ff0b95a02..eaa3fc99d8 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -314,9 +314,6 @@ void pci_device_set_intx_routing_notifier(PCIDevice *dev,
PCIINTxRoutingNotifier notifier);
void pci_device_reset(PCIDevice *dev);
-PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *rootbus,
- const char *default_model,
- const char *default_devaddr);
void pci_init_nic_devices(PCIBus *bus, const char *default_model);
bool pci_init_nic_in_slot(PCIBus *rootbus, const char *default_model,
const char *alias, const char *devaddr);
--
2.43.0
[PATCH v4 06/47] hw/xen: use qemu_create_nic_bus_devices() to instantiate Xen NICs
From: David Woodhouse
When instantiating XenBus itself, for each NIC which is configured with
either the model unspecified, or set to to "xen" or "xen-net-device",
create a corresponding xen-net-device for it.
Now we can revert the previous more hackish version which relied on the
platform code explicitly registering the NICs on its own XenBus, having
returned the BusState* from xen_bus_init() itself.
This also fixes the setup for Xen PV guests, which was previously broken
in various ways and never actually managed to peer with the netdev.
Signed-off-by: David Woodhouse
Reviewed-by: Paul Durrant
---
hw/i386/pc.c| 13 ++---
hw/i386/pc_piix.c | 2 +-
hw/i386/pc_q35.c| 2 +-
hw/xen/xen-bus.c| 6 --
hw/xen/xen_devconfig.c | 25 -
hw/xenpv/xen_machine_pv.c | 9 -
include/hw/i386/pc.h| 4 +---
include/hw/xen/xen-bus.h| 2 +-
include/hw/xen/xen-legacy-backend.h | 1 -
9 files changed, 10 insertions(+), 54 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index ebb0b1c667..196827531a 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1269,7 +1269,7 @@ void pc_basic_device_init(struct PCMachineState *pcms,
if (pcms->bus) {
pci_create_simple(pcms->bus, -1, "xen-platform");
}
-pcms->xenbus = xen_bus_init();
+xen_bus_init();
xen_be_init();
}
#endif
@@ -1297,8 +1297,7 @@ void pc_basic_device_init(struct PCMachineState *pcms,
pcms->vmport != ON_OFF_AUTO_ON);
}
-void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus,
- BusState *xen_bus)
+void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus)
{
MachineClass *mc = MACHINE_CLASS(pcmc);
bool default_is_ne2k = g_str_equal(mc->default_nic, TYPE_ISA_NE2000);
@@ -1306,14 +1305,6 @@ void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus,
PCIBus *pci_bus,
rom_set_order_override(FW_CFG_ORDER_OVERRIDE_NIC);
-if (xen_bus) {
-while ((nd = qemu_find_nic_info("xen-net-device", true, NULL))) {
-DeviceState *dev = qdev_new("xen-net-device");
-qdev_set_nic_properties(dev, nd);
-qdev_realize_and_unref(dev, xen_bus, _fatal);
-}
-}
-
while ((nd = qemu_find_nic_info(TYPE_ISA_NE2000, default_is_ne2k, NULL))) {
pc_init_ne2k_isa(isa_bus, nd, _fatal);
}
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index abfcfe4d2b..70d12bb1b5 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -339,7 +339,7 @@ static void pc_init1(MachineState *machine,
pc_basic_device_init(pcms, isa_bus, x86ms->gsi, rtc_state, true,
0x4);
-pc_nic_init(pcmc, isa_bus, pci_bus, pcms->xenbus);
+pc_nic_init(pcmc, isa_bus, pci_bus);
if (pcmc->pci_enabled) {
pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index f43d5142b8..7ca3f465e0 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -340,7 +340,7 @@ static void pc_q35_init(MachineState *machine)
/* the rest devices to which pci devfn is automatically assigned */
pc_vga_init(isa_bus, host_bus);
-pc_nic_init(pcmc, isa_bus, host_bus, pcms->xenbus);
+pc_nic_init(pcmc, isa_bus, host_bus);
if (machine->nvdimms_state->is_enabled) {
nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
diff --git a/hw/xen/xen-bus.c b/hw/xen/xen-bus.c
index 4973e7d9c9..fb82cc33e4 100644
--- a/hw/xen/xen-bus.c
+++ b/hw/xen/xen-bus.c
@@ -19,6 +19,7 @@
#include "qapi/error.h"
#include "qapi/qmp/qdict.h"
#include "sysemu/sysemu.h"
+#include "net/net.h"
#include "trace.h"
static char *xen_device_get_backend_path(XenDevice *xendev)
@@ -1133,7 +1134,7 @@ static void xen_register_types(void)
type_init(xen_register_types)
-BusState *xen_bus_init(void)
+void xen_bus_init(void)
{
DeviceState *dev = qdev_new(TYPE_XEN_BRIDGE);
BusState *bus = qbus_new(TYPE_XEN_BUS, dev, NULL);
@@ -1141,5 +1142,6 @@ BusState *xen_bus_init(void)
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), _fatal);
qbus_set_bus_hotplug_handler(bus);
-return bus;
+qemu_create_nic_bus_devices(bus, TYPE_XEN_DEVICE, "xen-net-device",
+"xen", "xen-net-device");
}
diff --git a/hw/xen/xen_devconfig.c b/hw/xen/xen_devconfig.c
index 3f77c675c6..2150869f60 100644
--- a/hw/xen/xen_devconfig.c
+++ b/hw/xen/xen_devconfig.c
@@ -46,31 +46,6 @@ static int xen_config_dev_all(char *fe, char *be)
/* - */
-int xen_config_dev_nic(NICInfo *nic)
-{
-char fe[256], be[256];
-char mac[20];
-int vlan_id = -1;
-
-net_hub_id_for_client(nic->netdev, _id);
-snprintf(mac, sizeof(mac), "%02x:%02x:%02x:%02x:%02x:%02x",
-
[PATCH v4 17/47] hw/ppc: use pci_init_nic_devices()
From: David Woodhouse
Signed-off-by: David Woodhouse
Reviewed-by: Thomas Huth
---
hw/ppc/e500.c | 4 +---
hw/ppc/mac_newworld.c | 4 +---
hw/ppc/mac_oldworld.c | 4 +---
hw/ppc/ppc440_bamboo.c | 14 +-
4 files changed, 8 insertions(+), 18 deletions(-)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 566f1200dd..3bd12b54ab 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -1079,9 +1079,7 @@ void ppce500_init(MachineState *machine)
if (pci_bus) {
/* Register network interfaces. */
-for (i = 0; i < nb_nics; i++) {
-pci_nic_init_nofail(_table[i], pci_bus, mc->default_nic, NULL);
-}
+pci_init_nic_devices(pci_bus, mc->default_nic);
}
/* Register spinning region */
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 535710314a..b36dbaf2b6 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -444,9 +444,7 @@ static void ppc_core99_init(MachineState *machine)
graphic_depth = 15;
}
-for (i = 0; i < nb_nics; i++) {
-pci_nic_init_nofail(_table[i], pci_bus, mc->default_nic, NULL);
-}
+pci_init_nic_devices(pci_bus, mc->default_nic);
/* The NewWorld NVRAM is not located in the MacIO device */
if (kvm_enabled() && qemu_real_host_page_size() > 4096) {
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index 9acc7adfc9..1981d3d8f6 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -277,9 +277,7 @@ static void ppc_heathrow_init(MachineState *machine)
pci_vga_init(pci_bus);
-for (i = 0; i < nb_nics; i++) {
-pci_nic_init_nofail(_table[i], pci_bus, mc->default_nic, NULL);
-}
+pci_init_nic_devices(pci_bus, mc->default_nic);
/* MacIO IDE */
ide_drive_get(hd, ARRAY_SIZE(hd));
diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c
index a189942de4..c75c3083e6 100644
--- a/hw/ppc/ppc440_bamboo.c
+++ b/hw/ppc/ppc440_bamboo.c
@@ -161,7 +161,6 @@ static void bamboo_init(MachineState *machine)
DeviceState *uicdev;
SysBusDevice *uicsbd;
int success;
-int i;
if (kvm_enabled()) {
error_report("machine %s does not support the KVM accelerator",
@@ -234,14 +233,11 @@ static void bamboo_init(MachineState *machine)
}
if (pcibus) {
-/* Register network interfaces. */
-for (i = 0; i < nb_nics; i++) {
-/*
- * There are no PCI NICs on the Bamboo board, but there are
- * PCI slots, so we can pick whatever default model we want.
- */
-pci_nic_init_nofail(_table[i], pcibus, mc->default_nic, NULL);
-}
+/*
+ * There are no PCI NICs on the Bamboo board, but there are
+ * PCI slots, so we can pick whatever default model we want.
+ */
+pci_init_nic_devices(pcibus, mc->default_nic);
}
/* Load kernel. */
--
2.43.0
[PATCH v4 23/47] hw/arm/exynos4: use qemu_create_nic_device()
From: David Woodhouse
Signed-off-by: David Woodhouse
Reviewed-by: Thomas Huth
---
hw/arm/exynos4_boards.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index b0e13eb4f0..003992189b 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -76,10 +76,8 @@ static void lan9215_init(uint32_t base, qemu_irq irq)
SysBusDevice *s;
/* This should be a 9215 but the 9118 is close enough */
-if (nd_table[0].used) {
-qemu_check_nic_model(_table[0], "lan9118");
-dev = qdev_new(TYPE_LAN9118);
-qdev_set_nic_properties(dev, _table[0]);
+dev = qemu_create_nic_device(TYPE_LAN9118, true, NULL);
+if (dev) {
qdev_prop_set_uint32(dev, "mode_16bit", 1);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, _fatal);
--
2.43.0
[PATCH v4 24/47] hw/arm/fsl: use qemu_configure_nic_device()
From: David Woodhouse
Signed-off-by: David Woodhouse
Reviewed-by: Thomas Huth
---
hw/arm/fsl-imx25.c | 2 +-
hw/arm/fsl-imx6.c | 2 +-
hw/arm/fsl-imx6ul.c | 2 +-
hw/arm/fsl-imx7.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
index 9d2fb75a68..a24fa7b443 100644
--- a/hw/arm/fsl-imx25.c
+++ b/hw/arm/fsl-imx25.c
@@ -170,7 +170,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error
**errp)
object_property_set_uint(OBJECT(>fec), "phy-num", s->phy_num,
_abort);
-qdev_set_nic_properties(DEVICE(>fec), _table[0]);
+qemu_configure_nic_device(DEVICE(>fec), true, NULL);
if (!sysbus_realize(SYS_BUS_DEVICE(>fec), errp)) {
return;
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index af2e982b05..afe9a59a81 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -383,7 +383,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
object_property_set_uint(OBJECT(>eth), "phy-num", s->phy_num,
_abort);
-qdev_set_nic_properties(DEVICE(>eth), _table[0]);
+qemu_configure_nic_device(DEVICE(>eth), true, NULL);
if (!sysbus_realize(SYS_BUS_DEVICE(>eth), errp)) {
return;
}
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index e37b69a5e1..ca3dd439ec 100644
--- a/hw/arm/fsl-imx6ul.c
+++ b/hw/arm/fsl-imx6ul.c
@@ -442,7 +442,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
s->phy_num[i], _abort);
object_property_set_uint(OBJECT(>eth[i]), "tx-ring-num",
FSL_IMX6UL_ETH_NUM_TX_RINGS, _abort);
-qdev_set_nic_properties(DEVICE(>eth[i]), _table[i]);
+qemu_configure_nic_device(DEVICE(>eth[i]), true, NULL);
sysbus_realize(SYS_BUS_DEVICE(>eth[i]), _abort);
sysbus_mmio_map(SYS_BUS_DEVICE(>eth[i]), 0,
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
index 474cfdc87c..1acbe065db 100644
--- a/hw/arm/fsl-imx7.c
+++ b/hw/arm/fsl-imx7.c
@@ -446,7 +446,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
s->phy_num[i], _abort);
object_property_set_uint(OBJECT(>eth[i]), "tx-ring-num",
FSL_IMX7_ETH_NUM_TX_RINGS, _abort);
-qdev_set_nic_properties(DEVICE(>eth[i]), _table[i]);
+qemu_configure_nic_device(DEVICE(>eth[i]), true, NULL);
sysbus_realize(SYS_BUS_DEVICE(>eth[i]), _abort);
sysbus_mmio_map(SYS_BUS_DEVICE(>eth[i]), 0, FSL_IMX7_ENETn_ADDR[i]);
--
2.43.0
[PATCH v4 07/47] hw/alpha/dp264: use pci_init_nic_devices()
From: David Woodhouse
Signed-off-by: David Woodhouse
Reviewed-by: Thomas Huth
---
hw/alpha/dp264.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index 03495e1e60..52a1fa310b 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -124,9 +124,7 @@ static void clipper_init(MachineState *machine)
pci_vga_init(pci_bus);
/* Network setup. e1000 is good enough, failing Tulip support. */
-for (i = 0; i < nb_nics; i++) {
-pci_nic_init_nofail(_table[i], pci_bus, mc->default_nic, NULL);
-}
+pci_init_nic_devices(pci_bus, mc->default_nic);
/* Super I/O */
isa_create_simple(isa_bus, TYPE_SMC37C669_SUPERIO);
--
2.43.0
[PATCH v4 41/47] hw/s390x/s390-virtio-ccw: use qemu_create_nic_device()
From: David Woodhouse
Signed-off-by: David Woodhouse
Acked-by: Thomas Huth
---
hw/s390x/s390-virtio-ccw.c | 11 ++-
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
index c99682b07d..62804cc228 100644
--- a/hw/s390x/s390-virtio-ccw.c
+++ b/hw/s390x/s390-virtio-ccw.c
@@ -229,16 +229,9 @@ static void s390_init_ipl_dev(const char *kernel_filename,
static void s390_create_virtio_net(BusState *bus, const char *name)
{
-int i;
-
-for (i = 0; i < nb_nics; i++) {
-NICInfo *nd = _table[i];
-DeviceState *dev;
-
-qemu_check_nic_model(nd, "virtio");
+DeviceState *dev;
-dev = qdev_new(name);
-qdev_set_nic_properties(dev, nd);
+while ((dev = qemu_create_nic_device(name, true, "virtio"))) {
qdev_realize_and_unref(dev, bus, _fatal);
}
}
--
2.43.0
[PATCH v4 30/47] hw/arm: use qemu_configure_nic_device()
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/arm/mps2-tz.c | 8 ++--
hw/arm/msf2-soc.c| 6 +-
hw/arm/musicpal.c| 3 +--
hw/arm/xilinx_zynq.c | 11 ---
hw/arm/xlnx-versal.c | 7 +--
hw/arm/xlnx-zynqmp.c | 8 +---
6 files changed, 10 insertions(+), 33 deletions(-)
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index 5d8cdc1a4c..a2d18afd79 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -503,14 +503,12 @@ static MemoryRegion *make_eth_dev(MPS2TZMachineState
*mms, void *opaque,
const PPCExtraData *extradata)
{
SysBusDevice *s;
-NICInfo *nd = _table[0];
/* In hardware this is a LAN9220; the LAN9118 is software compatible
* except that it doesn't support the checksum-offload feature.
*/
-qemu_check_nic_model(nd, "lan9118");
mms->lan9118 = qdev_new(TYPE_LAN9118);
-qdev_set_nic_properties(mms->lan9118, nd);
+qemu_configure_nic_device(mms->lan9118, true, NULL);
s = SYS_BUS_DEVICE(mms->lan9118);
sysbus_realize_and_unref(s, _fatal);
@@ -528,7 +526,6 @@ static MemoryRegion *make_eth_usb(MPS2TZMachineState *mms,
void *opaque,
* irqs[] is the ethernet IRQ.
*/
SysBusDevice *s;
-NICInfo *nd = _table[0];
memory_region_init(>eth_usb_container, OBJECT(mms),
"mps2-tz-eth-usb-container", 0x20);
@@ -537,9 +534,8 @@ static MemoryRegion *make_eth_usb(MPS2TZMachineState *mms,
void *opaque,
* In hardware this is a LAN9220; the LAN9118 is software compatible
* except that it doesn't support the checksum-offload feature.
*/
-qemu_check_nic_model(nd, "lan9118");
mms->lan9118 = qdev_new(TYPE_LAN9118);
-qdev_set_nic_properties(mms->lan9118, nd);
+qemu_configure_nic_device(mms->lan9118, true, NULL);
s = SYS_BUS_DEVICE(mms->lan9118);
sysbus_realize_and_unref(s, _fatal);
diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
index b5fe9f364d..35bf1d64e1 100644
--- a/hw/arm/msf2-soc.c
+++ b/hw/arm/msf2-soc.c
@@ -197,12 +197,8 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error
**errp)
g_free(bus_name);
}
-/* FIXME use qdev NIC properties instead of nd_table[] */
-if (nd_table[0].used) {
-qemu_check_nic_model(_table[0], TYPE_MSS_EMAC);
-qdev_set_nic_properties(DEVICE(>emac), _table[0]);
-}
dev = DEVICE(>emac);
+qemu_configure_nic_device(dev, true, NULL);
object_property_set_link(OBJECT(>emac), "ahb-bus",
OBJECT(get_system_memory()), _abort);
if (!sysbus_realize(SYS_BUS_DEVICE(>emac), errp)) {
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index 3200c9f68a..8781e99d27 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -1286,9 +1286,8 @@ static void musicpal_init(MachineState *machine)
}
sysbus_create_simple(TYPE_MV88W8618_FLASHCFG, MP_FLASHCFG_BASE, NULL);
-qemu_check_nic_model(_table[0], "mv88w8618");
dev = qdev_new(TYPE_MV88W8618_ETH);
-qdev_set_nic_properties(dev, _table[0]);
+qemu_configure_nic_device(dev, true, "mv88w8618");
object_property_set_link(OBJECT(dev), "dma-memory",
OBJECT(get_system_memory()), _fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), _fatal);
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index dbb9793aa1..73a6472b91 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -108,16 +108,13 @@ static void zynq_write_board_setup(ARMCPU *cpu,
static struct arm_boot_info zynq_binfo = {};
-static void gem_init(NICInfo *nd, uint32_t base, qemu_irq irq)
+static void gem_init(uint32_t base, qemu_irq irq)
{
DeviceState *dev;
SysBusDevice *s;
dev = qdev_new(TYPE_CADENCE_GEM);
-if (nd->used) {
-qemu_check_nic_model(nd, TYPE_CADENCE_GEM);
-qdev_set_nic_properties(dev, nd);
-}
+qemu_configure_nic_device(dev, true, NULL);
object_property_set_int(OBJECT(dev), "phy-addr", 7, _abort);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, _fatal);
@@ -279,8 +276,8 @@ static void zynq_init(MachineState *machine)
sysbus_create_varargs("cadence_ttc", 0xF8002000,
pic[69-IRQ_OFFSET], pic[70-IRQ_OFFSET], pic[71-IRQ_OFFSET], NULL);
-gem_init(_table[0], 0xE000B000, pic[54-IRQ_OFFSET]);
-gem_init(_table[1], 0xE000C000, pic[77-IRQ_OFFSET]);
+gem_init(0xE000B000, pic[54 - IRQ_OFFSET]);
+gem_init(0xE000C000, pic[77 - IRQ_OFFSET]);
for (n = 0; n < 2; n++) {
int hci_irq = n ? 79 : 56;
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index 9600551c44..01965ddf99 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -254,18 +254,13 @@ static void versal_create_gems(Versal *s, qemu_irq *pic)
static const int irqs[] = { VERSAL_GEM0_IRQ_0, VERSAL_GEM1_IRQ_0};
static const uint64_t addrs[] = { MM_GEM0, MM_GEM1 };
char *name =
[PATCH v4 25/47] hw/net/smc91c111: use qemu_configure_nic_device()
From: David Woodhouse
Some callers instantiate the device unconditionally, others will do so only
if there is a NICInfo to go with it. This appears to be fairly random, but
preserve the existing behaviour of each caller for now.
Signed-off-by: David Woodhouse
Reviewed-by: Thomas Huth
---
hw/arm/gumstix.c | 6 ++
hw/arm/integratorcp.c | 5 +++--
hw/arm/mainstone.c | 3 +--
hw/arm/realview.c | 25 ++---
hw/arm/versatilepb.c | 15 ---
hw/net/smc91c111.c | 5 ++---
include/hw/net/smc91c111.h | 2 +-
7 files changed, 23 insertions(+), 38 deletions(-)
diff --git a/hw/arm/gumstix.c b/hw/arm/gumstix.c
index 2ca4140c9f..f58c4da7f9 100644
--- a/hw/arm/gumstix.c
+++ b/hw/arm/gumstix.c
@@ -74,8 +74,7 @@ static void connex_init(MachineState *machine)
FLASH_SECTOR_SIZE, 2, 0, 0, 0, 0, 0);
/* Interrupt line of NIC is connected to GPIO line 36 */
-smc91c111_init(_table[0], 0x04000300,
-qdev_get_gpio_in(cpu->gpio, 36));
+smc91c111_init(0x04000300, qdev_get_gpio_in(cpu->gpio, 36));
}
static void verdex_init(MachineState *machine)
@@ -98,8 +97,7 @@ static void verdex_init(MachineState *machine)
FLASH_SECTOR_SIZE, 2, 0, 0, 0, 0, 0);
/* Interrupt line of NIC is connected to GPIO line 99 */
-smc91c111_init(_table[0], 0x04000300,
-qdev_get_gpio_in(cpu->gpio, 99));
+smc91c111_init(0x04000300, qdev_get_gpio_in(cpu->gpio, 99));
}
static void connex_class_init(ObjectClass *oc, void *data)
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index 1830e1d785..c56a2c1353 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -666,8 +666,9 @@ static void integratorcp_init(MachineState *machine)
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x1d00);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[25]);
-if (nd_table[0].used)
-smc91c111_init(_table[0], 0xc800, pic[27]);
+if (qemu_find_nic_info("smc91c111", true, NULL)) {
+smc91c111_init(0xc800, pic[27]);
+}
sysbus_create_simple("pl110", 0xc000, pic[22]);
diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c
index 68329c4617..84dbb6e525 100644
--- a/hw/arm/mainstone.c
+++ b/hw/arm/mainstone.c
@@ -153,8 +153,7 @@ static void mainstone_common_init(MachineState *machine,
qdev_get_gpio_in(mst_irq, S1_IRQ),
qdev_get_gpio_in(mst_irq, S1_CD_IRQ));
-smc91c111_init(_table[0], MST_ETH_PHYS,
-qdev_get_gpio_in(mst_irq, ETHERNET_IRQ));
+smc91c111_init(MST_ETH_PHYS, qdev_get_gpio_in(mst_irq, ETHERNET_IRQ));
mainstone_binfo.board_id = arm_id;
arm_load_kernel(mpu->cpu, machine, _binfo);
diff --git a/hw/arm/realview.c b/hw/arm/realview.c
index 132217b2ed..6e7529d98f 100644
--- a/hw/arm/realview.c
+++ b/hw/arm/realview.c
@@ -89,7 +89,6 @@ static void realview_init(MachineState *machine,
I2CBus *i2c;
int n;
unsigned int smp_cpus = machine->smp.cpus;
-int done_nic = 0;
qemu_irq cpu_irq[4];
int is_mpcore = 0;
int is_pb = 0;
@@ -295,24 +294,20 @@ static void realview_init(MachineState *machine,
n--;
}
}
-for(n = 0; n < nb_nics; n++) {
-nd = _table[n];
-
-if (!done_nic && (!nd->model ||
-strcmp(nd->model, is_pb ? "lan9118" : "smc91c111") == 0)) {
-if (is_pb) {
-lan9118_init(nd, 0x4e00, pic[28]);
-} else {
-smc91c111_init(nd, 0x4e00, pic[28]);
-}
-done_nic = 1;
+
+nd = qemu_find_nic_info(is_pb ? "lan9118" : "smc91c111", true, NULL);
+if (nd) {
+if (is_pb) {
+lan9118_init(nd, 0x4e00, pic[28]);
} else {
-if (pci_bus) {
-pci_nic_init_nofail(nd, pci_bus, "rtl8139", NULL);
-}
+smc91c111_init(0x4e00, pic[28]);
}
}
+if (pci_bus) {
+pci_init_nic_devices(pci_bus, "rtl8139");
+}
+
dev = sysbus_create_simple(TYPE_ARM_SBCON_I2C, 0x10002000, NULL);
i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c");
i2c_slave_create_simple(i2c, "ds1338", 0x68);
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index 4b2257787b..0517a65601 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -192,10 +192,8 @@ static void versatile_init(MachineState *machine, int
board_id)
SysBusDevice *busdev;
DeviceState *pl041;
PCIBus *pci_bus;
-NICInfo *nd;
I2CBus *i2c;
int n;
-int done_smc = 0;
DriveInfo *dinfo;
if (machine->ram_size > 0x1000) {
@@ -263,16 +261,11 @@ static void versatile_init(MachineState *machine, int
board_id)
sysbus_connect_irq(busdev, 3, sic[30]);
pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
-for(n = 0; n < nb_nics; n++) {
-nd = _table[n];
-
-
