[time-nuts] Frequency dividers
Randy In August you asked First off, what I am about to do is ask a REALLY STUPID question, but more and more of the GPS stuff I do is drifting towards the precision timing end of things, so I thought I should ask. I have been seeing a lot of traffic concerning making 10MHz frequency dividers using PIC's. While they provide an elegant solution to providing an accurate 1PPS from a precision source, I have to ask if there is a reason for going this route? I am just using three HCT40103 down counters hooked to a DS4000 to get what I think is a very stable 1PPS. Am I missing something? I realize 40103's are as old as dirt (I guess I am showing my 4000 series CMOS days), but the HCT series have plenty of bandwidth. Please be gentle As long as you have synchronously cascaded the HCT40103's the PPS stability will be reasonable. However if you need timing stability in the nanosecond region the temperature dependence of the clock to output propagation delay will be a problem if the temperature varies over a wide range. The rms timing jitter due to the dividers should be reasonably low (in the few hundred picosecond region), the relatively poor DS4000 oscillator phase noise will limit the PPS jitter to around 100 picoseconds rms. You can reduce the PPS jitter by resynchronising it to the clock using a 74AC74 (inherent jitter ~ 25-50 picoseconds). If the oscillator phase noise were sufficiently low one could use an ECL or similar high speed low jitter flipflop to resynchronise the PPS signal and reduce the PPS jitter to a few hundred picoseconds. Using a PIC or any other computer chip to divide down a clock signal to produce a PPS signal has the same problem in that the delay from the input clock to the PPS output will vary significantly if the temperature changes over a wide range. Simultaneous switching noise will also introduce jitter in the PPS output pulse if the PIC isn't always doing the the same thing at the PPS transitions. A dedicated external flipflop can be used to reduce the timing jitter to a few tens of picoseconds or less. However if a few nanoseconds matters when comparing with a GPS derived PPS signal then the GPS antenna, antenna cable (particularly if its length is greater than 100m ), and receiver will all need to be temperature controlled to stabilise the GPS derived PPS signal timing to better than a few nanoseconds. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Time interval counters
Hal Murray wrote: Suitable TDC chips are available from [1]http://www.acam.de/ [2]http:// www.acam.de/ In particular the TDC-GP1 has a resolution of better than 250picosec with a range of 200 millisec, which should be more than adequate for measuring the time delay between GPS and local standard derived PPS pulses. Although these chips are a little pricey at around the 100 euro mark they are a lot cheaper than an Agilent/HP 53131 or its equivalent. Has anybody tried kludging something together without using expensive parts? I'm guessing that the general idea is something like an R/C feeding an ADC. Hold the R/C reset until time1, then let it start charging up. At time2, shut the door on a sample/hold that's probably built into the front end of an ADC. Then wait until things calm down and read the ADC. If I start with a 10 MHz clock, that's 100 ns. An 8 bit ADC gives a span of 2.5 clocks for a resolution of 1 ns. Lots of handwaving here. A 1 ns resolution needs an ADC or S/H with an input bandwidth in the ballpark of a GHz. My quick scan for a cheap/fast ADC didn't find anything interesting. So this is probably a wild goose chase. I wonder if it is reasonable to calibrate a slower ADC. The input signal will be stable. Digikey has the TI TLC5540 at under $6. It says 75 MHz input bandwidth but 30 ps aperature jitter. (That's just the first one I looked at. There are probably better ones.) Suitable sample and holds are a little hard to come by these days. One traditional method of building a time to amplitude converter (TAC) is to use a bipolar transistor longtailed pair to charge an intially discharged capacitor for the duration of the short time to be measured/interpolated. An ADC then samples the capacitor voltage which is proportional to the capacitor charging time. With a modern capacitive charge redistribution ADC like the AD7450 there is no need for a buffer amplifier as the ADC input appears like a capacitor during the sampling phase. It is necessary is to allow the ADC input to settle after the longtailed pair is switched off, before beginning the ADC conversion cycle. Once the ADC conversion is complete the capacitor can be discharged by turning on a shunt small signal MOSFET. A long tailed pair using a pair of small signal RF transistors will switch the output current from one collector to the other in less than a nanosecond if suitably high cutoff frequency fast low capacitance transistors are transistors are used The collector current is at most a few hundred pA (at room temperature)when the transistor is turned off. A resolution of a around 250 picoseconds is possible with an interpolator range of 1microsec when a 12 bit ADC like the AD7450 is used. The long tailed pair switching time is limited by the emitter to emitter inductance when discrete transistors are used, an integrated pair with the emitters connected together on chip will switch faster than a discrete pair. The ADC need not have a particularly low jitter or fast acquisition time as the capacitor voltage is stable when sampling is complete. It is essential to use a low dielectric absorption capacitor such as a ceramic capacitor with a C0G/NP0 dielectric, although the low duty cycle in this application when making 1-2 measurements per second relaxes this requirement somewhat. Another traditional time interval interpolation technique is the Wilkinson technique where instead of sampling the capacitor voltage, the capacitor is discharged by a curreent say 1/1000 of the charge current, a comparator monitors the capacitor voltage an a counter measures the time for which the capacitor voltage is non zero. The conversion gain is only dependent on the ratio of the two current sources with a 10mA charge current and a 1uA discharge current a timing resolution of 10 picosec can be achieved with a 10MHz rundown clock. A fast low input bias current comparator with a latched output should be used to preserve the sensitivity and linearity of the conversion. The comparator is lached on for most of the rundown clock period and its input polarity is sampled only for a short time on say the falling edge of the rundown clock. The comparator output state is sampled half a rundown clock cycle later by a following D flipflop. This technique precludes the possibility of comparator oscillation due to input outpuut feedback (it only takes a fraction of a pF of stray capacitance to cause this with a high speed comparator). Using hysteresis, whilst avoiding oscillation, decreases the resolution of the comparator. A comparator resolution of less than 100uV is readily achieved with a suitable comparator. The output of the D flip flop is used to gate the interpolation counter. Alternatively the flipflop transitions can be used to sample a continuously running counter. At the end
[time-nuts] Time interval interpolation by sampling a pair of sinewaves in quadrature.
Yet another high resolution time interval interpolation technique is to sample a pair of quadrature sinewaves at the leading edge of the pulse to be time stamped. When sampling a pair of 10MHz sinewaves in quadrature with a 12 bit ADC a timing resolution of better than 50 picosec is possible. With a pair of 1MHz sinewaves in quadrature a timing resolution of better than 500 picosec is possible. The only difficulty is in deciding which cycle was sampled. Either a sequence of progessively lower frequency quadrature sinewave pairs can be sampled, or the output of synchroniser can be used to sample both the quadrature sinewave pair and a counter clocked at the synchroniser frequency. The worst case synchroniser delay must be less than the sinewave period. The phase relationship between the synchroniser (and counter) clock and the quadrature sinewave pair need not have any particular value nor have a low temperature coefficient. A 3 or 4 stage synchroniser clocked at 10MHz has a worst case delay of about 500 ns which is adequate for a 1MHz quadrature sinewave pair. The sinewaves can be generated by dividing the 10MHz by 10 using a low phase noise divider such as a 74AC161/3 followed by a low pass filter. A 90 degree phase shift can be produced by a 250ns delay line. Other techniques can also be used to generate the required phase shift. A single sinewave can be used if a pair of samples are taken 1/ 4 period apart. A microprocessor is used to calculate the phase angle at the sampling instant from the pair of quadrature samples and combine this with the sampled count to produce a high resolution time stamp. The prevalence of pipelined high frequency ADCs with which it is difficult (but not impossible) to take a single sample makes it difficult to apply this technique to sample high frequency sinewaves. However if one uses a gated delay line timed oscillator to generate the sampling clock it is possible to isolate the required sample pair with some additional logic. With a 1MHz sinewave suitable ADCs are readily available. The harmonic content of the reference sinewaves must be low. This is easily achieved by filtering. Quadrature phasing errors can easily be calibrated and corrected in software. Minor variations in the reference sinewave amplitude have little effect, although the quadrature pair should have the same amplitude. sampling a single sinewave 1/4 cycle apart eliminates the requirement for equal amplitude sinewaves. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
[time-nuts] Minimising effective divider propagation delay
Brian O'Connor [1]vk4gtw at bigpond.com wrote: I note that Shera's QST article refers to using the 1 MHz output from a HP5328A. Is there any degradation of performance or increased thermal sensitivity due to the use of a HP marked 7490 (ripple counter) to divide down to 1 MHz? Would use of a synchronous divider or the TVB PIC approach yield a worthwhile improvement? Don't forget the various ring-counter implementations, too. Everybody unfortunately always focuses on the binary counters (35 years ago it was true too! Look at all the hobbyist articles in the 70's based around 7490's...) TVB's PIC approach has a lot of leverage for high and funky division ratios but for divide-by-10 there's the good old CD4017 (actually a ring counter with decoded states) and faster modern versions like the 74HC4017 et al. For the propogation delay minimization purist I suppose the decoded states take away points, but for them there's the 6-stage shift register DIP's. Tim. You can always follow your slow divider with a fast D flipflop to resynchronise the divided output to the input clock. A 74AC74 will reduce the clock to output transition delay to a few nanoseconds, a modern PECL or similar D flipflop will reduce this delay to a few hundred femtosec. References 1. https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Minimising effective divider propagation delay
Dr Bruce Griffiths wrote: Brian O'Connor [1]vk4gtw at bigpond.com wrote: I note that Shera's QST article refers to using the 1 MHz output from a HP5328A. Is there any degradation of performance or increased thermal sensitivity due to the use of a HP marked 7490 (ripple counter) to divide down to 1 MHz? Would use of a synchronous divider or the TVB PIC approach yield a worthwhile improvement? Don't forget the various ring-counter implementations, too. Everybody unfortunately always focuses on the binary counters (35 years ago it was true too! Look at all the hobbyist articles in the 70's based around 7490's...) TVB's PIC approach has a lot of leverage for high and funky division ratios but for divide-by-10 there's the good old CD4017 (actually a ring counter with decoded states) and faster modern versions like the 74HC4017 et al. For the propogation delay minimization purist I suppose the decoded states take away points, but for them there's the 6-stage shift register DIP's. Tim. You can always follow your slow divider with a fast D flipflop to resynchronise the divided output to the input clock. A 74AC74 will reduce the clock to output transition delay to a few nanoseconds, a modern PECL or similar D flipflop will reduce this delay to a few hundred femtosec. References 1. https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Oops I meant a few hundred picoseconds with the PECl flipflop. Jitter can be as low as be a few hundred femtoseconds. ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Minimising effective divider propagation delay
Dr Bruce Griffiths wrote: Brian O'Connor [1]vk4gtw at bigpond.com wrote: I note that Shera's QST article refers to using the 1 MHz output from a HP5328A. Is there any degradation of performance or increased thermal sensitivity due to the use of a HP marked 7490 (ripple counter) to divide down to 1 MHz? Would use of a synchronous divider or the TVB PIC approach yield a worthwhile improvement? Don't forget the various ring-counter implementations, too. Everybody unfortunately always focuses on the binary counters (35 years ago it was true too! Look at all the hobbyist articles in the 70's based around 7490's...) TVB's PIC approach has a lot of leverage for high and funky division ratios but for divide-by-10 there's the good old CD4017 (actually a ring counter with decoded states) and faster modern versions like the 74HC4017 et al. For the propogation delay minimization purist I suppose the decoded states take away points, but for them there's the 6-stage shift register DIP's. Tim. You can always follow your slow divider with a fast D flipflop to resynchronise the divided output to the input clock. A 74AC74 will reduce the clock to output transition delay to a few nanoseconds, a modern PECL or similar D flipflop will reduce this delay to a few hundred femtosec. References 1. https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Oops I meant a few hundred picoseconds with the PECL flipflop. Jitter can be as low as be a few hundred femtoseconds. ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
[time-nuts] Centroid pulse timing
Another way of determining the the arrival time of a pulse with high resolution is to use centroid timing techniques. The input pulse is converted to a short pulse using a delay line timed monostable then the resultant pulse is low pass filtered by a discrete component RLC Gaussian low pass filter. A sampling ADC continuously samples the low pass filter output at a fixed clock speed. The centroid of the pulse can then be calculated from the resultant sequence of ADC samples. Monostable output pulse width ~ 2x ADC sample clock period. Low pass filter risetime ~ 2 ADC sample clock periods. With a 10MHz sample clock a resolution of 100picosec or better can be achieved with a 12 bit ADC. To avoid processing all the samples to find the pulse a synchroniser can be used to isolate 8 samples that straddle the pulse. The synchroniser output also samples a continuously running counter to provide the coarse time stamp. The processor combines the calculated pulse centroid position with the coarse time stamp A delay line timed monostable is required for low output pulse jitter and good output pulse width temperature stabilty. The output pulse centroid is delayed from the input pulse transition by monostable propagation delay plus 1/2 the monostable output pulse width plus the delay of the low pass filter. If you have access to the GPS receiver PPS timing clock then the monostable can be replaced by a shift register and a couple of gates. With a 10MHz sampling clock the monostable output pulse width should be about 200nsec and the (~1.75MHz) low pass filter has a risetime of about 200ns. With a 100MHz sampling clock and matching ADC a timing resolution of 10 picosec or better is possible. A 1GHz sampling clock and matching ADC would allow subpicosecond timing resolution. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
[time-nuts] Fiber propagation delay tempco
Hal in July you asked / With the fibre-based two-way time transfer. For shorter distances you // can do well on coax, but for the distance range you require you really // want to go fibre. That world is a bit different but can be made sense // off. / How do I setup 2 clocks so they are ticking within 1 ns of eachother? If both clocks were next to eachother on a bench, I'd connect them to a scope (or equivalent box) and adjust a knob until the signals lined up. Note that 1 ns is small enough so that I have to make sure the cables are the same length and the amplifier delays are matched. I can swap inputs to check that. But what if the clocks are 10 km apart and all I have is two fibers between the sites? Is there some common recipe for synchronizing this setup? Let's assume the fibers are the same length. I'm not sure that's accurate at the ns level. You can probably swap fibers to check. One approach is to make a symmetrical setup: send your signal to the other site, compare the signal from the other site with yours, adjust one knob (pick one) until the offsets match. That's ugly since you now have to measure an offset rather than tune for a null. Is there a way to avoid that? What's the thermal coefficient of delay for fibers? Some info on the tempco of the propagation delay for fiber can be found at some of the Radio interferometer array sites where buried fiber is used to distribute a reference frequency to all the antennas. Some fibers have very low tempcos, much better than for coax. In particular teflon dielectric coax exhibits a discontinuity in the phase tempco at 15C. This stuff should be avoided like the plague, Polyethylene dielectric coax is far better behaved. Diurnal fluctuations in fiber delay due to thermal expansion of the fiber is one of the largest contributors to variations in fiber delay. Even the 5E-7 thermal expansion tempco of fused silica produces a 5mm increase in length per degree C increase in fiber temperature for a 10km fiber length. This is equivalent to a propagation delay increase of around 25 picosec. If the fiber dopant is selected so that the tempco of its refractive index compensates for the fiber expansion a somewhat lower propagation delay tempco is possible. Suitable single mode fibers are available from Sumitomo. with a low propagation delay tempco. Jacketed fibers may have higher tempco than loose fibers. Alternatively one can use fiber stretchers and an optical interferometer to compensate for fiber propagation delay variations: http://www.alma.nrao.edu/memos/html-memos/alma483/memo483.pdf#search=%22fiber%20radio%20astronomy%20frequency%20distribution%22 Some data on fiber propagation delay is given here: http://astro.berkeley.edu/ral/ata/memos/memo55.pdf#search=%22fiber%20radio%20astronomy%20frequency%20distribution%22 Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Centroid pulse timing
Hal Murray wrote: Another way of determining the the arrival time of a pulse with high resolution is to use centroid timing techniques. The input pulse is converted to a short pulse using a delay line timed monostable then the resultant pulse is low pass filtered by a discrete component RLC Gaussian low pass filter. This sounds like fun. Thanks. A sampling ADC continuously samples the low pass filter output at a fixed clock speed. The centroid of the pulse can then be calculated from the resultant sequence of ADC samples. Monostable output pulse width ~ 2x ADC sample clock period. Low pass filter risetime ~ 2 ADC sample clock periods. With a 10MHz sample clock a resolution of 100picosec or better can be achieved with a 12 bit ADC. The idea seems simple, but I don't see how to write the code. Is there a good URL on that? Table lookup and average? (make the table from spice or such) A delay line timed monostable is required for low output pulse jitter and good output pulse width temperature stabilty. 2x 100 ns delay line seems like a pain. What's the (ballpark) tempco of coax? What's the ballbark tempco of a normal (whatever that means) delay chip? (Assume I use a chip designed for this rather than kludging gate delays.) Can I correct for the change in pulse width if I have more samples? How much accuracy do I give up by making the pulse wider so I can get more info on the width/height of the pulse in order to correct? Typical delay tempco for coax is~ 50-100ppm/K. A discrete component hybrid delay line like those from Newport and their successors typically has a tempco of 300 ppm/K. The Maxim/Dallas delay chips are likely to have a tempco somewhat greater than this. If you built your own discrete component delay line it fairly easy to achieve a tempco of less than 50ppm/K provided you use NP0/C0G capacitors and either air core or iron powder core inductors. However such a delay line will be somewhat bulky although it will occupy less space than 200ns (~ 40m) of ordinary coax. At one time special delay line coax was available, Tektronix used it in some of their scopes. The delay of such coax was about 40 times that of an equal length of normal coax. It is also possible to just implement the delay line as a folded microstrip line but it will occupy about 56 square inches of FR4 circuit board per 100ns of delay when the delay line track is 20 mils wide on a 50 mil pitch. The delay will also vary about 20% over a temperature range of 0-70C. The rise time at the output of such a delay line will be relatively slow (several nanoseconds). Only the variation in the propagation delay from the input to the centroid of the output pulse is important. If one is timestamping a GPS PPS pulse then there is plenty of time to generate another pulse that is synchronous with the reference clock and inject it into the input of the delay line timed monostable. If the known time stamp of the leading edge of this pulse is subtracted from the corresponding time stamp of the resultant output pulse centroid, this is equal to the propagation delay from input to output pulse centroid to within a fast gate delay or so. Thus you can continuously measure this delay so that changes can be accurately tracked. An offset in the time stamp is unimportant when using PPS pulse timing to monitor the reference frequency stability and drift, as long as the offset remains constant. Off course it is also necessary to correct for the PPS pulse sawtooth error which is transmitted by the GPS timing receiver, This is best done in software. Whilst several papers have been published over the years on this technique no details on how to calculate a centroid are given. This is because the method of calculating the centroid of a pulse from a sequence of samples is regarded as obvious. Link below is to a recent Latvian implementation of this technique to achieve resolution of a few picosec. [1]http://cddis.nasa.gov/lw13/docs/papers/time_artyukh_1m.pdf#search=% 22A010%20Family%20of%20Time%20Interval%20Counters%20Adapted%20to%20SLR %20applications%22 If S[j] is the value of the jth sample after the synchroniser output time stamp Ts then the centroid time stamp value T[c ]is given by Tc = Ts +T*(1*S[1] + 2*S[2 ]+ + n*S[n])/(S[1 ]+ S[2] + ... +S[n]) Where T is the sampling clock period. Off course in practice these samples all occur before the synchroniser time stamp so all the j's will be negative. If you imagine drawing the pulse shape on a piece of paper and cutting it out, what you are trying to do is to find the centre of gravity of this piece of paper. The above formula approximates the pulse shape a sequence of rectangular pulses of height Sj and width 1 sampling clock period centred on the instant at which the
Re: [time-nuts] Re Danjon Astrolabe
Glenn wrote: Brooke Clarke wrote: I'm interested in automatically measuring the earth's period by looking close to straight up with a fixed telescope. This sounds like an interesting project. I've been looking for something to do with the Meade 4455D telescope I just got. (D=114m F=910, f/8) Doing a fixed mount at a know location shouldn't be a problem. I've also got an untested Hamamatsu E717-07 photomultiplier tube. Please let me know how it goes. cheers, glenn ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Glenn The aperture of your Newtonian telescope is a little too small for this application especially in the daytime. You need to use an IR filter to block most of the Rayleigh scattered sunlight. You will also need to have good baffling and use a Lyot stop to block straylight. With an aluminium tube focus will not be stable as the temperature changes. If you have a plate glass mirror then a steel tube will give a much better match to the mirrors focal length temperature coefficient. Shading the telescope tube and mirror from direct sunlight is also essential to avoid heating the tube and creating large tube currents which will severely degrade the images. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Re Danjon Astrolabe
Glenn wrote: Brooke Clarke wrote: I'm interested in automatically measuring the earth's period by looking close to straight up with a fixed telescope. This sounds like an interesting project. I've been looking for something to do with the Meade 4455D telescope I just got. (D=114m F=910, f/8) Doing a fixed mount at a know location shouldn't be a problem. I've also got an untested Hamamatsu E717-07 photomultiplier tube. Please let me know how it goes. cheers, glenn ___ time-nuts mailing list [EMAIL PROTECTED] [2]https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts I thought that the E717-07 was just a photomultiplier tube socked and divider assembly? Bruce References 1. mailto:time-nuts@febo.com 2. https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
[time-nuts] Silicon delay line tempco
Data Delay Devices quote 1-2% typical variation in delay for their all silicon delay lines over the -40 to + 85C operating temperature range. These devices have built in temperature compensation. They claim a residual tempco of 200ppm/K Maxim/Dallas don't specify this parameter for their silicon delay lines. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
[time-nuts] Passive delay line tempco
Passive delay line has a much lower tempco than active delay lines. Typical tempco is 100ppm/K. Just add you own active devices and line termination. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Re Danjon Astrolabe
Dr Bruce Griffiths wrote: David Forbes wrote: Bill Hawkins wrote: Tom Van Baak wrote, 2) Instead of a fixed base, gnomon, and slowly moving shadow like almost all sundials, you put a stepper or servo motor/encoder on the base. Then place matched photodiodes on either side of the gnomon and steer the whole sundial for constant *minimum* shadow. In real-time, a The scheme probably needs three photocells to be sure that the one in the middle is darker than the others. Might be able to mask it with a slit and use a fine wire gnomon, in a coarse/fine servo. Could use a variable frequency motor and precision reduction, like a phonograph turntable only much slower. Bill, Back in the good old days before CCD arrays, people in the astronomy business used quadrant detectors for this sort of gizmo. A quadrant detector is a 2x2 silicon photodiode array. When the bright spot is in the middle, then the current through all four diodes is equal. When the object is off-center, the current is unbalanced. You can make a tracking servo using this detector that's entirely analog - no programming skills required! Of course, driving the alt-az mount requires derotating the detector array relative to the mount's alt-az axes. ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts The modern equivalent of limb sensing would be to image the sun onto a CCD or equivalent image sensor and use image processing techniques to accurately locate its rim and thence derive the position of its centre. An neutral density filter/IR blocking filter over the objective may be necessary to avoid destroying the CCD image sensor. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Re Danjon Astrolabe
Tom Van Baak wrote: The scheme probably needs three photocells to be sure that the one in the middle is darker than the others. Might be able to mask it with a slit and use a fine wire gnomon, in a coarse/fine servo. Could use a variable frequency motor and precision reduction, like a phonograph turntable only much slower. Not sure about needing three. This is what I had in mind -- given there's a stepper/servo on the sundial base, I suggest a detection method not unlike the way a 5061A stays on the cesium resonance peak. (see http://www.leapsecond.com/pages/cspeak/) Namely, you continuously sweep the base a small amount, perhaps a fraction of a degree, at a couple of Hz rate, back and forth across the minimum gnomon shadow to determine just where the zero crossing is. The two photodiode *differential* is all you care about. Using a sampling ADC (free inside most uC these days) you can then infer where the center is. When the virtual sweep center is off by more than one full physical step of the geared stepper, you advance the sundial base one step. I've not done the math, but I suspect you can get quite accurate this way. Not only do you have the digital step count as a function of time of day, but you also have the digital/analog interpolation of the steps; so the resolution is quite good. Also if the photodiodes are sensitive beyond visible this digital servo'ed sundial might work in cloudy weather too -- which, being here in Seattle, is one reason I came up with the idea. /tvb http://www.LeapSecond.com/time-nuts.htm ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Whilst the resolution may be good, the accuracy of an open loop microstepped stepper motor isn't that great. Its usually worse than when not using microstepping. Variations in friction torque on the motor will also dramatically affect its positioning accuracy. A high resolution position encoder mounted on the sundial base is essential if you need to accurately determine its direction. Servomotors with encoder feedback will achieve a much higher performance than a stepper motor. If gears or rollers are used then backlash in gears or microcreep in rollers will reduce the positioning accuracy. The sundial base bearing runout can also affect positioning accuracy. The equivalent time error is not likely to be much smaller than a few seconds at best Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Re Danjon Astrolabe
buehl wrote: Hi all: Robert's pinching an idea from the early - - brings to mind what we did in the early days of video/ TV. Hope this inspires some useful ideas. To measure spot size on CRT, a small slit was placed against the TV or oscilloscope screen and a photo sensor measured the light intensity coming through the slit. As the circular spot entered the slit, the change in light intensity increased; and as it left the slit light intensity decreased. If the slit was wide, the photo detector output has a sine wave rising edge, a flat top, and a sine wave falling edge. If the slit was very narrow, there is no flat top. If we use the slit to watch the sun, we have the equivelent of a pinhole camera with only one direction of focus. Making a structure with 2 photodetectors, or 3 as TVB suggests, and carefully place such that one is on each edge of the image. As one outputs a rising edge, the other outputs a falling edge. In theory, when properly positioned, both photodetectors will have equal output when the sun image is exactly between photodetectors. This is also the point of greatet rate of change. This is equal to the inverse of the fine wire gnomon mentioned by TVB. Simple detection would be using a comparitor or zero crossing detector. You get one output as the sun approaches the center, and switches as the sun image crosses center. Any offset or inacruacy would be identical day to day, so the time interval is repeatable. This should be very simple to build. As a computerized approach, each output could be converted with an A to D and mathematically analyzed. The ultimate refinement would be a linear array, such as that used in a scanner. If you can get the image to pass over a linear array with 4,000 pixels within 3 seconds, this would allow calculating time verses position at the rate of less than 1 millisecond per pixel. Accuracy could be increased by making the distance from the slit to the detector greater (increasing the size of the pinhole camera image and increasing the rate of travel across the sensor), or making the slit smaller, or making the detector diameter smaller. Using a piece of fiberoptics connected to photodiode makes the detection diamater equal to the fiber. I have had good results attaching one end of cheap plastic fiber to tip of photodiode with clear glue or epoxy. Cheap plastic fiber like that used in decorative lamps, or experimentor type sold by Radio Shack, will also pass IR for short distances. One source of inacuracy is when a sloud only shades one edge of the sun. I suspect the IR image of the sun is more precise than the visible image, because defraction (tildel effect) is less when passing through clouds. Since a slit provides only one direction of movement, proper angular positioning of the slit would minimise changes in the suns orbit from day to day, week to week. Would like to hear comments from those amoung you having greater expertise in designing such a device. Tom Buehl EFFECTIVE SOLUTIONS At 03:27 AM 9/29/2006, you wrote: How about pinching an idea from the early radar and missile technologies - Conical Scanning. Basically you offset the detector of feed antenna from the point of focus and then rotate it. If the signal is off centre you get sinusoidal modulation of the signal. The phase of the modulation tells the antenna steering what direction to move to get back on target. A practical solution is to angle and spin the secondary mirror of a reflecting (e.g. cassegrain) telescope. A index sensor gives you your phase reference. Robert G8RPI. -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Dr Bruce Griffiths Sent: 29 September 2006 01:09 To: Tom Van Baak; Discussion of precise time and frequency measurement Subject: Re: [time-nuts] Re Danjon Astrolabe Tom Van Baak wrote: The scheme probably needs three photocells to be sure that the one in the middle is darker than the others. Might be able to mask it with a slit and use a fine wire gnomon, in a coarse/fine servo. Could use a variable frequency motor and precision reduction, like a phonograph turntable only much slower. SNIP Whilst the resolution may be good, the accuracy of an open loop microstepped stepper motor isn't that great. Its usually worse than when not using microstepping. Variations in friction torque on the motor will also dramatically affect its positioning accuracy. A high resolution position encoder mounted on the sundial base is essential if you need to accurately determine its direction. Servomotors with encoder feedback will achieve a much higher performance than a stepper motor. If gears or rollers are used then backlash in gears or microcreep in rollers will reduce the positioning accuracy. The sundial base bearing runout can also affect positioning
Re: [time-nuts] Danjon Astrolabe meridian transit timing errors
Tom Van Baak wrote: Accuracy still won't be much better than1% of the solar diameter or about 1 second of time nowhere near the o.1 sec or better hoped for. Bruce Bruce, Can you show us how to derive the accuracy number? I would have guessed that with fractional degree Al-El steering, a rotary encoder, 12 hours of sampling, and curve fitting that one could calibrate solar time against a local UTC standard to a bit better than that. /tvb ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Tom First I'll deal with some of the problems of the various proposed transit methods: For a time error of 100 millisec or less the corresponding error in the sun's azimuth is about 1.5 arcseconds. When viewed from the bottom of the atmosphere the sun and stars appears to move about randomly due to the effects of atmospheric seeing. The amplitude of this random image displacement in the visible depends on the altitude of the object being observed it can be as large as several arc seconds when observing stars with an altitude of 45 degrees at night. This random image motion due to atmospheric turbulence is even greater during the day (as much as 10 arc sec rms on Mauna Kea). http://adsabs.harvard.edu/abs/1990ursi.symp...75C The solar image is not uniformly bright across the disk, there is a noticeable darkening towards the limb. There is no sharply defined solar limb, prominences and other outbursts can extend arc minutes from the edge. Local seeing effects such as turbulent air over structures warmed by the sun such as buildings, concrete pads, roads etc will also have significant effects. Internal instrument turbulence due to solar heating can also be problematic. Scintillation in the solar irradiance will also have an effect on the noise in solar meridian transit measurements. At solar meridian transit solar heating of the ground will produce worse seeing than earlier in the day when the suns altitude is lower. The accuracy of a transit method that uses a pair of photodetectors to compare the light from two small sections of the solar limb will be adversely affected by atmospheric seeing and bright prominences. The angular size and declination of the sun vary throughout the year. Thus the position of the limb sensing detectors have to be adjusted to accommodate the variation in the sun's altitude at meridian transit. Making such adjustments without changing the effective azimuth defined by the detectors and associated optics, gnomon or slit is difficult especially when the maximum variation in azimuth due to such adjustments has to be no more than 1 arcsecond or so. It has also been implicitly assumed that azimuth of the transit instrument remains fixed over time and temperature variations. it is actually difficult to ensure the azimuth remains constant to an arcsecond or so over time without taking heroic measures to ensure the instrument mounting plinth is sufficiently stable. Uneven solar heating of the instrument plinth can cause it to the instrument to tilt and twist its azimuth through several arc seconds. Joints between dissimilar materials are prone to cause the instrument azimuth to rotate as it warms up. A suitable kinematic joint such as a Maxwell clamp can reduce the thermal rotation significantly but even then it is difficult to ensure an azimuth stability of an arcsecond or so. The pointing stability of an instrument using plastic (fibers, etc) parts can be problematic especially when it is subject to temperature cycling. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Danjon Astrolabe meridian transit timing errors
Bill Hawkins wrote: OK, there are serious sources of error in making a one-time solar transit measurement. What I propose is a differential method, a favorite of instrument makers to reduce errors. This is possible because the equation of time makes a correction of only one percent or so. A steady platform with a single axis of motion is turned by a precision synchronous motor driven by a frequency derived from a cesium standard. This provides a fixed reference rotation speed. Use a mirror mounted so that it turns on the horizontal axis and is in turn turned on the vertical axis by the accurate frequency. Use a simple sun-tracking servo to keep the image of the sun on a mirror attached to a galvanometer assembly. Use an analog servo to generate a current that will keep the solar image from the galvo centered horizontally on a target. Use high frequency dithering to improve accuracy. Filter the galvanometer current to remove the dither and measure it with a computer. Use math tricks to subtract the equation of time, looking for a drift rate at a frequency much less than one cycle per day, but larger than the drift rate of the standard. Systematic errors in the instrument should be revealed. If they are temperature dependent, they can be compensated. The stability of the mounting for the apparatus becomes a problem over long periods of time. Perhaps ways can be found to compensate can be found, but I can't think of something that doesn't require a stable reference platform. The fact is, no other physical property can be measured to the same accuracy as frequency, because atomic motion provides a stable reference. The question is, then, can long-term averaging remove the small errors in measuring the position of the sun relative to a rotating reference platform? If this is feasible, where can I find a Maxwell clamp? Google can't find one. Regards, Bill Hawkins ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts The accuracy of a solar meridian transit measurement can be significantly improved if the position of the sun is continuously measured starting a short time before until a short time after the meridian transit. A least squares fit to the sequence of positions can then be used to derive an accurate time for the actual transit. This can be done without using any moving components if the position sensor and associated optics have a sufficiently wide field of view. A Maxwell clamp is a variant of the well known Kelvin clamp kinematic mount. The classical Kelvin clamp employs 3 ball feet on one part which mate with a hole (ideally a 3 sided prismatic hole) a slot (V-groove) and a flat on the other part. The Maxwell variant employs 3 radial V grooves instead of the hole, slot and plane. If the axes of the 3 grooves don't meet at a common centre then differential rotation occurs during differential expansion between the mated parts. However this rotation is repeatable and can in principle be measured and corrected for. Friction should be low in a kinematic mount. Suitable kinematic mount components are available from: http://www.precisionballs.com For heavier loads quasi-kinematic mounts such as spherolinders can be used: http://www.g2-engineering.com/spherolinder.html If a suitable kinematic mount is used, two parts with different thermal expansions can be repeatedly mated whilst maintaining relative alignment to a small fraction of an micron. With suitable components nanometer repeatability can be achieved. For even higher stability with permanently mounted parts, 3 flexures can be used to mate 2 components with differing thermal expansions. Well designed flexure mounts can have higher stability than kinematic mounts because friction is absent. Integral flexures are used in moving stages with nanometer repeatability. http://www.physikinstrumente.com/en/index.php Whilst it is relatively easy to generate a precise frequency it is extremely difficult and expensive to make a platform that rotates with runout of not more than an arcsecond. Roller bearings are inherently unsuitable, preloaded pairs of angular contact ball races are considerably better. Air bearings can be good enough but tend to be expensive. A kinematic bearing design with extraordinary accuracy is possible. Driving such a platform without destroying its inherent precision through the drive coupling can be problematic. Backlash in gear reduction systems can also be a problem unless suitable preloads are used. Periodic and other errors in gears can also be problematic unless the errors are repeatable, so they can be measured. Drag from electrical cables connecting between the rotating platform and its fixed base can also be problematic. You really need an angular position encoder with subarcsecond resolution and accuracy mounted on the rotating platform to allow
Re: [time-nuts] On some pitfalls of the dual mixer timedifferencemethod of horology
Poul-Henning Kamp wrote: In message [EMAIL PROTECTED], Ulrich Bangert writes: Hello Paul-Henning, www.tmo.jpl.nasa.gov/progress_report/42-121/121G.pdf definitely uses no FFT but uses a theoreme from geometry to estimate the signal's frequency and the rest is a two dimensional non-linear fit for amplitude and phase. But i am starting to understand how a FFT might be helpfull too. Does it involve finding the maximum of the frequency spectrum by interpolating between frequency bins and then find the matching (interpolated) phase bin? That would depend on your sampling rate. If you sample a 1Hz signal 96k times a second, interpolation between bins would probably just be a waste of time. Alternatively, you could apply a really steep band-pass filter around 1 Hz. Something like an 1131 pole FIR filter, and then find the zero crossing geometrically using the three points around the zero line. You are still left with the problem of apportioning the measured instability between the 2 oscillators/signals being compared. Unless you know one of them is significantly less noisy than the other it is not possible to accurately apportion the instability between them. A 3 cornered hat where 3 oscillators are compared using 3 mixers can help if the instabilities of all 3 oscillators are statistically independent. It is also better if all 3 oscillators have similar instabilities. A comparison of N oscillators using 0.5*N(N-1) mixers is even better. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] On some pitfalls of the dual mixer time differencemethod of h...
Magnus Danielson wrote: From: [EMAIL PROTECTED] Subject: Re: [time-nuts] On some pitfalls of the dual mixer time differencemethod of h... Date: Sun, 1 Oct 2006 13:53:57 EDT Message-ID: [EMAIL PROTECTED] Hello Ulrich, Ulrich and Said, the latest generation of TSC intruments (the TSC5120A for example) uses a new strategy: they use four ADC's to sample and cross-correlate two oscillators completely in software. All the mixing etc is done in the software domain. That makes for cheap hardware, and works quite well. They had a tutorial about this at this years UFFC in Miami. You also get some insight when picking up the manuals from their web. It is a quite different animal in implementation than the old hardware correlatetors are, which has both benefits and drawbacks. It is however a very modern approach indeed. Cheers, Magnus ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Interesting as the techniques employed may be, the resultant performance is still inadequate for characterising state of the art oscillators. The instrument phase noise floor is higher than that specified for current low noise (but not necessarily low drift) crystal oscillators. The Allan deviation of current state of the art cryogenic sapphire oscillators is more than an order of magnitude lower than the noise floor of these instruments. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] On some pitfalls of the dual mixer time differencemethod of h...
M. Warner Losh wrote: In message: [EMAIL PROTECTED] Dr Bruce Griffiths [EMAIL PROTECTED] writes: : The Allan deviation of current state of the art cryogenic sapphire : oscillators is more than an order of magnitude lower than the noise : floor of these instruments. I'm curious. How much does one of these oscillators cost? Warner These devices usually operate at around 11GHz in temperature controlled Liquid helium cryostats and are not produced commercially they are custom built. The University of Western Australia has built some of the best examples of these devices. http://arxiv.org/ftp/physics/papers/0608/0608124.pdf#search=%22hydrogen%20maser%20Kvarz%22 http://www.fsm.physics.uwa.edu.au/History.html Lower Q room temperature microwave whispering Gallery sapphire resonator oscillators are available commercially. http://www.psi.com.au/ Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Features of a Precision Clock?
Dean Weiten wrote: Hi there, Having worked with the folks who operate the power utilities (I designed protective relaying and recorder electronics for several years), I can advise that they do take the long-term accuracy of their power seriously. However, the short-term is not a big concern, and in fact, they cannot control it all that well. It turns out that power flow on an AC line requires a phase difference between end points (as opposed to a DC system where it is resistance that counts). The resistance of the line is not important. This is because power transmission lines are almost pure inductive reactance - in power systems terms, the line angle (impedance angle) is generally near to 90 degrees. Systems are connected at multiple points, like a mesh of rubber bands connecting weights and support points. Some of these points are heavier (down) or pull stronger (up), some have stronger bands, some have very weak bands. When the load changes, or when a line opens or closes, the phase angles of the power through all these interconnected ties will shift to establish a new equilibrium. In so doing, your power will advance or retard somewhat. If you have a clock running on the phase of AC power, your clock will gain or lose a bit of time. It is unclear whether you will ever be corrected - the new equilibrium might just be a fact of life. The prime movers of the systems (generators) are almost all physical moving devices, like hydro-electric (water dams) or thermal (coal, natural gas, or nuclear powered turbines). When they are loaded down, they slow down - and when less loaded, they speed up. This isn't as bad as it sounds - the rest of the system rolls along at the system frequency, and the generator's slight frequency change actually becomes a phase change, which, as per above, changes its power output. Then the generator gets back into sync, but with a phase angle different than before. As you can imagine, it is a challenge to maintain tight control of the phase, with all the changing conditions on the power grid. In the case of our utility (Manitoba Hydro), they keep power system clocks at the big 24 by 7 staffed power stations and in the main control room, and will, under their rules of operation, tweak things slightly over time. I am not certain of the rules of operation, or of the way they tweak things (generator bias?), but could find out from friends and colleagues, if you wish. Here in Manitoba, we are blessed to have much of our power supplied from the hydro-electric generators in the north, through a DC link. It turns out that this is economical above a certain distance and power level - related partly to the skin effect (yes it becomes important, even at 60 Hz). At the south end of the link, we have a DC-to-AC inverter system (huge - pretty impressive), fibre optic fired thyristors (equivalent to triacs? SCRs?). We can change the firing angle on a cycle-by-cycle basis, adjusting the power flow in and out, and exerting extraordinary control of the system phase. We use it to stabilize the system more than for power frequency correction, but I assume that this could be done too, just unsure of the algorithm. Of course, the system is a lot more complex than I describe it here, with phase shifting transformers, tap changers, and more modern back-to-back DC links, wind generation at the distribution (lower voltage) level, etc. More complex than I understand, to be sure. But those are the basics. Regards, Dean Weiten, Elecsys Solutions, Winnipeg, Manitoba. ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts When the length of the transmission line approaches a quarter wavelength at the power line frequency (1250 km/780 miles @ 60Hz) it acts somewhat like an open wire RF transmission line. The line no longer acts like a lumped component and it also acts like a somewhat inefficient antenna radiating at the grid frequency. Some generators are kept continuously spinning and synchronised to the mains but generating little power. These spinning reserve generators are necessary to stabilise the grid against load fluctuations, they can very quickly supply power when required. Here in New Zealand where the length of each of the 2 main islands approaches a quarter at the 50Hz grid frequency a submarine bidirectional dc link connects the power systems of the 2 islands. Both mercury vapour phase controlled rectifier and SCR inverters are used. A thyristor is another name for an SCR, triacs are not used in high power circuits, inverse parallel SCRs are used where a triac like function is required. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Features of a Precision Clock?
Bill Hawkins wrote: Dr Bruce Griffiths said, Some generators are kept continuously spinning and synchronised to the mains but generating little power. These spinning reserve generators are necessary to stabilise the grid against load fluctuations, they can very quickly supply power when required. I hope you don't mean that the reserve generators supply power from their rotational inertia. They do, but not enough to keep the frequency from changing. There's another reason for wasting heat. Spinning reserve is necessary because it takes hours to bring a big turbine up from a cold start. They have to heat up slowly to avoid thermal stress in the blades and the big metal bits. The boiler also has to be hot, but even so it can't change quickly. Quickly means minutes, not milliseconds. Think of the incredible amount of energy stored in many rotating generators linked by the synchronous network. If the load suddenly increased 10% then the rotational energy removed from the generators would supply the increased demand at the cost of slowing down. Then turbine governors open steam valves, causing the boiler pressure to drop, causing more fuel and water to be added to the boiler. The network gradually comes back up to speed until the turbine governors are satisfied, which is not exactly 50/60 cycles. In fact, this group is liable to lose interest (if any) in power line frequency when it becomes clear that the system has no natural frequency. It is not an oscillator whose frequency is determined by physical properties, like a piezoelectric crystal or a cloud of atoms. What you are seeing in the power line frequency is a marvel of coordinated control systems barely restraining enormous energies. Since I'm in the control business, I think that's neat. YMMV. Regards, Bill Hawkins ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts In NZ power generation is predominantly hydro with some thermal generation and small amounts of wind generation. Consequently response to load fluctuations can be somewhat faster than when purely thermal generation is used. The frequency is usually held between 49.9 and 50.1 Hz. However when generating capacity is lost the frequency will drop well below 49.9Hz. Operation for more than a few seconds below 95% of design frequency can severely damage some modern thermal generating plant. Another reason for avoiding very long AC transmission lines is the reactive current flowing in the cable shunt capacitance may exceed the load current, especially in non air insulated cables,. this reactive power increases the resistive losses in the cable. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] On some pitfalls of the dual mixer timedifferencemethod of h...
Tom Van Baak wrote: Interesting as the techniques employed may be, the resultant performance is still inadequate for characterising state of the art oscillators. The instrument phase noise floor is higher than that specified for current low noise (but not necessarily low drift) crystal oscillators. Well, true, but perhaps one definition of state of the art is simply when the high-end test tools that you can buy off the shelf are inadequate compared to the newest technology you are building in the lab... /tvb ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts My point really was that inferior analog techniques such as 2 reference source 2 mixer cross correlation analysers have a phase noise floor 15-20dB lower than the supposed superior direct digital mixing techniques. Such cross correlation instruments are commercially available from Wenzel associates and others. The latest Agilent phase noise analysers use analog mixers, dual digital phase locked loops and digital cross correlation. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Features of a Precision Clock?
Poul-Henning Kamp wrote: In message [EMAIL PROTECTED], Bill Hawkins writes: Think of the incredible amount of energy stored in many rotating generators linked by the synchronous network. This is actually far less than you seem to think. If the load suddenly increased 10% [...] Then all generators would trip and disconnect from the grid. No reasonably sized turbine driven generator survives a 10% load jump without exensive repairs. Your explanation was true about 30 years ago, not so any more. After deregulation, electrical grids run very close to the edge because nobody makes money on the reserve capacity and therefore everybody only produces exactly what they are legally required to. The main reason for all the research into UTC locked grids is that it would prevent produces from cheating at the scale. Whilst it may be reasonable to run close to the edge in large grids where no one generator provides a large proportion of the power, it is not so for smaller grids with a few generators providing a large proportion of the power. In the local (NZ) market generators are paid to supply spinning reserve capacity. Since we only have 2 separate AC distribution systems connected by a bidirectional dc link and one operator coordinates the distribution from all the generators cheating at the scale isn't likely. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] HP 5370A
David McGaw wrote: The 10811 is the newer SC cut crystal oscillator. The 10544 would be the older AT cut oscillator. At 09:43 PM 10/14/2006, you wrote: I got an HP 5370A from eBay which did not work at power up (display was messed up). After resetting all the ROMs and the CPU in their sockets, the instrument came to life and now powers up without error message. It has serial number 2128A01306. However, it seems that the reference oscillator output is severely distorted (when I look at it with the scope), it looks more like 900mV p-p of 30 MHz than 10 MHz, even though the instrument does not complain. The output looks the same if I drive the external reference or use the internal reference. When I measure the reference output with the 5370 itself, I can make it display 10 MHz, 20 MHz or 30 MHz just by adjusting the threshold pot. I have posted a picture at http://www.ko4bb.com/Test_Equipment/HP 5370A_ref_output.jpg Also, I went through the instrument check out, and the first step, page 3.4, shows how to read the period of the reference oscillator, and the instrument displays 0.00 instead of 100.00. It obviously does not like the reference output signal. The time base is an 10811-60111, I believe this is the standard time base, as the manual lists the high Stability time base as a 10544-60011. The 10811 is a pretty nice standard time base :-) Otherwise, the time base seems very close, my reference oscillator (a 3586 synchronized to WWV until my GPS clock is finished) displays 10.000 000 100 on the 5370. So it seems some of it is working, but the reference oscillator output bothers me, and so does the impossibility to run the check out.. Any help in figuring out if this is normal would be appreciated. Thanks in advance. Didier KO4BB ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Didier The path from the external frequency input to the external 10MHz input is 1) single transistor buffer/multiplier with collector tank tuned to 10MHz 2) Single transistor amplifier/multiplier with collector tank tuned to 10MHz 3) ECL gate chain 4) longtailed npn transistor pair which has a capacitively tapped LC tank circuit tuned to 10MHz. The path from the internal crystal is via a set of ECL gates The internal or external source is selected both by a set of ECL gates and by a slide switch to minimise feedthrough. Since the only common circuit other than a few ECL gates is the longtailed pair with a tuned collector tank, it is possible that the collector tank components are tuned to 30MHz and not 10MHz. One of the tank components may have failed or there may be a dry joint or equivalent in the tank circuit. The collector tank is excited with a squarewave current source which has 3rd, 5th, 7th harmonic components as well as the fundamental. You should check the signal path through the A8 reference frequency buffer assembly board. There may also be other problems but you need to isolate and fix them one at a time. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] HP 5370A
Robert Atkinson wrote: Hi Chuck, I'd agree on the use of connector wipes, but doubt that they have silicone as a lubricant. Silicone oil or grease is not generally suitable as a lubricant on electrical contacts as it can form an insulating layer that is virtually impossible to remove. This is especially true of contacts that may arc, even slightly. Many years ago when the UK telephone system was still electromechanical they had a sudden spate of contact failures. These only occurred close to the floor and the cause was traced to a change in the floor polish to a silicone formulation. Robert G8RPI. -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Chuck Harris Sent: 15 October 2006 16:15 To: Discussion of precise time and frequency measurement Subject: Re: [time-nuts] HP 5370A Didier Juges wrote: PS: The card edge connectors on this unit are extremely tight. I easily broke one of the extractor on the CPU card, and the ROM card I am very careful to remove boards like this, I don't like to break the extractors. Once I get them removed, I give the card edge a wipe with one of those gold saver wipes made by Chemtronics and others. It adds a little touch of a silicone lubricant to the fingers and reduces the insertion force by about 5x. Plus, it cleans the gorp off of the gold fingers. -Chuck ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Any opinions expressed in this email are those of the individual and not necessarily Genetix Ltd (Genetix) or any company associated with it. This email and any files transmitted with it are confidential and solely for the use of the intended recipient. If you are not the intended recipient or the person responsible for delivering to the intended recipient, be advised that you have received this email in error and that any use is strictly prohibited. If you have received this email in error please notify Genetix by telephone on +44 (0)1425 624600. The unauthorised use, disclosure, copying or alteration of this message is strictly forbidden. This mail and any attachments have been scanned for viruses prior to leaving Genetix network. Genetix will not be liable for direct, special, indirect or consequential damages as a result of any virus being passed on, or arising from alteration of the contents of this message by a third party. ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts According to the Material safety datasheet, Chemtronics Goldguard consists of 94-99% n propyl alcohol plus 0.1-1% polyphenyl ether. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] The VE2ZAZ GPSDO
Dave Brown wrote: Interested in any comments on this GPSDO - http://www3.sympatico.ca/b.zauhar/GPS_Std/GPS_Std.htm#GPS_Receivers DaveB, NZ Why anyone would bother to create something like this escapes me. Just another example of unintelligent engineering. If one is foolish enough to insist on using a non timing GPS receiver then one cant really expect too much in the way of stability. A good GPS timing receiver isn't that much more expensive and the improved performance more than justifies the extra cost. Since it is not clear how the frequency was measured any conclusions must be somewhat tentative. 1) The frequency stability over a few hours appears worse than that of the crystal alone. 2) The short term DAC stability needs to be very high -low pass filtering the PWM output of the PIC is inadequate the switching levels of the PWM output need to be tightly regulated. 3) The DAC resolution needs to be very high ( 20 bits) for the frequency stability to approach the limits set by a good crystal and GPS timing receiver. 4) Using an RS485 transceiver with its built in input attenuator will degrade the SNR of the 10MHz clock. 5) Using the same buffer IC to buffer different frequencies will produce undesired phase modulation of its outputs. 6) Using a ripple counter without resynchronising its output signals will phase modulate the divided down outputs. 7) The apparent absence of a ground plane should allow the circuit to effectively radiate RF noise and harmonics. 8) The bypass capacitors on the supplies will be relatively ineffective. There are GPS disciplined crystal oscillators available which have a 1s Allan deviation of 2E-11(8E-11 @1000s, 1E-12 @ 1day), the performance of this circuit falls woefully short of this. No allowance appears to have been made for weeding out spurious measurements. What happens if a PPS pulse is missing or has an abnormally large timing error? Degrading the resolution by ignoring sawtooth timing corrections and using a 100ns resolution timer to measure the PPS pulse position relative to an internal (10/2^16) MHz clock just throws away the inherent timing precision (~10ns or better) of a good timing GPS receiver. GPS timing receivers that internally correct for the sawtooth error are available. There are no Allan deviation plots for either the GPS derived PPS signal or for the OCXO. These are necessary for intelligent design. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] The VE2ZAZ GPSDO
John Miles wrote: I think it'd be great to see Dr. Griffiths' list of issues in a letter to QEX, sans a couple of the more, er, editorial comments. This would give the author a chance to respond, and alert other builders of opportunities for improvement. Some of the concerns may not be major issues (e.g., it seems safe to say that the FLL action will correct for drift caused by the 7805's tempco, unless you plan to dump a can of R134a on it), but others are worth bringing to the magazine's attention. If you'll forward your comments to Doug Smith at kf6dx (at) arrl.org, he'll most likely print them in the Letters column. -- john, KE5FX Well said, Randy. It wasn't my intention when I asked for comments to trash anybody or anything. In the somewhat 'rarefied atmosphere' of this forum I doubt that any comments made were intended to be anything other than objective. I guess the ultimate question is whether or not the claimed performance objective can be met with the hardware/firmware detailed in the article, regardless of some of the apparent shortcomings already noted. If the answer is yes, then I believe the discussion here should be interpreted as no more than suggested improvements that could be implemented. Regards DaveB, NZ ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts A frequency lock loop is not the optimum technique for disciplining a frequency standard as for periods of less than a few hours measurement system white phase noise (PPS timing jitter) dominates. The optimum phase lock technique requires a similar number of components. Experiments are fine but why try and sell the result of an ill conceived one? This solution represents a step backwards from existing solutions of similar cost but better performance. Since a correctly designed system will have a time constant of around an hour or so (with a good OCXO), the temperature coefficient of the power supply is significant as temperature fluctuations with a period less than this will affect the EFC voltage and hence cause the frequency to fluctuate. The frequency correction loop will be unable to fully correct these variations unless the time constant is drastically reduced in which case the frequency fluctuations due to the GPS PPS pulse jitter will increase substantially. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] The VE2ZAZ GPSDO
Tim Shoppa wrote: John Miles [EMAIL PROTECTED] wrote: Some of the concerns may not be major issues (e.g., it seems safe to say that the FLL action will correct for drift caused by the 7805's tempco, unless you plan to dump a can of R134a on it), but others are worth bringing to the magazine's attention. If you'll forward your comments to Doug Smith at kf6dx (at) arrl.org, he'll most likely print them in the Letters column. Having seen some bad vibes unfold through the channels of the letters column and other communications with editors, I think that BY FAR the most useful thing to do would be to contribute an improvement (preferably with schematic) rather than a lengthy textual or mathematical criticism. Tim. ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Since the disciplining technique is far from optimum, this may only serve to further sidetrack the less knowledgeable from the best engineering solution which can achieve a far better performance for a similar cost. A comparison of the performance of this method with the optimum method using similar receivers and crystal oscillators would have been helpful in assisting newcomers in selecting a more appropriate method. Perhaps someone should set up a webpage detailing how one should go about disciplining a high stability crystal oscillator. Allan deviation vs tau for various GPS receivers Allan deviation vs tau for various crystal oscillators. Various phase measurement techniques and associated tradeoffs Effect of various phase measurement techniques on the system Allan deviation vs tau. Filtering phase measurements and discarding outliers. Choosing the appropriate loop time constant. Miscellaneous: Use of synchronisers to reduce probability of generating runt pulses and metastability problems. Don't use same IC to buffer different frequencies Resynchronising divider chain outputs to reference frequency clock to reduce jitter. DAC requirements and tradeoffs Monotonicity Resolution Noise Short term stability Cost etc. Monotonic high resolution DAC techniques Multibit Audio DACs PWM etc. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Didier Juges wrote: OK, here is my problem. I do not think it is a unique problem, based on recent mail :-) I have read about the Allan Deviation and I understand the principle, even though the nuances between the 3 basic Allan deviations escape me at the moment, but I am sure it will come once I re-read the Help file that comes with the the AlaVar software , and I have downloaded and installed AlaVar, a free software that can compute the various flavors of the Allan Deviation. I have a working HP 5370A, which I believe is required (even though maybe other counters, such as the HP 5334 or HP 5316, both of which have a TI function that might be used for that purpose) to gather the data that will be fed into AlaVar. I have a working GPIB interface (actually several types) and a computer attached to it, and I can write a Visual Basic programs to talk to the counter and download data (I have already written Visual Basic/GPIB programs to control signal generators, power meter, spectrum analyzers and other instruments). I have several HP 10811 oscillators (with EFC input), and a couple of Ovenair (also with EFC input for at least one of them), some are inside working HP instruments, and a couple are spares. What I do not have is a procedure. What data do I need to feed the software and how do I actually collect the data? I assume the 5370 should be set to measure TI between 2 oscillators. Should I use the built-in averaging function? What sample size and resolution should I use? Should I try to use the 5370 in raw mode (much faster, 6000 samples/sec) or in formatted mode (10-20 samples/sec)? Does it make a difference? What if the oscillators are not phase locked and show frequency drift? The 5370 has a 10811 oscillator for its time base, so it is good but no better than any of the oscillators I want to check. Do I use it as a reference, or do I compare two stand-alone oscillators? How do I know which oscillator I am measuring when the two oscillators I am comparing are the same models? Should I compare 3 or more? Regarding the GPS receiver, I thought most modern GPS receivers automatically switch from nav mode to survey mode when they stop moving. I would probably be mistaken to believe this is comparable to a true time-keeping GPS receiver, but how bad is it? Tom Clark wrote previously on Time-Nuts that his experience with the Jupiter was good, with +/- 13 nS jitter, other than the fact the receiver will not return the timing error on the next pulse, which prevents from writing smart software that can compensate for it. I have a Jupiter GPS receiver which I intend to use to discipline one of the 10811 oscillators. The Jupiter receiver has a 10kHz output, which would simplify the phase lock loop a little (even though it would not allow to speed up the loop). Is there any disadvantage in using it instead of the 1PPS output? It seems the 10 kHz would be easier to filter, and maybe allow to speed up the loop following power up (assuming it is set to the normal, longer time constant once phase lock is achieved), but what do I know? I also have a modified distribution amplifier to distribute the good 10 MHz to my lab without affecting the master oscillator. So I am anxious to use the AlaVar software and the toys I have listed above to do the following: 1) select the best OCXO to be the basis of my GPS disciplined frequency standard 2) find the best placement for the GPS antenna (the one that gives the most stable GPS signal) 3) fine tune the phase lock parameters and estimate the quality of the end product Any further information and guidance (with practical tips) would be greatly appreciated. Didier KO4BB Dr Bruce Griffiths wrote: Tim Shoppa wrote: John Miles [EMAIL PROTECTED] wrote: Some of the concerns may not be major issues (e.g., it seems safe to say that the FLL action will correct for drift caused by the 7805's tempco, unless you plan to dump a can of R134a on it), but others are worth bringing to the magazine's attention. If you'll forward your comments to Doug Smith at kf6dx (at) arrl.org, he'll most likely print them in the Letters column. Having seen some bad vibes unfold through the channels of the letters column and other communications with editors, I think that BY FAR the most useful thing to do would be to contribute an improvement (preferably with schematic) rather than a lengthy textual or mathematical criticism. Tim. ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Since the disciplining technique is far from optimum, this may only serve to further sidetrack the less knowledgeable from the best engineering solution which can achieve a far better performance for a similar cost
Re: [time-nuts] How to measure Allan Deviation?
Didier If you are going to use a PPS divider to divide the oscillator frequency down to 1Hz, you will need to measure the inherent jitter of the divider to ensure that it doesn't degrade the measurement resolution. It may be necessary to resynchronise the divided output using a fast D flipflop to reduce the inherent divider jitter to less than the 20ps resolution of the 5370. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Tim Shoppa wrote: Dr Bruce Griffiths [EMAIL PROTECTED] wrote: Most GPS receivers with higher frequency outputs than 1Hz, phase modulate the high frequency output in this way and the datasheets explicitly indicate this. Thus there would appear to be little advantage in phase locking to the 10KHz signal with a short loop time constant. To be absolutely sure you will need to use an oscilloscope to observe the synchronous jitter in the 10KHz waveform. The jitter from the phase jerked 10kHz would be in the several to tens of ns range, once a second, right? Period of 10kHz is 1E5 ns. I don't think I can trust my old analog scopes to do this, but a fancy coincident trigger (require coincidence with PPS) on a digital storage scope with a crystal timebase might see this. Sounds more like a job for histogramming interval measuremnts. (In my lab days we did this with a TAC followed by a PHA for much larger scale jitter measurements). Tim. ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Yes the phase jerks on the 10KHz output should be virtually identical to the phase jitter on the PPS output. A digital scope is probably necessary unless one can digitally delay the PPS signal (without affecting the timing of the 10KHz signal phase jerks ) using the receiver clock that is used to position the PPS pulse. If the 10KHz output were delayed by 100usec (jitter less than that of the PPS pulse) and the PPS signal was used to trigger the scope then it may be possible to use an analog scope together with an oscilloscope camera to capture the waveform. Unfortunately this is now probably impractical although a few decades ago it would have been relatively simple but time consuming. In principle this measurement could be made with a time interval counter: PPS - START delayed 10KHz - STOP Vary the delay and watch the jitter jump when the leading edge of the PPS signal occurs during the 10KHz burst which was phase coherent with the previous PPS pulse. The only problem is finding a suitable variable delay device with sufficiently low (=1ns??) jitter. Time stamping the 10KHz and PPS pulse transitions with adequate resolution and sufficiently low jitter would probably be the most effective. The time stamp records can be accumulated for a few minutes and then analysed in software. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
John Ackermann N8UR wrote: Dr Bruce Griffiths said the following on 10/22/2006 07:33 PM: Didier If you are going to use a PPS divider to divide the oscillator frequency down to 1Hz, you will need to measure the inherent jitter of the divider to ensure that it doesn't degrade the measurement resolution. It may be necessary to resynchronise the divided output using a fast D flipflop to reduce the inherent divider jitter to less than the 20ps resolution of the 5370. The few experiments I've done indicate that there isn't that much sample-to-sample jitter in a divider built up out of a reasonable-length string of 74HC390 dividers, but the temperature stability is horrible. John ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts This propagation delay drift may degrade the measurement accuracy of long term trends in the time difference between the divider PPS output and another PPS source such as a GPS receiver. Resynchronising the divider output to the divider clock will drastically reduce this particuarly if a fast (ACMOS?) D flipflop is used. However using a ripple counter divider chain means that for a PPS output, synchronisation to the divider input frequency may require cascaded synchronisers. First synchronising to a frequency generated by the first divider stage to ensure that the divider PPS output transitions do always occur well away from the synchronising clock transitions despite worst case propagation delay variations. Finally the output of this synchronisers is itself synchronised to the divider input clock using another D flipflop. The temperature dependent variation of the GPS receiver delay and (for long cable lengths) the antenna cable delay may also be problematic particularly if high accuracy is required. This is why some geodetic GPS receiver installations regulate the temperature of the antenna, preamp, receiver and associated cabling. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
John Miles wrote: You can do a lot worse than straight TTL. Some useful graphs on pages 102 and 103 of Rohde's Microwave and Wireless Synthesizers: Theory and Design. Hint: Look it up at www.amazon.com and you can view those two pages, if you search within the book for the phrase 170 dB. -- john, KE5FX The few experiments I've done indicate that there isn't that much sample-to-sample jitter in a divider built up out of a reasonable-length string of 74HC390 dividers, but the temperature stability is horrible. ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts I have a copy of this. However I find that these graphs appear somewhat inconsistent. Figure 2-15 should be used for comparing the various logic families. For a valid comparison the input frequencies and output frequencies should be the same. When you actually critically examine the data, TTL is nowhere near as good as implied by the text. This book is somewhat variable in the quality of its information. Some of it is very good, some of it is just incorrect. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Didier Juges wrote: Dr Bruce Griffiths wrote: In principle this measurement could be made with a time interval counter: PPS - START delayed 10KHz - STOP Vary the delay and watch the jitter jump when the leading edge of the PPS signal occurs during the 10KHz burst which was phase coherent with the previous PPS pulse. The only problem is finding a suitable variable delay device with sufficiently low (=1ns??) jitter. The delay device can be triggered by the 1 PPS, then will drive the ARM input of the counter, so as long as the delay device's jitter is less than the 10 kHz period, if we adjust the delay to 0.99985 second (between the last 2 periods of 10 kHz before the 1 PPS), then the TI counter will START on the last 10 kHz pulse before the pps, and STOP on the 1 PPS. Tek has some time delay generators in the TM-500 and 7000 plug-in series. I knew one day I would need one of those, I now know why :-) Didier ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts You could always use an HP5359A. These are still available on the surplus market. However if a jitter of say 100ns is OK you can easily construct a suitable digital delay device using a 10MHz clock (slower if more jitter is OK). Although it could be built using a collection of CMOS parts it may be much simpler and cleaner to use a programmable gate array or its equivalent. Loading the required delay via a synchronous serial interface will reduce the board layout complexity. It is essential to use a synchroniser (shift register) to synchronise the input PPS pulse to the delay generator clock to minimise the probability of metastability induced problems. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Didier Juges wrote: Dr Bruce Griffiths wrote: In principle this measurement could be made with a time interval counter: PPS - START delayed 10KHz - STOP Vary the delay and watch the jitter jump when the leading edge of the PPS signal occurs during the 10KHz burst which was phase coherent with the previous PPS pulse. The only problem is finding a suitable variable delay device with sufficiently low (=1ns??) jitter. The delay device can be triggered by the 1 PPS, then will drive the ARM input of the counter, so as long as the delay device's jitter is less than the 10 kHz period, if we adjust the delay to 0.99985 second (between the last 2 periods of 10 kHz before the 1 PPS), then the TI counter will START on the last 10 kHz pulse before the pps, and STOP on the 1 PPS. Tek has some time delay generators in the TM-500 and 7000 plug-in series. I knew one day I would need one of those, I now know why :-) Didier ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Didier A much simpler/cheaper though less flexible solution to the phase jerk measurement problem. Construct a preloadable synchronous up counter using 4 74HC163's (74HC160 or 74HC162 also OK but may be harder to obtain). Clock this at 10KHz from the GPS receiver. Use a 74HC164 to synchronise the PPS output to 10KHz (use a 74HC86 as a clock buffer so the correct clock polarity can be easily selected). Use a 74HC00 to generate a pulse one clock cycle wide from the shift register 7th and 8th stage outputs. This pulse is used to load the counter chain with a suitable value corresponding to the desired delay. A decoder and a deglitching flipflop are used to generate a glitch free GATE signal for the HP5370. A 74AC04 can be configured as a suitable driver for the ARM input. Additional logic ensures that the counter resets to zero and stops until the next PPS pulse occurs. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Didier Juges wrote: Dr Bruce Griffiths wrote: In principle this measurement could be made with a time interval counter: PPS - START delayed 10KHz - STOP Vary the delay and watch the jitter jump when the leading edge of the PPS signal occurs during the 10KHz burst which was phase coherent with the previous PPS pulse. The only problem is finding a suitable variable delay device with sufficiently low (=1ns??) jitter. The delay device can be triggered by the 1 PPS, then will drive the ARM input of the counter, so as long as the delay device's jitter is less than the 10 kHz period, if we adjust the delay to 0.99985 second (between the last 2 periods of 10 kHz before the 1 PPS), then the TI counter will START on the last 10 kHz pulse before the pps, and STOP on the 1 PPS. Tek has some time delay generators in the TM-500 and 7000 plug-in series. I knew one day I would need one of those, I now know why :-) Didier ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Since the HP5370 arm input is high impedance(1 Megohm) and its input range lies betwen -2V and +2V its desirable to drive it from a back terminated source with an amplitude of 2V or less to avoid overdriving (the comparators are better behaved if the input signal remains within the specified range) the input and ensure that the pulse at the ARM is relatively clean and reflection free. A suitable buffer can be built using 3 74AC04 inverters as depicted below: The 74AC04 inverters load currents are well within the specified limits even if the buffer output is shorted to ground. Thus the driver should have a long service life. ARM driver Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Didier Juges wrote: Dr Bruce Griffiths wrote: Didier Juges wrote: Dr Bruce Griffiths wrote: In principle this measurement could be made with a time interval counter: PPS - START delayed 10KHz - STOP Vary the delay and watch the jitter jump when the leading edge of the PPS signal occurs during the 10KHz burst which was phase coherent with the previous PPS pulse. The only problem is finding a suitable variable delay device with sufficiently low (=1ns??) jitter. The delay device can be triggered by the 1 PPS, then will drive the ARM input of the counter, so as long as the delay device's jitter is less than the 10 kHz period, if we adjust the delay to 0.99985 second (between the last 2 periods of 10 kHz before the 1 PPS), then the TI counter will START on the last 10 kHz pulse before the pps, and STOP on the 1 PPS. Tek has some time delay generators in the TM-500 and 7000 plug-in series. I knew one day I would need one of those, I now know why :-) Didier ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Since the HP5370 arm input is high impedance(1 Megohm) and its input range lies betwen -2V and +2V its desirable to drive it from a back terminated source with an amplitude of 2V or less to avoid overdriving (the comparators are better behaved if the input signal remains within the specified range) the input and ensure that the pulse at the ARM is relatively clean and reflection free. A suitable buffer can be built using 3 74AC04 inverters as depicted below: The 74AC04 inverters load currents are well within the specified limits even if the buffer output is shorted to ground. Thus the driver should have a long service life. ARM driver Bruce The trigger levels on the 5370 are strange. The normal inputs have trigger levels that can be adjusted between -1.5 and +0.6 V or something like that. I am not sure where that is coming from. For the ARM input, if someone is going to drive it with long coax cables, the best would be a 50 ohm termination right at the instrument's input. The schematic did not make it, but I believe I understand what you mean: 3 gates with common input, each output has a 150 ohm series resistor and the outputs (far end of the resistors) are tied together, to provide a good 50 ohm drive to the cable. A series capacitor would probably be recommended to center the signal around ground (assuming it's 50% duty cycle). Didier ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Didier The trigger level limits are derived from the input amplifier and trigger circuit characteristics for the START and STOP inputs. The ARM input feeds directly (via a 1X FET buffer) to an ECL comparator ((MC1651). This comparator has an NPN longtailed pair input stage the characteristics of which determines the usable input signal range. Driving an amplifier or comparator input stage into saturation degrades its timing characteristics somewhat. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Didier Juges wrote: Bruce, Thanks for the reminder. That was my intention. I was planning to use a 74HC74, and whatever dividers I can get my hands on. I am not looking forward to daisy chain seven 7490s, so I will probably try something else. With the D flip-flop, the dividers don't really matter, as long as the delay is below 100nS. I need to find the best way to go from the 10 MHz sinewave to the divider, probably through an LM119 comparator with modest hysteresis. The need for a low jitter divider is the same for the GPS disciplined oscillator, so I should be able to reuse the divider for my frequency standard. Thanks Didier Dr Bruce Griffiths wrote: Didier If you are going to use a PPS divider to divide the oscillator frequency down to 1Hz, you will need to measure the inherent jitter of the divider to ensure that it doesn't degrade the measurement resolution. It may be necessary to resynchronise the divided output using a fast D flipflop to reduce the inherent divider jitter to less than the 20ps resolution of the 5370. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Didier You can use a set of cascaded 74HC4017 Johnson counters to divide 10MHz down to 1 Hz as long as you use a 2 stage (74AC74??) resynchroniser to reduce the PPS jitter and reduce the effective propagation delay. With an extra gate or 2 this will even work for a 5MHz input. It is not necessary to have a 50% duty cycle signal to drive the HP5370 allowing more flexibility in the divider design. I have designed a circuit using 74HC4017's to do this with a 5MHz input. If you want I can send it to you. Satisfactory drivers for the HP5370 START and STOP inputs can also be built by using a 270 ohm resistor in series with an ACMOS gate or flipflop output. This produces a swing of around 800mV into a 50 ohm load which is more than sufficient. The load current ratings of the driver device are not exceeded even if the load is shorted. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Didier Juges wrote: Bruce, Thanks for the reminder. That was my intention. I was planning to use a 74HC74, and whatever dividers I can get my hands on. I am not looking forward to daisy chain seven 7490s, so I will probably try something else. With the D flip-flop, the dividers don't really matter, as long as the delay is below 100nS. I need to find the best way to go from the 10 MHz sinewave to the divider, probably through an LM119 comparator with modest hysteresis. The need for a low jitter divider is the same for the GPS disciplined oscillator, so I should be able to reuse the divider for my frequency standard. Thanks Didier Dr Bruce Griffiths wrote: Didier If you are going to use a PPS divider to divide the oscillator frequency down to 1Hz, you will need to measure the inherent jitter of the divider to ensure that it doesn't degrade the measurement resolution. It may be necessary to resynchronise the divided output using a fast D flipflop to reduce the inherent divider jitter to less than the 20ps resolution of the 5370. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Didier If you use a comparator, the LM119 is a bit on the slow side, a more modern lower power comparator such as an AD8561 or similar would be preferable. Failing this, an overdriven longtailed pair using 2N3904's or equivalent devices is usually perfectly satisfactory when the input amplitude is sufficiently large (= 1V pp). To discipline the oscillator using GPS you dont actually need to divide its frequency all the way down to 1Hz. As long as the output frequency of the divider is a multiple of 1Hz and its period exceeds the combination of the GPS PPS jitter and the oscillator timing drift/wander over the loop response time any convenient output frequency can be used. With a 10MHz oscillator, dividing its output by 16 allows a timing wander jitter tolerance of 1.6us this is probably a little tight in most cases, dividing the 10MHz by 256 gives you a jitter/wander budget of 25.6us which should be more than adequate for a good oscillator and a loop response time of 1000 sec or so. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Didier Juges wrote: Dr Bruce Griffiths wrote: Didier Juges wrote: Dr Bruce Griffiths wrote: Didier Juges wrote: Dr Bruce Griffiths wrote: In principle this measurement could be made with a time interval counter: PPS - START delayed 10KHz - STOP Vary the delay and watch the jitter jump when the leading edge of the PPS signal occurs during the 10KHz burst which was phase coherent with the previous PPS pulse. The only problem is finding a suitable variable delay device with sufficiently low (=1ns??) jitter. The delay device can be triggered by the 1 PPS, then will drive the ARM input of the counter, so as long as the delay device's jitter is less than the 10 kHz period, if we adjust the delay to 0.99985 second (between the last 2 periods of 10 kHz before the 1 PPS), then the TI counter will START on the last 10 kHz pulse before the pps, and STOP on the 1 PPS. Tek has some time delay generators in the TM-500 and 7000 plug-in series. I knew one day I would need one of those, I now know why :-) Didier ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Since the HP5370 arm input is high impedance(1 Megohm) and its input range lies betwen -2V and +2V its desirable to drive it from a back terminated source with an amplitude of 2V or less to avoid overdriving (the comparators are better behaved if the input signal remains within the specified range) the input and ensure that the pulse at the ARM is relatively clean and reflection free. A suitable buffer can be built using 3 74AC04 inverters as depicted below: The 74AC04 inverters load currents are well within the specified limits even if the buffer output is shorted to ground. Thus the driver should have a long service life. ARM driver Bruce The trigger levels on the 5370 are strange. The normal inputs have trigger levels that can be adjusted between -1.5 and +0.6 V or something like that. I am not sure where that is coming from. For the ARM input, if someone is going to drive it with long coax cables, the best would be a 50 ohm termination right at the instrument's input. The schematic did not make it, but I believe I understand what you mean: 3 gates with common input, each output has a 150 ohm series resistor and the outputs (far end of the resistors) are tied together, to provide a good 50 ohm drive to the cable. A series capacitor would probably be recommended to center the signal around ground (assuming it's 50% duty cycle). Didier ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Didier The trigger level limits are derived from the input amplifier and trigger circuit characteristics for the START and STOP inputs. The ARM input feeds directly (via a 1X FET buffer) to an ECL comparator ((MC1651). This comparator has an NPN longtailed pair input stage the characteristics of which determines the usable input signal range. Driving an amplifier or comparator input stage into saturation degrades its timing characteristics somewhat. Bruce I understand that the levels are what they are due to the use of ECL logic, I was wondering from a user's perspective, was the 5370 intended to be used only with ECL logic circuits? I am surprised that they did not design a trigger range that included at least the old normal TTL levels 0 to 5V. TTL was very common when the 5370 was designed (it uses a lot of it internally, not so much in the timing circuits though) Didier ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts The 5370 STOP and ARM inputs can cope with 5V TTL/CMOS levels if used with the 10X input attenuators. The high input impedance HP5363 time interval probes allow a much wider -10V to +10V input range. The ARM input has no built in attenuator, however you can use an external attenuator with it. Neither CMOS nor TTL were intended to drive 50 ohm loads so a high impedance probe was usually required. It is possible to use resistors designed into the circuit to create very wide bandwidth 10:1 or 20: probes when driving a 50 ohm instrument. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Tom Van Baak wrote: Didier, I've been out of town and I see a flurry of postings to your original query about Allan deviation. It sounds like your goal is to measure the stability of various oscillators that you have lying around? First, your 5370 or any other TIC (Time Interval Counter) will be adequate for this. I'd suggest using a 'scope on the input channel(s) to make sure your signal and trigger levels are what you think they are. Outliers or high 5370 STDEV is a hint of poor triggering. It sounds like you have the computer data logging part solved. Most ADEV tools take accumulated phase difference data; just the data that a 5370 in TI mode will generate. Second, your Jupiter GPS board, or any other sub-100 ns GPS timing board, will work fine. Use the 1PPS output. You don't have to build a GPSDO in order to make the measurements that you want! In fact, it may only get in the way. Instead, consider these two points. 1) For short-term stability tests, just make a set of quick pair-wise measurements between stand-alone oscillators at short gate-times. If they are close in frequency, or can be made close in frequency, then the 5370 built-in STDEV statistic is useful in real-time (use an N or 10 or 100). If not, collect raw phase data and run it through your favorite ADEV tool. This method should work fine for fractions of a second to 10s or 100s of seconds. The good and bad pairs will be obvious; in a matter of minutes you can tell which one or two oscillators are the best, short-term. Remember that your measurements are the RMS sum of both oscillators and the counter itself so there will be limits to the resolution, especially visible at short times. 2) For long-term stability measurements, one at a time, compare your oscillators against the raw GPS 1PPS, collect phase data, and run it through your ADEV tool. To avoid phase wrap-around, depending on the frequency offsets, you may need to divide the 5/10 MHz oscillator down to at least the kHz range, or the obvious 1PPS, to get clean phase measurements. Let the GPS 1PPS be the start channel. For this sort of long-term measurement any TTL/CMOS homebrew divider will work (the jitter and tempco are in the noise). It's OK to average the samples down by 100 to 1000 to reduce the volume of data you collect or process. I often use something around 300 (5 minutes). This will give you frequency offset, mid- to long-term stability, and frequency drift information. A couple of hours or days of data per oscillator should be sufficient. Again, you don't need to build a GPSDO for any of this. /tvb ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Tom In comparing 2 oscillators do you mean 1) Connecting one oscillator to the FREQ STD input at the rear of the 5370A, selecting the external timebase and connecting the other oscillator to the Front panel FREQ/PERIOD input and then selecting frequency measurement which in effect gives the frequency ratio of the 2 oscillators? OR 2) Connecting the 2 oscillators to the LO and RF ports of a mixer, lowpass filtering the mixer output and measuring the beat frequency? If the temperature varies over a large range whilst collecting PPS timing data, any old divider will not suffice as particularly with a CMOS ripple counter (eg cascaded 74HC390's) the propagation delay (tempco ~ 0.4%/K) will vary significantly as will the receiver delay. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
[time-nuts] Pathological PPS divider designs
As a first submission to a collection of pathological PPS divider designs where the input clock to output delay is so large that its jitter and more particularly its tempco are significant I suggest that the following: Input stage HEF4017 with 10V power supply clock to output delay 110 ns max at 25C subsequent 6 stages Motorola MC4017 with 10V power supply clock to output delay ~400ns max At 25C Total propagation delay from clock to output ~ 2.5us max, tempco ~10ns/K. This design will operate reliably with a 10MHz input up to about 50C when the worst case maximum input clock frequency for the first stage If the 2nd and subsequent stages are operated at 5V the propagation delay will increase to about 4.9us max, however the divider will still work reliably over a reasonable temperature range. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Magnus The drawback with a CPLD is that most have a relatively high dc supply current. I have a couple of CPLD designs that work the way you advocated. A CMOS divider has the attraction that its power supply current can be relatively small even when the (small duty cycle) output drives a 50 ohm load. The other problem with CPLDs is most are surface mount and use small pad separations which can be problematic for home construction. I have posted the pathological design to the list. It is intended as a warning to be careful, even though one has these nice slow low power supply noise parts in the drawer which can be used to reliably generate a 1 PPS output, the divider will severely degrade the measurement accuracy. It is even so pathological that one cannot reliably resync the output to the input clock without resorting to exceedingly expensive heroic measures such as a triple or quadruple cascaded synchronisers (synchronising first to 100KHz output of 2nd 4017, then to the 1MHz output of the first 4017 followed by the expensive synchroniser) The final set of synchronisers probably requires a series of tapped delay lines that track the propagation delay of the first divider, eventually the last synchroniser is clocked by the input clock. Whilst no experienced designer would even contemplate this its possible the less experienced may fall into this trap. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
[time-nuts] HP5370 differeential linearity errors
There is a potential problem, particularly with the 5370A and possibly the 5370B which may not be generally known. 1) Crosstalk between the microstriplines from the Schmidt trigger outputs (XA4: U1, U2) to the arming board amplifier inputs (XA22: U19, U20) 2) Cross talk between the microstriplines going from the multiplexers (XA22: U15, U16) to the START and STOP flipflops (XA22: U17, U21) 3) Modulation of the 200MHz reference at and by the mixer inputs (XA19, XA20:U7) 1 + 2 cause differential nonlinearity in instances where the signals are simultaneously active near the trigger points. Nonlinearity is well over 100ps. 3 causes a nonlinearity of less than 100ps but is always present Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Didier Juges wrote: Hi Ulrich, comments are embedded: Ulrich Bangert wrote: the Datum LPRO User's Guide / Installation Guide discusses some methods of sine to square wave conversion in terms of lowest phase noise. This is good to know. Do you have any suggestion how I might get a copy of the relevant pages of the manual? Since you were originally asking for Allan Deviation i would like to advertise again my free PLOTTER software which does what ALAVAR does but more nicely + many things more. Since it does not simply open the input file but first makes a copy to a working file you may even work with it on files in that a different program is currently sampling data, so you don't have to wait to the end of data acquistion but may get intermediate results at any time. That sounds like a great feature, nothing worse than stopping a long test period just to see if the data is any good, even though I should get the same result by copying the log in progress in a temp file using conventional methods. Your program saves the step and makes it that much more convenient. I will download it. I will make sure my program does not buffer too much data before flushing to the file, so that I get as much of the data that is available for analysis. When you put forward your questions about measuring Allan deviation i saw that it were all the right intelligent questions and perhaps this is the reason why so many people are willing to enlighten you. I wish I had known time nuts when i was in the same state of mind as you. Would have saved me years of learning it the hard way! Thank you. I am amazed at the amount and quality of support I got. I intend to organize all the contributions in a web page. It seems like I was not the only one with these questions, but everyone else was afraid to ask :-) 73 de Ulrich, DF6JB 73, de Didier KO4BB ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Didier You may also find this useful http://www.wenzel.com/documents/waveform.html There are some other items that may be of interest at: http://www.wenzel.com/documents/library.html Though you may not want to build the water barometer!! Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Didier Did you get my comment on HP5370A differential linearity errors. It made it to the list but I didn't receive a bounced copy. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Didier Juges wrote: Here are my $0.02... Magnus Danielson wrote: From: Dr Bruce Griffiths [EMAIL PROTECTED] Subject: Re: [time-nuts] How to measure Allan Deviation? Date: Tue, 24 Oct 2006 10:52:21 +1300 Message-ID: [EMAIL PROTECTED] Tom Hi Bruce, In comparing 2 oscillators do you mean 1) Connecting one oscillator to the FREQ STD input at the rear of the 5370A, selecting the external timebase and connecting the other oscillator to the Front panel FREQ/PERIOD input and then selecting frequency measurement which in effect gives the frequency ratio of the 2 oscillators? I have advocated this approach, but nobody seemed to care. HP says in the 5316B manual (probably in other manuals, but that's where I saw it first), that it is best to compare 2 oscillators by plugging them in START and STOP respectively, but NOT to use one as a standard, because averaging works better (or simply, works) when the internal standard is async with either START or STOP signals. Cheers, Magnus Didier ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts This may also be helpful in mitigating the effect of some of the differential linearity errors of the HP5370A Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Didier Juges wrote: I do not understand the signal on the rear trigger outputs. At the moment, I have a single 10 MHz sine signal fed to the START channel, and the 5370 is set to TI, MEAN, SAMPLE SIZE 1, + TI ONLY, START channel triggers on rise and STOP channel triggers on fall, and START COM is selected. The instrument displays about 60 nS (fairly stable, 150 ps jitter) or so at the moment. The rear START trigger shows a negative going pulse (400uS wide, at 62 mS rep rate), with the rising edge (positive going) synchronous with the 10 MHz signal and the phase is adjustable using the *STOP* trigger level! When I trigger the scope on the falling edge of the START trigger output, the 10 MHz signal seems to drift, and the trigger setting has no effect, except that if adjusted too far, the instrument stops updating the display. Apparently, the START trigger adjustment has no effect on the timing of the rear START trigger output, but will cause the display to freeze if the START trigger is set to either extreme, even though the START trigger output on the rear does not change. The STOP trigger output works the opposite: it responds to the START trigger level. Could it be that the outputs are reversed on my instrument? I am not sure this is a complete description, and maybe there is an obvious answer that I am missing, but I am perplexed. Didier The 5370A processor can swap the front panel START and STOP inputs over via an ECL multiplexer on bord A22. The rear panel outputs reflect the actual selected START and STOP events not necessarily the signals connected to the front panel START and STOP connectors. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Didier START and STOP selection is even more complex than I indicated. START SOURCE STOP SOURCE REAR PANEL START TRIGGER REAR PANEL STOP TRIGGER Front panel START Front Panel STOP Front Panel START Front Panel STOP Front panel STOPFront Panel STOP Front Panel STOP Front Panel STOP Front panel START Front Panel STARTFront Panel START Front Panel START Front panel STOPFront Panel START Front Panel STOP Front Panel START If you have a manual for the 5370A this is all documented in the programming section (except for the connection of the rear panel START and STOP trigger outputs which can be gleaned by perusing the circuit diagram for A22.. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Didier Juges wrote: Dr Bruce Griffiths wrote: Didier Juges wrote: I do not understand the signal on the rear trigger outputs. At the moment, I have a single 10 MHz sine signal fed to the START channel, and the 5370 is set to TI, MEAN, SAMPLE SIZE 1, + TI ONLY, START channel triggers on rise and STOP channel triggers on fall, and START COM is selected. The instrument displays about 60 nS (fairly stable, 150 ps jitter) or so at the moment. The rear START trigger shows a negative going pulse (400uS wide, at 62 mS rep rate), with the rising edge (positive going) synchronous with the 10 MHz signal and the phase is adjustable using the *STOP* trigger level! When I trigger the scope on the falling edge of the START trigger output, the 10 MHz signal seems to drift, and the trigger setting has no effect, except that if adjusted too far, the instrument stops updating the display. Apparently, the START trigger adjustment has no effect on the timing of the rear START trigger output, but will cause the display to freeze if the START trigger is set to either extreme, even though the START trigger output on the rear does not change. The STOP trigger output works the opposite: it responds to the START trigger level. Could it be that the outputs are reversed on my instrument? I am not sure this is a complete description, and maybe there is an obvious answer that I am missing, but I am perplexed. Didier The 5370A processor can swap the front panel START and STOP inputs over via an ECL multiplexer on bord A22. The rear panel outputs reflect the actual selected START and STOP events not necessarily the signals connected to the front panel START and STOP connectors. Bruce Good catch, but I thought that only came to play when +/-TI was selected, and I have selected +TI ONLY? Didier ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Didier That's not the way I interpret the manual or the article on the 5370 in the HP journal. +TI ignores all STOP inputs until after the START event. +-TI START before STOP is a positive time interval STOP before START is a negative time interval. Internal logic implements a precedence detctor so that the relative order of accepted start and stop events can be determined. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] How to measure Allan Deviation?
Didier Juges wrote: Hi Bruce, Dr Bruce Griffiths wrote: Didier Juges wrote: Dr Bruce Griffiths wrote: Didier Juges wrote: I do not understand the signal on the rear trigger outputs. At the moment, I have a single 10 MHz sine signal fed to the START channel, and the 5370 is set to TI, MEAN, SAMPLE SIZE 1, + TI ONLY, START channel triggers on rise and STOP channel triggers on fall, and START COM is selected. The instrument displays about 60 nS (fairly stable, 150 ps jitter) or so at the moment. The rear START trigger shows a negative going pulse (400uS wide, at 62 mS rep rate), with the rising edge (positive going) synchronous with the 10 MHz signal and the phase is adjustable using the *STOP* trigger level! When I trigger the scope on the falling edge of the START trigger output, the 10 MHz signal seems to drift, and the trigger setting has no effect, except that if adjusted too far, the instrument stops updating the display. Apparently, the START trigger adjustment has no effect on the timing of the rear START trigger output, but will cause the display to freeze if the START trigger is set to either extreme, even though the START trigger output on the rear does not change. The STOP trigger output works the opposite: it responds to the START trigger level. Could it be that the outputs are reversed on my instrument? I am not sure this is a complete description, and maybe there is an obvious answer that I am missing, but I am perplexed. Didier The 5370A processor can swap the front panel START and STOP inputs over via an ECL multiplexer on bord A22. The rear panel outputs reflect the actual selected START and STOP events not necessarily the signals connected to the front panel START and STOP connectors. Bruce Good catch, but I thought that only came to play when +/-TI was selected, and I have selected +TI ONLY? Didier ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Didier That's not the way I interpret the manual or the article on the 5370 in the HP journal. +TI ignores all STOP inputs until after the START event. +-TI START before STOP is a positive time interval STOP before START is a negative time interval. Internal logic implements a precedence detctor so that the relative order of accepted start and stop events can be determined. Bruce You are correct of course, I *assumed* the counter would automatically swap the START and STOP rear trigger outputs as needed when the +/-TI mode was selected, but that in +TI ONLY mode, there should be no need to swap START and STOP, therefore the rear trig outputs would be fixed. I have a lot more reading to do, it's a big manual. I have a pdf of it on my web site and I printed all this week end, big job! Can you send me the pdf of the HP journal about the 5370? If it's too big to attach, can you upload it to my web site? dns: ftp.ko4bb.com login: manuals password: manuals Thanks Didier ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Didier Will do as soon as I find the particular issue again. May take a little while as I haven't looked at it for a year or so. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Comparison of Logic Standards for Clock Distribution
Stephan Sandenbergh wrote: Hi All, Can anyone give me the low-down on logic standards for clock distribution in digital systems? It seems that ECL, PECL and LVDS are the most widely used. After a quick glance at the specs for the above mentioned standards I noted the following differences between ECL/PECL and LVDS: Although ECL/PECL is faster and can be distributed along longer lengths of cable it requires more power and produce more noise. Also the input sensitivity of LVDS is twice that of ECL/PECL. So logically, I can conclude that one should use ECL/PECL for clock distribution along long lengths of cable and LVDS for shorter ones. However, there are a number of questions that spring to mind. Even when distributing a low frequency digital signal, for example a 10MHz frequency reference, one is in reality faced with a high-speed digital problem. One explicitly wants the signal to have fast edges so that it is effectively immunized against amplitude/temperature/power supply variations. The faster the edge (or rise time) the lower the delta t (or jitter) in response to the mentioned variations. However, faster edges give rise to various problems such as crosstalk, EMI and reflectionsringing. I guess that another approach would be to differentially transmit the clock in sinusoidal format where after it is heavily filtered and squared at the receiving end. Now, one would have less transmission line problems but also less noise immunity. It seems that there must be a trade-off between the digital and analog worlds here. I grasp that more bandwidth (for faster rise times) allows faster data throughput but where is the middle ground for conveying frequency references? (i.e. at which rise time will the side-effects out weigh the benefits) Kind regards, Stephan Sandenbergh. ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Differential signalling using current mode drivers (open collector long tailed pair or equivalent) can be more effective than ECL and LVDS in that the output common mode range may be significantly larger. This allows larger differences in ground potential between the transmitter and receiver and hence greater immunity to this. ECL can have problems when the ground potential differences between the receiver and transmitter are large enough. Whre a current mode driver will work well even with several volts of difference in ground potentials. Transformer coupling is also effective when dc coupling isnt necessary, however the transsformer characteristics will degrade the signal rise and fall times. It is difficult to preserve the subnanosecond rise and fall times of digital signals when transmitted over a significant length of circuit board trace (particularly when using an FR4 or equivalent board substrate). Distributing a standard frequency using a well screened dedicated shielded balanced transmission line presents fewer difficulties (for distances of a few hundred meters or so) than attempting to distribute a relatively small amplitude logic level signal. RF transformers at each end can be used to provide good common mode rejection and it is relatively easy to transmit higher power signals than is feasible with logic signals. If noise is perceived as a problem then one can always phase lock a crystal oscillator at the receiving end to the transmitted signal. Eventually cable losses associated with long cables limits the bandwidth and hence the signal risetime. Optical fibre is used when a reference frequency has to be transmitted over several kilometers as in Radio telescope interferometer arrays. The fibre is relatively immune to differences in ground potential, and other noise sources. Fibre can also have a significantly lower propagation delay temperature coefficient. Fibre bandwidth degrades less rapidly with length than cable bandwidth. Analog transmission techniques also have the advantage of degrading the signal short term stability less than digital transmission techniques. The jitter of a digital device adds more phase noise than a well designed analog amplifier. A good reference on the problems of high speed digital design is: HIGH-SPEED DIGITAL DESIGN A Handbook of Black Magic Howard W Johnson Martin Graham PTR Prentice Hall ISBN 0-13-395724-1 Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Allan deviation - finally some data!!!
Didier Juges wrote: I have downloaded and installed Plotter, and found it easy to setup and use, at least for basic functionality. The menu threw me off a little bit (no simple File-Open dialog), but I am sure I will get used to it. I have ran my spare HP10811 overnight (twice), against the HP5370A's own timebase, and the plots are at http://www.ko4bb.com/Test_Equipment under HP10811xxx.png It turns out I simply fed Plotter with a flat file containing a single record per line, which is the formatted output from the 5370. Yesterday's file is Counter_TI.dat in the same directory as the pictures, for the curious (it is almost 1 MB). The large variations in the raw data are due to the house heating, which I turned on briefly before going to bed, and again when I woke up, causing the delay to drop slightly. Other than those variations, the DUT and the HP5370's own timebase were in pretty good sync, considering that I compared the 10 MHz outputs directly, and they were not phase locked. There are two sets of plots, those with -2 were taken yesterday with no averaging in the 5370, the others were taken the day before had 1k averaging, so they show considerably more noise, as expected. The -2 data was collected at 2 seconds interval instead of 0.4 second for the other set. Interesting to note that the variations in the first raw plot are due to house heating, which I turned on briefly before going to bed and again in the morning, before shutting down the equipment. There should have been the same variation in the second set of data, but it is buried under the noise because of the lack of averaging. Other than that, the oscillators remained within 50-60 nS of each other over night without being phase locked, not bad for 2 free running OCXOs I believe. Obviously, I need to refine my setup and procedures before the data is meaningful, but so far, it is working. Didier KO4BB ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts The apparent behaviour of your 10811's is far too good!! Over a period of 15,000 seconds the allan deviation should have reached a minimum and then increased as the effects of ageing manifest themselves. Either the oscillators are injection locked or your analysis is suspect. If the analysis were correct the performance approaches or even exceeds that of the most stable crystal oscillators ever built. This is extremely unlikely something has to be wrong. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Comparison of Logic Standards for Clock Distribution
Stephan Sandenbergh wrote: Hi Bruce, Thank you for the elaborate answer covering different logic types. Funny enough, I have just read the excellent book you recommended cover to cover - probably the origin of many of my questions. As I said in reaction to Said's response - I am not surprised that analog (sine wave) transmission is superior. But, it takes a lot more effort to do it well. You mentioned that locking to a crystal at the receiving end as an option. Does this mean that signal transmission is primarily plagued by short term noise? I have never really touched the topic of optical fibre, but I realise that it is superior to conventional methods. The superiority of optic fibre is probably not as pronounced at short distances, is it? I realise that a better reference clock will only improve a system's performance up to the point where the jitter and phase noise of the other components in the system begins to dominate. However, I would like to have a good grip on the basics. Are there any good books you can recommend on the topic of clock distribution? Kind regards, Stephan Sandenbergh ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Whilst there are many books available of clock distribution within digital systems (eg http://cva.stanford.edu/books/dig_sys_engr/) and within VLSI chips, there is little specific info published in book form on precision clock/frequency standard distribution on the larger scale such as within or between buildings. The difficulties associated with high speed clock distribution in silicon VLSI chips currently limits the maximum clock speed of such chips to around 4GHz or so. Simply using higher resolution lithography to produce smaller transistors doesn't help much. Optical techniques for clock distribution on chip are being investigated. One can glean some idea of how this may best be done by looking at how NIST, USNO, NIST, PTB, etc pipe the standard frequencies from their various atomic standards around. Current designs for modern radio telescope arrays such as the Atacama millimeter array and upgrades of various existing instruments give a good indication of current best practice for such instruments that require state of the art timing stability. For VLBI where the radio telescopes may be on different continents it is not possible to actually transmit reference frequencies between stations with adequate stability. Usually each station has its own hydrogen maser. The frequencies of these masers may be steered in the long term (weeks) by GPS all in view observations and other techniques. Signal integration times of up to 10,000 seconds are used when observing cosmic radio sources. As long as the offsets and drift of the various clocks are relatively stable and not too large the data reduction software can compensate for them. Ensuring that the various antenna clocks in an interferometer array are synchronised to within a few picoseconds (preferably femtoseconds) is difficult when the antenna separation is large and the cabling/fibre is subject to large temperature variations. That said, low frequency radio frequency interferometry has been done using GPS all in view techniques to synchronise antenna clocks. It doesn't matter too much if the various antenna clock frequencies wander around as long as they all do so in lockstep. When using passive filters in receivers and distribution amplifiers, the temperature coefficient of the filter phase shift can limit the phase stability of the received clock signal. Low temperature coefficient inductors and capacitors are necessary and high Q tuned circuits have relatively high phase shift temperature coefficients. For the ultimate in phase stability it may be necessary to regulate the temperature of such components. Even coax cables have delay tempcos ranging from 50-100 ppm/K. The tempco of some optical fibres can be significantly lower. When using coax one should avoid PTFE dielectrics if the cable temperature approaches 15C where PTFE undergoes a phase transition which can be observed by plotting the cable delay as a function of temperature. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Allan deviation - finally some data!!!
Didier It would be useful if you describe in some detail your measurement setup. Which signals are connected to which inputs on the 5370A? How long are the cables? etc., Also given your source selection problems with the 5370A it may be instructive to run a simple test. Connect a low frequency square wave source to both the START and STOP inputs ensuring that the cable length to the STOP input is around 1m or so longer than the cable to the START input. Select TI and see if the time interval difference is around 5ns (for a 1m cable lenght difference) and the noise is substantially less than 100 picosec. Select the START and STOP inputs to trigger from the same edge of the input waveform. The jitter of the square wave source isn't critical. A resistive splitter can be used to ensure low reflections when both START and STOP inputs are selected for 50 ohm input. Otherwise the a BNC T can be used on the START input (select 1 megohm input ) with a 1m length of 50 ohm coax running from the BNC T to the STOP input which is set for 50 ohm input impedance. Reflections aren't a problem if the trigger thresholds are set correctly. The square wave source should be capable of producing an output of at least 800mV pp into 50 ohms. If you have nothing else the PPS output (suitably buffered) from a GPS receiver will work just fine. Typical measurement jitter for a good 5370 is about 35 picosec. If this works then you can have an increased confidence that the 5370 is indeed working as it should. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
[time-nuts] HP 5370A A22 arming assembly circuit diagram error
The positive supply connection to A22:U7 (LM339 quad comparator) is shown as ground in the circuit diagram. This is surely incorrect as the inputs of U6B and U6C are connected to TTL(+5V VCC) signals. Surely this is not the designers intention The positive supply of A22:U7 should be +5V. Is there a manual change correcting this schematic error that I have missed? If A22:U7 positive supply is indeed ground, the circuit may still work but its reliability will be compromised by the relatively large currents flowing into A22:U7CD input substrate diodes. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
[time-nuts] HP5370A A22 arming assembly circuit diagram error
Correction to previous post. (typed U7 instead of U6 VVC connected too ground OK for U7 as inputs are ECL levels. ) The positive supply connection to A22:U7 (LM339 quad comparator) is shown as ground in the circuit diagram. This is surely incorrect as the inputs of U6B and U6C are connected to TTL(+5V VCC) signals. Surely this is not the designers intention The positive supply of A22:U6 should be +5V. Is there a manual change correcting this schematic error that I have missed? If A22:U6 positive supply is indeed ground, the circuit may still work but its reliability will be compromised by the relatively large currents flowing into A22:U6CD input substrate diodes. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
[time-nuts] HP5370A A22 arming assembly circuit diagram error
Fix for yet another typo, I really should check the text more carefully. The positive supply connection to A22:U6 (LM339 quad comparator) is shown as ground in the circuit diagram. This is surely incorrect as the inputs of U6B and U6C are connected to TTL(+5V VCC) signals. Surely this is not the designers intention The positive supply of A22:U6 should be +5V. Is there a manual change correcting this schematic error that I have missed? If A22:U6 positive supply is indeed ground, the circuit may still work but its reliability will be compromised by the relatively large currents flowing into A22:U6CD input substrate diodes. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] HP5370A A22 arming assembly circuit diagram error
Dr Bruce Griffiths wrote: Correction to previous post. (typed U7 instead of U6 VVC connected too ground OK for U7 as inputs are ECL levels. ) The positive supply connection to A22:U7 (LM339 quad comparator) is shown as ground in the circuit diagram. This is surely incorrect as the inputs of U6B and U6C are connected to TTL(+5V VCC) signals. Surely this is not the designers intention The positive supply of A22:U6 should be +5V. Is there a manual change correcting this schematic error that I have missed? If A22:U6 positive supply is indeed ground, the circuit may still work but its reliability will be compromised by the relatively large currents flowing into A22:U6CD input substrate diodes. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Scratch the comment on substrate diode curent. Although the comparator will not be damaged (max permissable input is 36V above the negative supply) the inputs will be way outside the input common mode range and it will no longer function as a differential comparator. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] HP5370A A22 arming assembly circuit diagram error
Dr Bruce Griffiths wrote: John Miles wrote: In the 5370B manual (2940A prefix), it looks like they are running U7 from +5 on pin 3 and -5.2 on pin 12. Probably a drafting error in the -A manual. -- john, KE5FX Dr Bruce Griffiths wrote: Correction to previous post. (typed U7 instead of U6 VVC connected too ground OK for U7 as inputs are ECL levels. ) The positive supply connection to A22:U7 (LM339 quad comparator) is shown as ground in the circuit diagram. This is surely incorrect as the inputs of U6B and U6C are connected to TTL(+5V VCC) signals. Surely this is not the designers intention The positive supply of A22:U6 should be +5V. Is there a manual change correcting this schematic error that I have missed? If A22:U6 positive supply is indeed ground, the circuit may still work but its reliability will be compromised by the relatively large currents flowing into A22:U6CD input substrate diodes. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts The 5370A A22 circuit diagram appears to be riddled with errors. U9 is shown as both as an MC10107 (triple exclusive OR/NOR gate) and as a Line receiver/comparator. The signals on A22 J1 coming from A16 are all 5V TTL (74LS175 outputs) with 500 ohm pullups to 5V. On A22 some of these inputs are shown connected in series with 82.5 ohm and pulled down to -5.2V with 1000 ohms. The junction of the 1000 ohm pulldowns and the 82.5 ohm resistors is then (in some cases) shown connected to ECL gate inputs or even emitter dotted to the output of an ECL gate (U1A). I've successfully used resistive divider networks to interface between 5V TTL and ECL, however the values shown in the schematic surely cannot be correct and will produce incorrect (and possibly damaging) output levels for the ECL gates. Bruce The level translation function would actually work well if only the 82.5 ohm resistors were actually 825 ohm resistors, maybe its just a simple error in erroneous placement of a decimal point?? Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Comparison of Logic Standards for Clock Distribution
Stephan Sandenbergh wrote: Hi Bruce, You mentioned that locking to a crystal at the receiving end as an option. Does this mean that signal transmission is primarily plagued by short term noise? I have never really touched the topic of optical fibre, but I realise that it is superior to conventional methods. The superiority of optic fibre is probably not as pronounced at short distances, is it? Kind regards, Stephan Sandenbergh ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Stephan Distribution of clock frequencies via optical fibre (at least at low optical power levels) is indeed limited by white phase noise in the receivers for short averaging times. For long averaging times the instability (white frequency noise etc.) of the clock source will manifest itself. Thus it can be advantageous to phase lock a low noise crystal oscillator to the received signal to cleanup the the received frequency. Optical frequency combs are sometimes used to distribute microwave frequencies via an optical fibre. In this case the photodetector (sensitive to the incident optical power) also acts as a mixer and its output will contain a frequency component at the difference frequency between adjacent comb signal frequency components. For short distances well screened coax is easier to use. Fibre offers a lower propagation delay tempco which may be important if the cable/fibre temperatures varies significantly. However the cost of the fibre transmitter, receiver and fibre may be relatively high compared to the cost of a piece of coax plus a driver and receiver for short distances. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] 5 MHz Frequency Doubler
Robert Atkinson wrote: Hi, Have a look at, http://www.wenzel.com/pdffiles/diodedbl.pdf Also http://www.wenzel.com/documents/hints.htm indicates that the NIST design uses JFET's but I can't find any more details. Robert G8RPI. -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Christopher Hoover Sent: 26 October 2006 07:14 To: time-nuts@febo.com Subject: [time-nuts] 5 MHz Frequency Doubler Hey 'nuts, I'm looking for a good design for a 5 MHz frequency doubler. The Wenzel Blue Tops HF doubler is said to be based on a low phase noise, public-domain NIST design: http://www.bluetops.com/Modules/lnhd.htm http://www.bluetops.com/Modules/lnhd.htm The LNHD is a fixed-frequency HF doubler based on a public-domain design developed by the National Institute of Standards and Technology (NIST http://www.boulder.nist.gov/timefreq/ ) for superlative phase noise performance. Can anyone point me at a this design? I haven't had any luck finding it on the web. I'm open to suggestions on other doubler designs, as well. -ch ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Any opinions expressed in this email are those of the individual and not necessarily Genetix Ltd (Genetix) or any company associated with it. This email and any files transmitted with it are confidential and solely for the use of the intended recipient. If you are not the intended recipient or the person responsible for delivering to the intended recipient, be advised that you have received this email in error and that any use is strictly prohibited. If you have received this email in error please notify Genetix by telephone on +44 (0)1425 624600. The unauthorised use, disclosure, copying or alteration of this message is strictly forbidden. This mail and any attachments have been scanned for viruses prior to leaving Genetix network. Genetix will not be liable for direct, special, indirect or consequential damages as a result of any virus being passed on, or arising from alteration of the contents of this message by a third party. ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts The design is probably a pair of low noise n channel JFETs configured as a push push doubler. Inputs driven in antiphase so that each FET conducts ffor opposite 1/2 cycles with the 2 FET drains connected in parallel. A bypassed trimpot connected between the FET sources being used to compensate for FET mismatch. The low frequency design probably uses a common source design whilst the VHF version employs a pair of common gate devices. An RF transformer connected between the the common drain and the positive is used to drive the load. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] 5 MHz Frequency Doubler
Christopher Hoover wrote: Hey 'nuts, I'm looking for a good design for a 5 MHz frequency doubler. The Wenzel Blue Tops HF doubler is said to be based on a low phase noise, public-domain NIST design: http://www.bluetops.com/Modules/lnhd.htm http://www.bluetops.com/Modules/lnhd.htm The LNHD is a fixed-frequency HF doubler based on a public-domain design developed by the National Institute of Standards and Technology (NIST http://www.boulder.nist.gov/timefreq/ ) for superlative phase noise performance. Can anyone point me at a this design? I haven't had any luck finding it on the web. I'm open to suggestions on other doubler designs, as well. -ch ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts The secret is to ensure that there is adequate local RF feedback (source series resistor) during each half cycle to ensure that the flicker phase noise is suppressed whilst allowing the gate drive to switch the current between the JFETS. J310 n channel JFETs or similar devices should be satisfactory. Matching the JFETs is useful but a trimpot can be used to compensate for residual JFET mismatch. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] 5 MHz Frequency Doubler (Dr Bruce Griffiths)
Christopher Hoover wrote: Dr Bruce Griffiths wrote: The design is probably a pair of low noise n channel JFETs configured as a push push doubler. Inputs driven in antiphase so that each FET conducts ffor opposite 1/2 cycles with the 2 FET drains connected in parallel. A bypassed trimpot connected between the FET sources being used to compensate for FET mismatch. The low frequency design probably uses a common source design whilst the VHF version employs a pair of common gate devices. An RF transformer connected between the the common drain and the positive is used to drive the load. OK, so I feed the input (of suitable gain) to a trifilar (or bifilar with tap) wound toroid to get the phase and antiphase. And the rest is just a pair of standard JFET RF amplifiers. I.e., I should use standard JFET RF amplifier biasing techniques, either employ a long tail or, alternatively, measure the pinch-offs and Idss's and pick my source resistors appropriately. If I'm getting all this right, the circuit looks something like the attached. Yes? Thanks for the input. -ch ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Have added (at least I hope I have) a bit on the push push JFET doubler with RF series feedback in the wiki. There is also an elementary circuit to illustrate the fundamental topology. Variants of the circuit complete with a means for balancing out FET mismatches will follow in a day or two. Bruce Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] 5 MHz Frequency Doubler (Dr Bruce Griffiths)
Christopher Hoover wrote: Dr Bruce Griffiths wrote: The design is probably a pair of low noise n channel JFETs configured as a push push doubler. Inputs driven in antiphase so that each FET conducts ffor opposite 1/2 cycles with the 2 FET drains connected in parallel. A bypassed trimpot connected between the FET sources being used to compensate for FET mismatch. The low frequency design probably uses a common source design whilst the VHF version employs a pair of common gate devices. An RF transformer connected between the the common drain and the positive is used to drive the load. OK, so I feed the input (of suitable gain) to a trifilar (or bifilar with tap) wound toroid to get the phase and antiphase. And the rest is just a pair of standard JFET RF amplifiers. I.e., I should use standard JFET RF amplifier biasing techniques, either employ a long tail or, alternatively, measure the pinch-offs and Idss's and pick my source resistors appropriately. If I'm getting all this right, the circuit looks something like the attached. Yes? Thanks for the input. -ch ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Biasing is a little more complex than that. The idea is that each FET is alternately driven into conduction or cutoff. When conducting the source resistor is selected to ensure that with the maximum amplitude signal applied to the gate the drain current doesnt exceed the FET Idss. This ensures that the FET gate is always reverse biased. The series RF feedback produced by the source resistor linearises the FET transfer function so that when it is driven by a high amplitude sinusoidal gate voltage a rectified 1/2 sine wave drain current pulse is produced. The series feedback also reduces the flicker phase noise. When the second FET drain is connected in parallel with the first it produces a 1/2 sinewave drain current pulse 180 degrees out of phase with that produced by the first FET so that the sum of the drain currents is a full wave rectified sine wave. To minimise the fundamental frequency component of the total drain current the amplitude of the 2 antiphase 1/2 wave rectified sine waves must be equal. The FET matching and bias trimming is used to maximise suppression of the fundamental component in the total drain current. Like all circuits relying on the switching action of an active device, the feedback and bias components must be optimised for the particular gate drive levels used. The gate drive voltage amplitude range for satisfactory operation will be around 5dBm. (~1.8:1). The gate drive amplitude will need to be around 8V pp for most silicon JFETS. Coupling the FET sources together either directly or via a low RF impedance capacitor reduces the extent of the transition region where both FETS are conducting whilst ensuring that the series feedback produced by the source resistor(s) is effective in controlling the total drain current noise throughout the cycle. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Allan Deviation - continuing saga...
Didier Juges wrote: Magnus Danielson wrote: Look at the AD8561 datasheet first. The 74HC4046 is much slower than the AD8561 and the higher output slewrate of the AD8561 is certainly good to keep jitter down. The 74HC4046 is worse for that aspect. What I would rather critize Didiers schematic for is the lack of decoupling caps. This is good for many reasons, but it includes keeping the rise and fall times up and thus the slewrate up and thus the jitter down. There are decoupling caps everywhere, I kept the schematic simple. Same, the counters actual wiring is not depicted, it is straight from the Texas Instrument data sheet. I also have a 200 ohm pot across the OCXO output to adjust the drive level into the 390 ohm resistor not shown. I would measure the actual phase-stability and phase-slope of the IF transformer solution with aspect to temperature. You may want to lower its Q value to flatten the phase-response. You loose in selectivity but gain in phase-stability. I have planned to do that. The transformer I am using is quite temperature stable, and the Q is controlled via the 390 ohm resistor, which may or may not be the optimal value from a Q standpoint. It is close to the best value from a drive level standpoint, to make sure I do not overdrive the comparator. I did not observe a measurable change in resonance frequency when blowing a hot air gun at it from a distance, even though my measurement method was crude (adjust the drive frequency using a SG503 and peak the voltage, use scope to monitor). I could use the 5370 to measure the phase shift while I blow hot air on the circuit (transformer and comparator), or I could make a small hot box with a light bulb and a variac, put the OCXO and clock shaper in it and use my HP3478B voltmeter and a thermistor to record temperature, and plot delay and temperature via the GPIB while I crank the temperature, then I could plot delay vs. temperature. The opportunities to experiment are endless... I will never have time for all that, I better retire now :-) Cheers, Magnus ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Comparators are fine with a good layout. If the input signal is low noise and has a sufficiently high slew at the switching threshold hysteresis is unnecessary. Older ultrahigh speed TTL comparators like the AD9696 and AMD686 have an output stage that is inherently unstable in the transition region. If the input to the output stage remained too long in this region the output stage oscillates. Even these work well with a good layout and a nice clean low noise high slew rate input signal. Hysteresis is mandatory when using these comparators with low slew rate inputs to maintain stability. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Allan Deviation - more data: GPS 1PPS against OCXO/128
kd7ts wrote: Didier Juges wrote: There are sudden increases in noise (bursts that last from seconds to minutes) on the plots I posted. I believe the sudden and drastic increase in noise at times comes from the GPS loosing lock. At the moment, I cannot hook up the computer to the GPS and verify, but I will do that later. I have a Brooks Shera GPSDO that exhibited similar symptoms. The phase showed huge jumps around 4:00 - 4:30 every morning. The PLL loop might, or might not recover, but usually didn't. I didn't have the time to spend troubleshooting, and we seldom ran tests overnight, so I just lived with it for more than 5 years. I retired recently and finally had the time to devote to finding the problem. It was so easy, it is almost embarassing. I picked up another GPSDO system based on a Jupiter GPS engine and an Isotemp ovenized 10 MHz oscillator with EFC. It was the antenna I purchased to go with this, that turned out to be the useful missing piece of the puzzle. I swapped antennas between the two units to compare the SS numbers reported by the Motorola UT+. They appeared to be about the same, so I swapped them back. This continued for another week or so, and I exhausted all remaining possibilities. I swapped the two patch antennas again, but this time I let it run for a week. I never observed the problem during this time, so I replaced the patch antenna (cheap) with a Symmetricomm antenna that is commonly used on Cell sites. The system has been 100% for about 3 weeks now. I beleve the Symmetricomm antenna has much better filtering, and because it has an N connector, I was able to use a longer cable, with lower loss and better mounting location. Watching the SS numbers reported by the UT+ did not provide any insight. They were generally between 43 and 47 and tracking 8 with the patch antenna. I have been watching the numbers for about 2 weeks with the Symmetricomm antenna connected, and they show between 47 and 52 and tracking 8. I can only speculate on the exact mechanism, but it appears that the system is functioning properly. It is the station reference for 10 and 24 GHz transverters and a DSP-10 IF rig. We have 5 of these GPSDO units in the area, and all I ever heard was, well mine runs just fine ! Mike KD7TS ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Good timing antennas have built in ceramic or equivalent bandpass filters to minimise the effect of interference. A patch antenna is not as satisfactory as a quadrifilar helix or a choke ring ground plane antenna for accurate timing purposes. If GPSDO did some statistical filtering instead of just blindly accepting all PPS signals as valid and usable such dropouts would cease to be much of a problem. There's no substitute for a a correctly engineered design with an appropriate tracking loop bandwidth and statistical filtering of outliers. A good crystal will drift very little over half an hour or so when the GPS derived PPS signal may be unreliable. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] looking for HP 3738A external pin connections or schematic
Eric Haskell wrote: I purchased this item to ebay to play with the YIG. Can anyone help with proper voltages to apply to this unit and which pins they go to? Eric Haskell KC4YOE ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Eric What item, no link to anything in post?? Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] GPS vagaries and binary interface
Didier Juges wrote: Dr Bruce Griffiths wrote: Good timing antennas have built in ceramic or equivalent bandpass filters to minimise the effect of interference. A patch antenna is not as satisfactory as a quadrifilar helix or a choke ring ground plane antenna for accurate timing purposes. If GPSDO did some statistical filtering instead of just blindly accepting all PPS signals as valid and usable such dropouts would cease to be much of a problem. There's no substitute for a a correctly engineered design with an appropriate tracking loop bandwidth and statistical filtering of outliers. A good crystal will drift very little over half an hour or so when the GPS derived PPS signal may be unreliable. Bruce ___ That's the impression I am getting. I do not know if any of the GPSDO that I have seen described in recent literature take care of this properly. It seems when the GPS goes nuts, the 1 PPS goes quite a bit out of normal range, so it should not take too much processing power to determine if it's in range or not. Of course, an analog solution would require many more parts to do that determination, filtering and switching, so it seems the most *practical* way to implement a GPSDO is with a uC of some sort. The uC could even monitor what's coming out of the GPS receiver's serial port and open the loop if there are not enough satellites in range. Now, about the Jupiter receiver, it seems the only way to set a mask angle is through the binary interface that is not well documented at all in the Navman documentation. They do not even say if the mask is saved to flash or EEPROM, or if it has to be reloaded each time the GPS is powered up. That would also require a uC. I would be really grateful if someone had done that research and could help me. In the mean time, I may just put the spectrum analyzer at the output of the patch antenna (with proper biasing of the LNA of course) and see if I am getting junk other than the GPS signal. I know the GPS signal will be too low for the spectrum analyzer, but if I see anything else between 1 and 2 GHz, I know that would be a problem. I live about 5 miles from the largest US air base (Eglin AFB) and I am sure they have L-band radars running there, and probably a bunch of other ether pollutants. Assuming the radar signal is not swamping the LNA, a good filter could not hurt. Didier KO4BB ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Didier An analog loop is somewhat impractical. With a good OCXO the optimum loop attack time will be somewhere around 1000 sec or so. To keep the noise down the resistor values should be relatively low thuss you would need to use very large low leakage capacitors in the loop active filter. Suitable capacitors are virtually unobtainable. For such time constants a digital implementation is essential. With an EFC adjustment range of 1E-7 of the OCXO frequency the DAC needs to be monotonic to better than 16 bits to ensure that OCXO is the limiting factor. Since high resolution Audio DACs have adequate resolution and are relatively inexpensive, they should be ideal. The phase measurement resolution should be at least 3 to 10X better than the PPS jitter to ensure that the GPS receiver is the limiting factor in measuring the phase error. The simplest method is to synchronise the input PPS signal to a high speed clock synchronous with the OCXO frequency and then sample the state of a counter clocked at this same frequency with the leading edge of the synchronised PPS signal. All you need do is choose a suitable processor that can easily interface to the DAC and the counter. Some PIC chips have built in counters that can be sampled by the leading edge of an input signal. With some care in the design one of these may be usable although interfacing to a serial input audio DAC is not that straightforward. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] GPS vagaries and binary interface
Didier Juges wrote: Dr Bruce Griffiths wrote: Good timing antennas have built in ceramic or equivalent bandpass filters to minimise the effect of interference. A patch antenna is not as satisfactory as a quadrifilar helix or a choke ring ground plane antenna for accurate timing purposes. If GPSDO did some statistical filtering instead of just blindly accepting all PPS signals as valid and usable such dropouts would cease to be much of a problem. There's no substitute for a a correctly engineered design with an appropriate tracking loop bandwidth and statistical filtering of outliers. A good crystal will drift very little over half an hour or so when the GPS derived PPS signal may be unreliable. Bruce ___ That's the impression I am getting. I do not know if any of the GPSDO that I have seen described in recent literature take care of this properly. It seems when the GPS goes nuts, the 1 PPS goes quite a bit out of normal range, so it should not take too much processing power to determine if it's in range or not. Of course, an analog solution would require many more parts to do that determination, filtering and switching, so it seems the most *practical* way to implement a GPSDO is with a uC of some sort. The uC could even monitor what's coming out of the GPS receiver's serial port and open the loop if there are not enough satellites in range. Now, about the Jupiter receiver, it seems the only way to set a mask angle is through the binary interface that is not well documented at all in the Navman documentation. They do not even say if the mask is saved to flash or EEPROM, or if it has to be reloaded each time the GPS is powered up. That would also require a uC. I would be really grateful if someone had done that research and could help me. In the mean time, I may just put the spectrum analyzer at the output of the patch antenna (with proper biasing of the LNA of course) and see if I am getting junk other than the GPS signal. I know the GPS signal will be too low for the spectrum analyzer, but if I see anything else between 1 and 2 GHz, I know that would be a problem. I live about 5 miles from the largest US air base (Eglin AFB) and I am sure they have L-band radars running there, and probably a bunch of other ether pollutants. Assuming the radar signal is not swamping the LNA, a good filter could not hurt. Didier KO4BB ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Didier Alternative GPSDO solution Divide the 10MHz reference by 32 resync the output to 10MHz with a fast D flipflop and then divide the D flipflop output by 4 using a 2 bit switchtail ring (Johnson) counter. Low pass filter the outputs of both divide by 4 counter flipflops with identical filters. Use ACMOS flipflops in the ring counter so the sine wave output amplitude is reasonably stable. This should produce 2 nominally quadrature sinewave outputs at (10/128) MHz. Use 2 12 bit ADCs (eg AD7942) to sample the 2 quadrature sinewaves on the leading edge of the GPS receiver PPS signal. The ADC readings can be processed to derive the phase angle at the PPS edge. A resolution of 10ns or better is readily achieved. This is more than adequate for most current GPS receivers. If you are worried about the stability of the low pass filter phase shifts just use another pair of ADCs to sample the 2 sinewaves at 10/128 MHz.or a submultiple thereof. The difference between the 2 phase angles will be independent of the filter phase shifts. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] GPS vagaries and binary interface
Didier Juges wrote: That's the impression I am getting. I do not know if any of the GPSDO that I have seen described in recent literature take care of this properly. It seems when the GPS goes nuts, the 1 PPS goes quite a bit out of normal range, so it should not take too much processing power to determine if it's in range or not. Of course, an analog solution would require many more parts to do that determination, filtering and switching, so it seems the most *practical* way to implement a GPSDO is with a uC of some sort. The uC could even monitor what's coming out of the GPS receiver's serial port and open the loop if there are not enough satellites in range. Didier KO4BB ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts On further reflection a slower 2 channel simultaneous sampling ADC (eg AD7862 200ps aperture delay mismatch, 100ps sampling jitter ) with matched ADC gains and aperture delays is a better fit when sampling the nominally quadrature phased sinewaves. To assist in filtering out spurious data a coarse (1us resolution??) phase derived by sampling a digital counter can be used to detect when the GPS PPS pulse timing deteriorates. When using a timing GPS receiver with TRAIM enabled this elaboration is not necessary. It only remains to measure the quadrature phase error and amplitude mismatch errors of the nominally quadrature phased sinewaves. This can be done by taking a burst of calibration samples triggered by the PPS input (after synchronising it to the reference clock). Equivalent time sampling techniques can be used to take samples with an effective spacing of one reference oscillator period (100ns) throughout the sinewave cycle. A total of 64/128 samples is a sufficient number to allow the dc offset, the amplitude and phase offset of the fundamental, as well as the and amplitudes and phases of the at least the first 16/32 harmonics for each of the 2 nominally quadrature phased waveforms to be determined. Since the processor only need process a few (~100??) samples each second almost anything that can read and process the ADC samples fast enough (1 sample burst /sec) should suffice. Residual ADC distortion, gain mismatch and aperture delay mismatch can be combined with the equivalent sinewave errors, the actual source of these errors doesn't really matter too much as long as their effect on the phase measurements can be corrected. The required logic can easily be implemented using a small programmable gate array or equivalent device. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] GPS vagaries and binary interface
Didier Juges wrote: Dr Bruce Griffiths wrote: Didier Alternative GPSDO solution Divide the 10MHz reference by 32 resync the output to 10MHz with a fast D flipflop and then divide the D flipflop output by 4 using a 2 bit switchtail ring (Johnson) counter. Low pass filter the outputs of both divide by 4 counter flipflops with identical filters. OK, I follow even if I am not sure where this is leading... Anything magic about 32, other than it's probably the smallest division that may not immediately result in rollover when the OCXO is cold? Based on yesterday's experiment, my OCXO rolled over once while warming up with a division ratio of 128. A few more chips are not a real problem. I like the 74F161, they are fast and synchronous. If I could find 74F162's, that would be the best, or I can program the 161s as decade counters, but it's more work. Use ACMOS flipflops in the ring counter so the sine wave output amplitude is reasonably stable. Of course, TTL outputs are anything but stable. This should produce 2 nominally quadrature sinewave outputs at (10/128) MHz. Use 2 12 bit ADCs (eg AD7942) to sample the 2 quadrature sinewaves on the leading edge of the GPS receiver PPS signal. The ADC readings can be processed to derive the phase angle at the PPS edge. A resolution of 10ns or better is readily achieved. This is more than adequate for most current GPS receivers. If you are worried about the stability of the low pass filter phase shifts just use another pair of ADCs to sample the 2 sinewaves at 10/128 MHz.or a submultiple thereof. The difference between the 2 phase angles will be independent of the filter phase shifts. That would be a software interpolator? I like that approach because it reduces the hardware to a relative minimum, compared to the Brooke Shera approach, and puts the complexity in software. Regarding your next message recommending to use a dual channel ADC, I agree, even though it may be simpler to use SH devices with the built-in multiplexed ADC of the microprocessor. I have a few monolithic Burr Brown devices that have a small aperture gate, I forgot how much. This sounds very interesting, but it won't be an evening project :-) I don't do PICs (no development tools, no code bank). I do not have the tools to do PLDs either. My favorite uCs are 8051s, particularly the Silabs parts. I also have access to a good C compiler and I have written a lot of 8051 code. I do not know how these parts fare as timing chips. They are plenty fast though, some run at a 100 MHz clock, with many instructions taking one clock. Bruce ___ Thanks again for many thought provoking ideas. Didier ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Didier Nothing too critical about divide by 32. A quadrature phased sinewave pair frequency of about 100 KHz is about the lowest with which its possible to achieve a resolution of better than about 10ns with a relatively inexpensive 12 bit ADC. The period of the reference sinewave has to be large enough to accomodate the GPS receiver PPS jitter and the OCXO wander whilst locked over the loop time constant (~ 1000 sec). Doing PLDs is easy just choose one that can be programmed over a JTAG interface. Bit banging on a PC parallel port can then be used to program the PLD in circuit. A simple interface (1 chip) between the parallel port and the JTAG port is required. That only leaves the software to find. Of course if you forgo correcting for harmonics and dc offset then the logic complexity is reasonably small. Easily implemented using readily available CMOS chips. It doesn't really matter what processor you use as long as its fast enough to do the job with some margin to spare for enhancements. Even the 8051 chips of 25 years ago are probably fast enough. The reason I didn't suggest sample and holds to do the simultaneous sampling is that its difficult to get high performance standalone sample and holds these days. Its just more cost effective to use a pair of ADCs. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] GPS vagaries and binary interface
Didier Juges wrote: Dr Bruce Griffiths wrote: Didier Juges wrote: That's the impression I am getting. I do not know if any of the GPSDO that I have seen described in recent literature take care of this properly. It seems when the GPS goes nuts, the 1 PPS goes quite a bit out of normal range, so it should not take too much processing power to determine if it's in range or not. Of course, an analog solution would require many more parts to do that determination, filtering and switching, so it seems the most *practical* way to implement a GPSDO is with a uC of some sort. The uC could even monitor what's coming out of the GPS receiver's serial port and open the loop if there are not enough satellites in range. Didier KO4BB ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts On further reflection a slower 2 channel simultaneous sampling ADC (eg AD7862 200ps aperture delay mismatch, 100ps sampling jitter ) with matched ADC gains and aperture delays is a better fit when sampling the nominally quadrature phased sinewaves. To assist in filtering out spurious data a coarse (1us resolution??) phase derived by sampling a digital counter can be used to detect when the GPS PPS pulse timing deteriorates. When using a timing GPS receiver with TRAIM enabled this elaboration is not necessary. It only remains to measure the quadrature phase error and amplitude mismatch errors of the nominally quadrature phased sinewaves. This can be done by taking a burst of calibration samples triggered by the PPS input (after synchronising it to the reference clock). Equivalent time sampling techniques can be used to take samples with an effective spacing of one reference oscillator period (100ns) throughout the sinewave cycle. A total of 64/128 samples is a sufficient number to allow the dc offset, the amplitude and phase offset of the fundamental, as well as the and amplitudes and phases of the at least the first 16/32 harmonics for each of the 2 nominally quadrature phased waveforms to be determined. Since the processor only need process a few (~100??) samples each second almost anything that can read and process the ADC samples fast enough (1 sample burst /sec) should suffice. Residual ADC distortion, gain mismatch and aperture delay mismatch can be combined with the equivalent sinewave errors, the actual source of these errors doesn't really matter too much as long as their effect on the phase measurements can be corrected. The required logic can easily be implemented using a small programmable gate array or equivalent device. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Bruce, If we AC couple the sinewaves to the ADCs with a common reference at mid-point to the Vref, we should not have to worry too much about the mismatched amplitudes unless they are really far apart, since we are only trying to get the zero crossing. If we have enough samples near that point, the amplitude errors should be negligible. On the other hand, wouldn't time sampling introduce additional errors? As I pointed out in the previous messages, I do not have the tools or the experience with programmable logic. It seems to me that interpolation is probably more easily done in software anyhow (unless you use a fairly large PLD) because of the resources they use, but I may be mistaken. However I need to check if the uC/ADC can run fast enough to make this work. More food for thought, and more research... Didier ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Didier No we are not looking to sample at the sinewave zero crossing. We are trying to measure the sine wave phase at the sampling instant or equivalently the time from the previous zero crossing to the sampling instant. If we sample the 2 quadrature sinewaves then have two samples Asin(theta), Acos(theta) where theta is the phase angle. The particular quadrant can be determined from the signs of the sine and cosine terms. Then the phase angle is given by the arc tangent of the ratio of the sine and cosine samples. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Halloween
Rob Kimberley wrote: Back to good ol' UTC here in the UK this morning!! -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Bill Hawkins Sent: 29 October 2006 05:42 To: Discussion of precise time and frequency measurement Subject: [time-nuts] Halloween Stumbled on the Rocky Horror Show, which seems to have become timeless. The song Let's do the time warp again seems appropriate for the USA time-change Sunday. It's just a jump to the left, put your hands on your hips, do the pelvic thrust, let's do the time warp again. Something about anticipation, come on up to the lab, let's see what's on the slab ... and so on. Pardon me if it only has a little bit to do with precision time, but it's that time of year. Regards, Bill Hawkins -- No virus found in this outgoing message. Checked by AVG Anti-Virus. Version: 7.1.408 / Virus Database: 268.13.17/505 - Release Date: 10/27/2006 ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts There is a bronze statue (of riffraff?) commemorating this play/film in town (Hamilton NZ) Richard OBrien the author/playwright was born here. Bruce. ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] GPS vagaries and binary interface
Didier Juges wrote: Dr Bruce Griffiths wrote: Didier Alternative GPSDO solution Divide the 10MHz reference by 32 resync the output to 10MHz with a fast D flipflop and then divide the D flipflop output by 4 using a 2 bit switchtail ring (Johnson) counter. Low pass filter the outputs of both divide by 4 counter flipflops with identical filters. OK, I follow even if I am not sure where this is leading... Anything magic about 32, other than it's probably the smallest division that may not immediately result in rollover when the OCXO is cold? Based on yesterday's experiment, my OCXO rolled over once while warming up with a division ratio of 128. A few more chips are not a real problem. I like the 74F161, they are fast and synchronous. If I could find 74F162's, that would be the best, or I can program the 161s as decade counters, but it's more work. Use ACMOS flipflops in the ring counter so the sine wave output amplitude is reasonably stable. Of course, TTL outputs are anything but stable. This should produce 2 nominally quadrature sinewave outputs at (10/128) MHz. Use 2 12 bit ADCs (eg AD7942) to sample the 2 quadrature sinewaves on the leading edge of the GPS receiver PPS signal. The ADC readings can be processed to derive the phase angle at the PPS edge. A resolution of 10ns or better is readily achieved. This is more than adequate for most current GPS receivers. If you are worried about the stability of the low pass filter phase shifts just use another pair of ADCs to sample the 2 sinewaves at 10/128 MHz.or a submultiple thereof. The difference between the 2 phase angles will be independent of the filter phase shifts. That would be a software interpolator? I like that approach because it reduces the hardware to a relative minimum, compared to the Brooke Shera approach, and puts the complexity in software. Regarding your next message recommending to use a dual channel ADC, I agree, even though it may be simpler to use SH devices with the built-in multiplexed ADC of the microprocessor. I have a few monolithic Burr Brown devices that have a small aperture gate, I forgot how much. This sounds very interesting, but it won't be an evening project :-) I don't do PICs (no development tools, no code bank). I do not have the tools to do PLDs either. My favorite uCs are 8051s, particularly the Silabs parts. I also have access to a good C compiler and I have written a lot of 8051 code. I do not know how these parts fare as timing chips. They are plenty fast though, some run at a 100 MHz clock, with many instructions taking one clock. Bruce ___ Thanks again for many thought provoking ideas. Didier ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts If they have built in hardware to sample the count of a counter on the edge of an external pulse then they may be very useful. Another technique to reduce the amount of filtering required somewhat is to feed a square wave of 50% duty cycle into a shift register say 12 bits long clocked synchronously at 8x the input square wave frequency. The outputs of the first 8 stages can be added using a set of suitable resistors so that a 16 step approximation to a sine wave is formed at the resistor summing node. The quadrature phase sine wave can be formed by resistively summing the outputs of the last 8 stages of the 12 bit shift register. If the resistor values are correctly proportioned the 3rd, 5th etc harmonics can be nulled and less filtering of the sine and cosine waves is required. The approximation to sine and cosine waves improves as the shift register length is increased and the shift register is clocked with a higher frequency synchronous clock. However using 2 sets of 8 resistors with a 12 bit shift register is probably a reasonable compromise between the complexity of the resistor arrays and the complexity of the analog low pass filters. An even better approximation is possible if a pair of DAC and a sine lookup tables is employed. However the added cost and complexity is probably difficult to justify. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Allan Deviation - more data: GPS1PPS against OCXO/128
Ulrich Bangert wrote: Bruce, If GPSDO did some statistical filtering instead of just blindly accepting all PPS signals as valid and usable such dropouts would cease to be much of a problem. There's no substitute for a a correctly engineered design with an appropriate tracking loop bandwidth and statistical filtering of outliers. A good crystal will drift very little over half an hour or so when the GPS derived PPS signal may be unreliable. I have read lots of intelligent stuff from you in the last weeks that makes you a brother in mind, but let me explicitely say THANKS for this one. I have been using robust statistical methods in my own GPSDO design since years now. Every new second I compute the median over some hundred seconds of past phase data and after that i compute the MAD (median absolute deviation) over the same period. The MAD is is a measure for the width of the statistical distribution as is the standard deviation. Unlike the standard deviation, is it completely insensible to outliers itself. 99% of normal data are within +/-5 MAD around the median so once you have performed the math it is really easy to detect outliers. Since the algorithm needs a certain amount of RAM and sheer processing power this is not easily done with single-chip-processors. Thank you for pointing at the fact that sometimes a certain complexity of hardware and software is necessary to get a job done and that the quality of a GPSDO cannot be measured in term of lowcheap parts count as seems to be a quite common opinion. Best regards Ulrich Bangert -Ursprüngliche Nachricht- Von: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] Im Auftrag von Dr Bruce Griffiths Gesendet: Samstag, 28. Oktober 2006 23:46 An: [EMAIL PROTECTED]; Discussion of precise time and frequency measurement Betreff: Re: [time-nuts] Allan Deviation - more data: GPS1PPS against OCXO/128 kd7ts wrote: Didier Juges wrote: There are sudden increases in noise (bursts that last from seconds to minutes) on the plots I posted. I believe the sudden and drastic increase in noise at times comes from the GPS loosing lock. At the moment, I cannot hook up the computer to the GPS and verify, but I will do that later. I have a Brooks Shera GPSDO that exhibited similar symptoms. The phase showed huge jumps around 4:00 - 4:30 every morning. The PLL loop might, or might not recover, but usually didn't. I didn't have the time to spend troubleshooting, and we seldom ran tests overnight, so I just lived with it for more than 5 years. I retired recently and finally had the time to devote to finding the problem. It was so easy, it is almost embarassing. I picked up another GPSDO system based on a Jupiter GPS engine and an Isotemp ovenized 10 MHz oscillator with EFC. It was the antenna I purchased to go with this, that turned out to be the useful missing piece of the puzzle. I swapped antennas between the two units to compare the SS numbers reported by the Motorola UT+. They appeared to be about the same, so I swapped them back. This continued for another week or so, and I exhausted all remaining possibilities. I swapped the two patch antennas again, but this time I let it run for a week. I never observed the problem during this time, so I replaced the patch antenna (cheap) with a Symmetricomm antenna that is commonly used on Cell sites. The system has been 100% for about 3 weeks now. I beleve the Symmetricomm antenna has much better filtering, and because it has an N connector, I was able to use a longer cable, with lower loss and better mounting location. Watching the SS numbers reported by the UT+ did not provide any insight. They were generally between 43 and 47 and tracking 8 with the patch antenna. I have been watching the numbers for about 2 weeks with the Symmetricomm antenna connected, and they show between 47 and 52 and tracking 8. I can only speculate on the exact mechanism, but it appears that the system is functioning properly. It is the station reference for 10 and 24 GHz transverters and a DSP-10 IF rig. We have 5 of these GPSDO units in the area, and all I ever heard was, well mine runs just fine ! Mike KD7TS ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Good timing antennas have built in ceramic or equivalent bandpass filters to minimise the effect of interference. A patch antenna is not as satisfactory as a quadrifilar helix or a choke ring ground plane antenna for accurate timing purposes. If GPSDO did some statistical filtering instead of just blindly accepting all PPS signals as valid and usable such dropouts would cease to be much of a problem. There's no substitute for a a correctly
Re: [time-nuts] Allan Deviation - moredata: GPS1PPS against OCXO/128
Ulrich Bangert wrote: Hi Bruce, I read your paper in the AMSAT Journal and believe that an English translation of this would be very informative to those who cant read German. Please allow me to ask: Did you get it from my homepage or did you have a printed version of it?? Best regards Ulrich Bangert -Ursprüngliche Nachricht- Von: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] Im Auftrag von Dr Bruce Griffiths Gesendet: Sonntag, 29. Oktober 2006 14:37 An: Discussion of precise time and frequency measurement Betreff: Re: [time-nuts] Allan Deviation - moredata: GPS1PPS against OCXO/128 Ulrich Bangert wrote: Bruce, If GPSDO did some statistical filtering instead of just blindly accepting all PPS signals as valid and usable such dropouts would cease to be much of a problem. There's no substitute for a a correctly engineered design with an appropriate tracking loop bandwidth and statistical filtering of outliers. A good crystal will drift very little over half an hour or so when the GPS derived PPS signal may be unreliable. I have read lots of intelligent stuff from you in the last weeks that makes you a brother in mind, but let me explicitely say THANKS for this one. I have been using robust statistical methods in my own GPSDO design since years now. Every new second I compute the median over some hundred seconds of past phase data and after that i compute the MAD (median absolute deviation) over the same period. The MAD is is a measure for the width of the statistical distribution as is the standard deviation. Unlike the standard deviation, is it completely insensible to outliers itself. 99% of normal data are within +/-5 MAD around the median so once you have performed the math it is really easy to detect outliers. Since the algorithm needs a certain amount of RAM and sheer processing power this is not easily done with single-chip-processors. Thank you for pointing at the fact that sometimes a certain complexity of hardware and software is necessary to get a job done and that the quality of a GPSDO cannot be measured in term of lowcheap parts count as seems to be a quite common opinion. Best regards Ulrich Bangert -Ursprüngliche Nachricht- Von: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] Im Auftrag von Dr Bruce Griffiths Gesendet: Samstag, 28. Oktober 2006 23:46 An: [EMAIL PROTECTED]; Discussion of precise time and frequency measurement Betreff: Re: [time-nuts] Allan Deviation - more data: GPS1PPS against OCXO/128 kd7ts wrote: Didier Juges wrote: There are sudden increases in noise (bursts that last from seconds to minutes) on the plots I posted. I believe the sudden and drastic increase in noise at times comes from the GPS loosing lock. At the moment, I cannot hook up the computer to the GPS and verify, but I will do that later. I have a Brooks Shera GPSDO that exhibited similar symptoms. The phase showed huge jumps around 4:00 - 4:30 every morning. The PLL loop might, or might not recover, but usually didn't. I didn't have the time to spend troubleshooting, and we seldom ran tests overnight, so I just lived with it for more than 5 years. I retired recently and finally had the time to devote to finding the problem. It was so easy, it is almost embarassing. I picked up another GPSDO system based on a Jupiter GPS engine and an Isotemp ovenized 10 MHz oscillator with EFC. It was the antenna I purchased to go with this, that turned out to be the useful missing piece of the puzzle. I swapped antennas between the two units to compare the SS numbers reported by the Motorola UT+. They appeared to be about the same, so I swapped them back. This continued for another week or so, and I exhausted all remaining possibilities. I swapped the two patch antennas again, but this time I let it run for a week. I never observed the problem during this time, so I replaced the patch antenna (cheap) with a Symmetricomm antenna that is commonly used on Cell sites. The system has been 100% for about 3 weeks now. I beleve the Symmetricomm antenna has much better filtering, and because it has an N connector, I was able to use a longer cable, with lower loss and better mounting location. Watching the SS numbers reported by the UT+ did not provide any insight. They were generally between 43 and 47 and tracking 8 with the patch antenna. I have been watching the numbers for about 2
Re: [time-nuts] Allan Deviation - continuing saga...
John Miles wrote: Definitely an interesting chart. I don't know how much stock I'd put in it, though. The figures cited are, in some cases, much worse than those published elsewhere and observed personally. I didn't look at all of the test circuits, but there are more things wrong with the LT1016 test circuit on page 19 than in the entire QEX article that caught so much flak recently. :-) -- john, KE5FX -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] Behalf Of Richard H McCorkle Sent: Sunday, October 29, 2006 10:33 PM To: Discussion of precise time and frequency measurement Subject: Re: [time-nuts] Allan Deviation - continuing saga... I had been using the Shera HC4046 input circuit for my 10811 GPSDO input until I read the test results in the LPRO manual http://www.symmetricom.com/media/pdf/manuals/man-lpro.pdf (Table 3-1 on Pg 18) showing the results of testing various TTL converters for relative phase noise. The conversion techniques document at http://www.wenzel.com/documents/waveform.html has a circuit for using a tuned LC network to increase the sine output from an oscillator to drive a biased gate input. I did some testing of my own and found that using a biased AC04 gate using the Wenzel circuit with no input resistor, C = 100pf, L = 2.7uh, input directly from the 10 MHz 10811 gave the lowest phase noise combination for my GPSDO input. You may want to give this a try. Enjoy! Richard ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts The MC10ELT21D circuit depicted in figure 3.4 on P19 will not work if wired as shown. The 47.5 ohm resistor to ground disturbs the dc biasing at the input. Attempting to sink about 45mA from the Vbb reference pin is probably not a good idea. If the 47.5 ohm resistor is replaced by a 200 ohm resistor from ground to the other side of the 0.1uF input coupling capacitor, then the dc biasing will be correct and the circuit RF input impedance will also be approximately 50 ohms. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
[time-nuts] Fibre optic distribution of local oscillator frequencis
The article below describes how the local oscillator frequency is distributed to the antennas of the Atacama millimeter array. The techniques used to stabilise the local oscillator frequency and phase at each antenna may be of some interest to anyone considering fibre optic distribution of standard frequencies. http://www.ieeecss.org/PAB/csm/columns/February2006/PrecisionTiming.pdf Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Earth: An Oscillator and Frequency Standard
Brooke Clarke wrote: Hi Tom: Thanks for the lab test report on the earth frequency standard. Since there are a number of frequency/time standards that have much better performance I'd like to find a way to directly measure the performance of the earth standard. I've thought about a telescope looking at stars or maybe a photo detector to look at the light from the closest star to the earth frequency standard. Do you have any ideas on how to make these measurements? Have Fun, Brooke Clarke w/Java http://www.PRC68.com w/o Java http://www.pacificsites.com/~brooke/PRC68COM.shtml http://www.precisionclock.com Tom Van Baak wrote: Anyway, how do you compute the Allan Deviation of a sun dial? Oh, God, now someone's going to do it... John Well, yes, thanks for asking! I did it a year ago. The lab report on earth, including Allan deviation is at: http://www.leapsecond.com/museum/earth/ /tvb ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts The conventional solution is either a meridian transit instrument or a zenith tube, either of which is much easier and cheaper to construct than an accurately rotating platform. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] HP 10811A/B OCXO OP/SRV manual is onlineathparchive.com AND HP 5501B manual.
Jack Hudler wrote: Sheeesh! Actually I use the 5501B for its intended purpose... I'm a bit of a precision nut. Never seen an Allan variance plot of one. I prefer 473.6057788309637 THz :) -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Robert Atkinson Sent: Tuesday, November 07, 2006 2:55 AM To: Discussion of precise time and frequency measurement Subject: Re: [time-nuts] HP 10811A/B OCXO OP/SRV manual is onlineathparchive.com AND HP 5501B manual. Hi Jack, Great scan! I was also most interested to see you had scanned the manual for another HP reference that I have - the 5501B. With an accuracy of 1x10-7 and stability of 2x10-8 it's not that great but the frequency is 473612.23 GHz! For those who have not caught on yet, the 5501B is a stabilised laser with about 1mW of 632.991372nm (red) output. Many thanks, Robert G8RPI. From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Jack Hudler Sent: 06 November 2006 19:31 To: 'Discussion of precise time and frequency measurement' Subject: [time-nuts] HP 10811A/B OCXO OP/SRV manual is online athparchive.com I just finished and posted the 10811A/B OP/SRV to hparchives.com. http://www.hparchive.com/Manuals/HP-10811AB-Manual.pdf Enjoy, Jack Any opinions expressed in this email are those of the individual and not necessarily Genetix Ltd (Genetix) or any company associated with it. This email and any files transmitted with it are confidential and solely for the use of the intended recipient. If you are not the intended recipient or the person responsible for delivering to the intended recipient, be advised that you have received this email in error and that any use is strictly prohibited. If you have received this email in error please notify Genetix by telephone on +44 (0)1425 624600. The unauthorised use, disclosure, copying or alteration of this message is strictly forbidden. This mail and any attachments have been scanned for viruses prior to leaving Genetix network. Genetix will not be liable for direct, special, indirect or consequential damages as a result of any virus being passed on, or arising from alteration of the contents of this message by a third party. ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts To measure the Allan variance you need at least 2 (preferably more) stabilised lasers and a mixer (photodiode) plus a suitable amplifier to produce a beat signal for analysis. The beat frequency may be as high as 100 MHz with a pair of 5501s (frequency/wavelength accuracy of 0.1ppm) so the photodiode and associated amplifier will need adequate bandwidth. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
[time-nuts] [Fwd: Re: HP 10811A/B OCXO OP/SRV manual is onlineathparchive.com AND HP 5501B manual.]
---BeginMessage--- Magnus Danielson wrote: From: Dr Bruce Griffiths [EMAIL PROTECTED] Subject: Re: [time-nuts] HP 10811A/B OCXO OP/SRV manual is onlineathparchive.com AND HP 5501B manual. Date: Wed, 08 Nov 2006 11:25:44 +1300 Message-ID: [EMAIL PROTECTED] To measure the Allan variance you need at least 2 (preferably more) stabilised lasers and a mixer (photodiode) plus a suitable amplifier to produce a beat signal for analysis. The beat frequency may be as high as 100 MHz with a pair of 5501s (frequency/wavelength accuracy of 0.1ppm) so the photodiode and associated amplifier will need adequate bandwidth. It seems like three 5501s, optical splitters/joiners and a fairly normal counters should allow for a three-cornered hat and then should the Allan variance and friends be possible to measure. Cheers, Magnus Since the 5501 and similar laser heads use Zeeman splitting to produce 2 superimposed orthogonal linear polarised beams with slightly different frequencies, polarising optics (beamsplitters, etc) will be needed to separate the 2 orthogonally polarised beams. The frequencies of the two orthorgonally polarised beams are symmetrically disposed about the laser doppler gain profile peak. However the difference between the 2 frequencies (a few MHz) isn't precisely controlled and it varies from laser head to laser head. The laser frequency is stabilised by adjusting the cavity length so that the 2 orthogonally polarised beams have equal power. Bruce ---End Message--- ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] HP 10811A/B OCXO OP/SRV manual is onlineathparchive.com AND HP 5501B manual.
Jack Hudler wrote: Hmm. I think I have all the parts for this. Except the programmable polarizer. -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Magnus Danielson Sent: Tuesday, November 07, 2006 7:11 PM To: [EMAIL PROTECTED] Cc: time-nuts@febo.com Subject: Re: [time-nuts] HP 10811A/B OCXO OP/SRV manual is onlineathparchive.com AND HP 5501B manual. From: Dr Bruce Griffiths [EMAIL PROTECTED] Subject: Re: [time-nuts] HP 10811A/B OCXO OP/SRV manual is onlineathparchive.com AND HP 5501B manual. Date: Wed, 08 Nov 2006 13:56:38 +1300 Message-ID: [EMAIL PROTECTED] Magnus Danielson wrote: From: Dr Bruce Griffiths [EMAIL PROTECTED] Subject: Re: [time-nuts] HP 10811A/B OCXO OP/SRV manual is onlineathparchive.com AND HP 5501B manual. Date: Wed, 08 Nov 2006 11:25:44 +1300 Message-ID: [EMAIL PROTECTED] To measure the Allan variance you need at least 2 (preferably more) stabilised lasers and a mixer (photodiode) plus a suitable amplifier to produce a beat signal for analysis. The beat frequency may be as high as 100 MHz with a pair of 5501s (frequency/wavelength accuracy of 0.1ppm) so the photodiode and associated amplifier will need adequate bandwidth. It seems like three 5501s, optical splitters/joiners and a fairly normal counters should allow for a three-cornered hat and then should the Allan variance and friends be possible to measure. Cheers, Magnus Things to watch out for when attempting to mix optical frequencies. Orthogonally linearly polarised beams incident on a photodiode (or other photodetector) will not produce a beat note. Which is quite natural IF you think about it. A polariser in front of the diode with its transmission axis aligned so that the transmitted beam intensities are approximately equal for each of the 2 orthogonally polarised beams will allow a beat note to be produced. For identical incident beam intensities the polariser transmission axis will be at 45 degrees to the plane of polarisation of either beam. The angle (in radians) between the 2 beams has to be much smaller than /l/d./ where /l /is the wavelength and /d/ is the effective detector diameter. e.g. when /d/ = 1mm and /l/ = 633nm then the angle between the 2 beams must be 2 arc minutes. Yes, but if they where being brought together in a fused optical fibre splitt/merge and one of the beam is adjusted through a mouse-ear assembly or programable polarizer (fancy mouse-ear), then that problem wouln't be that much of a problem? I think I have a bunch of suitable PIN diodes lying around doing nothing good. But then again, I don't have a suitable set of lasers to check, unless you count the DWDM lasers also lying around. :) Thanks for the heads-up. Cheers, Magnus ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Ordinary fibres don't tend to preserve the polarisation state of the light. This may or may not be an advantage. The easiest way around this is to select the (with a piece of polaroid) required beam polarisations (and hence frequencies) before coupling into a fibre, then you don't need any polarisation controller and there is some advantage in using a non polarisation preserving fibre. Its probably much easier to do the experiment with free space beams. The alignment requirement of less than 1 arc minute or so is very easy to accomplish with a couple of mirrors in suitable kinematic mounts. It is not necessary to use expensive polarising beamsplitters unless you happen to have some. However they may be very convenient. If necessary adequate suppression of the unwanted polarisation can be achieved with a piece of polaroid. Either a a non polarising beamsplitter or a polarising beamsplitter can be used to superimpose the 2 beams. A programmable polariser is just a 1/2 wave plate between a pair of 1/4 wave plates all of which can be rotated about the beam passing through them. Equivalent 1/2 and 1/4 wave plates can be constructed by winding suitable lengths of fibre around a cylinder. However using a polarisation controller to match the input beam polarisation to an eigen polarisation state that is preserved by a fibre is unecessarily complex. Even non polarisation preserving fibres will preserve a particular polarisation state (usually elliptical) as it propagates in the fibre. However the particular eigen polarisation is sensitive to the bending and othere stress in the fibre. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] New PLOTTER version / HP5065 Frequency processing part II
Ulrich Bangert wrote: Hi folks, first i would like to announce a new version of PLOTTER which can be downloaded from www.ulrich-bangert.de The new version can classify data and compute new data columns from existing ones using a formula interpreter in that you may input a formula of your own. A lot of mathematic expressions are supported. Second, i would like to say thanks to anybody who answered on my Frequency processing scheme of HP5065 rubidium vapour standard thread. As usual in this group the (s+n)/n of the answers has been high. Nevertheless I dare to state that the basic question of mine is still unanswered. I believe that this is due to English not being my natural language so perhaps i did not manage to make the question really clear to everybody. Let me try again. Rubidium is NOT a PRIMARY frequency standard. Point. This has been well understood before I put forward my question and a lot of you have pointed to environmental parameters that may have a influence on the resonance frequency one may measure with a given physics package. The basic question has not been WHY the atomic resonance frequency is dependend on environmental parameters. The question has been TO WHAT EXTENT or expressed in other words IN WHICH ORDER OF MAGNITUDE these environmental parameters have an influence on the resonance frequency. This question has a very practical background: If you look at the schematics of a Ball-Efratom FRK-L rubidium standard you will notice that it has a fixed frequency synthesizer stage to generate the microwave frequency from the 10 MHz OCXO. There is NO possibility to tune anything concerning the microwave frequency of the physics package OTHER than the C-field setting. Since the C-field setting covers a frequency range of +/- 1E-9 relative this seems to be a strong indication that all efects that you decribe (including a exchange of the physics package) must be WELL below 10E-9 relative. With the resonance frequency in the 7 GHz region +/-10E-9 makes abt. +/- 7 Hz absolute. Note that this +/-7 Hz matches pretty much the way how the rubidium's frequency is usually specified as x.xx +/- 4 (7)Hz for example on TVB's pages. Up to this point I am in harmony with the world. Now comes the strange fact: HP's 5065 is equipped with a tuneable synthesizer to generate the microwave frequency from the OCXO. HP states that this tuneable synthesizer can be used to generate a number of different 'time scales' as some of you also have pointed at. I understand this very well! But the STRANGE thing is that HP uses DIFFERENT synthesizer settings albeit the intended purpose of the tuning ALSO to generate THE SAME time scale with two different physics packages. That is what we found on two different physics packages: Physics Package 1 C-Field 7.21 Synth. 8619 - 5.31498914 Mhz Physics Package 2 C-Field 8.24 Synth. 8397 - 5.31503431 Mhz Please note that the two synthesizer setting are different by MORE THAN 45 Hz. This is just one example, other physics packages may perhaps even be more apart. We have seen above that there is reason to believe that all environmental influences are smaller than +/-7 Hz. So where comes this 45 Hz difference from? Cheers Ulrich Bangert, DF6JB ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Ulrich The manual for the SRS PRS10 states that the combined effects of the buffer gas and the pump lamp spectral profile shift the resonance about 3kHz from the unperturbed natural transition frequency. With a different buffer gas, lamp spectral profile, or buffer gas pressure the resonance shift will be different for different physics packages. Perhaps Efratom relied on the reproducibility of lamp characteristics, buffer gas pressure, buffer gas composition during the manufacturing process whilst HP allowed for variations in these parameters from one physics package to another. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
[time-nuts] High resolution Beat frequency analysis
A resolution of 1E-15/T has been achieved (at JPL) by measuring the period of a 1Hz beat signal produced by mixing a pair of 100MHz sources, the zero crossing detector used requires heroic measures to combat the high phase shift temperature coefficient (~60us/K with polypropylene capacitors, NP0/C0G capacitors are impractical because of large value required) of the 1Hz RC filter employed to define the noise bandwidth. It would appear that this difficulty may be circumvented by employing a high resolution wide dynamic range sigma delta ADC in conjunction with a somewhat higher cutoff frequency antialiasing filter. The internal digital filters can have very stable delays determined by a crystal oscillator and the antialiasing filter may have a phase shift tempco below 1us/K so that temperature control to within 0.1K or so, should suffice to achieve a phase stability of better than 100ns. ADC integral nonlinearity will generate harmonic distortion in the sampled signal, however this isnt critical when measuring the relative stabilty of the 2 sources. The mixer non linearities will generate more distortion than the ADC. Suitable sigma delta ADCs with 130 dB dynamic range are available. Has anyone considered implementing anything like this? Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Old Crystal oven lying around
Magnus Danielson wrote: Hi! I have a HP G-69B-2 Z-235 Crystal Oven 100 kHz lying around. I'm considering heating it up and run it (just for fun). Operating temperature is 65 C. Anyone care to share any information on this device? I have no clue which box it ever was in or anything. Also, thoughts of suitable oscillator setups? I should probably have a run-by the network analyzer. Cheers, Magnus ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Magnus Presuming you just have a crystal in an oven, the simplest low phase noise oscillator setup is probably the following: http://www.wenzel.com/pdffiles/xtalosc.pdf However you will need to have some idea of the desired crystal current. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Old Crystal oven lying around
Dr Bruce Griffiths wrote: Magnus Danielson wrote: Hi! I have a HP G-69B-2 Z-235 Crystal Oven 100 kHz lying around. I'm considering heating it up and run it (just for fun). Operating temperature is 65 C. Anyone care to share any information on this device? I have no clue which box it ever was in or anything. Also, thoughts of suitable oscillator setups? I should probably have a run-by the network analyzer. Cheers, Magnus ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Magnus Presuming you just have a crystal in an oven, the simplest low phase noise oscillator setup is probably the following: http://www.wenzel.com/pdffiles/xtalosc.pdf However you will need to have some idea of the desired crystal current. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Magnus To avoid a dc voltage across the crystal a capacitor in series with the crystal and a high value (100M or more at 100KHz) shunt resistor across it may be desirable. Recent extensions to Leeson's theory of oscillator phase noise indicate that using an oscillator active device that is off for most of the oscillator cycle can be advantageous in reducing the phase noise. With a Colpitts crystal oscillator the optimum value of C2/C1 is around 4 as confirmed by experiment. Application of this theory by Intel and others has lead to a significant reduction of CMOS ring oscillator phase noise. This theory also accurately predicts the 1/f phase noise corner frequency from the 1/f noise corner frequency of the oscillator active devices. The 1/f phase noise corner frequency is not necessarily identical to the device 1/f noise corner of the device. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Old Crystal oven lying around
Magnus Danielson wrote: Hi! I have a HP G-69B-2 Z-235 Crystal Oven 100 kHz lying around. I'm considering heating it up and run it (just for fun). Operating temperature is 65 C. Anyone care to share any information on this device? I have no clue which box it ever was in or anything. Also, thoughts of suitable oscillator setups? I should probably have a run-by the network analyzer. Cheers, Magnus ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Magnus Typical face shear 100kHz crystals have a maximum drive level of 2 milliwatts and a max ESR of 5kohms. This implies a maximum crystal drive current of 630uA rms. You may wish to restrict the crystal dissipation to less than 100uW or less corresponding to a crystal current of 140uA rms or less for a crystal ESR of 5kohm. At such low frequencies an opamp with a shunt feedback resistor becomes a viable option for the buffer amplifier. Just connect the one end of the crystal directly to the opamp summing junction. If an OPA134 opamp with a 140 uA crystal current and a 14K shunt feedback resistor were employed to drive 2V rms into a 1K load the distortion products will be 80dB below the carrier and the output will have relatively low phase noise. An additional buffer stage is required to drive a 50 ohm load. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Motorola Oncore GPS Interface Board
David Forbes wrote: Jason Rabel wrote: A good initial buffer chip for all the TTL signals would be an IDT QS3384 with 10 inputs/outputs. Jason, The only problem with that part is that it's not a buffer! It's a switch. It has no drive capability at all. There are useful buffer chips for this task, but their names escape me just now. Perhaps the 74FCT245 or equivalent would work. Driving a full 5V TTL signal into a 50 ohm load is another matter - you need a lot of DC power (1/2 watt) to do that. I was just using a Liner Tech LT1010 for a similar job - it would get the job done, but folks here might complain about the phase noise. ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Use a 74FCT540/74ACT540 (or 74FCT541/4ACT541 if you don't wish to invert the signal), the layout is much simpler, inputs on one side, outputs on the other. If you just want to drive the input of a counter such as an HP5370A/B, it is not necessary to drive 5V into 50 ohms, )0.8 -1V into 50 ohms is more than sufficient. Connecting the output of a 74ACT14 (or equivalent) inverter in series with 270 ohms before driving a cable terminated in 50 ohms will suffice. You can also combine the outputs of several inverters using resistors to produce a 2V source with a 50 ohm source impedance. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Motorola Oncore GPS Interface Board
David Forbes wrote: Jason Rabel wrote: A good initial buffer chip for all the TTL signals would be an IDT QS3384 with 10 inputs/outputs. Jason, The only problem with that part is that it's not a buffer! It's a switch. It has no drive capability at all. There are useful buffer chips for this task, but their names escape me just now. Perhaps the 74FCT245 or equivalent would work. Driving a full 5V TTL signal into a 50 ohm load is another matter - you need a lot of DC power (1/2 watt) to do that. I was just using a Liner Tech LT1010 for a similar job - it would get the job done, but folks here might complain about the phase noise. ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Phase noise manifests itself as jitter on the PPS signal. You would have to really work at it to significantly degrade the inherent jitter in the GPS derived PPS signal. Consequently as long as the devices used are fast enough and not too noisy, phase noise will not be a significant problem unless your PCB layout is inadequate so that the PPS timing is modulated by some unrelated signal. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Motorola Oncore GPS Interface Board
Hal Murray wrote: Driving a full 5V TTL signal into a 50 ohm load is another matter - you need a lot of DC power (1/2 watt) to do that. I was just using a Liner Tech LT1010 for a similar job - it would get the job done, but folks here might complain about the phase noise. Where does that phase noise come from and/or what should I do to minimize it if I need some sort of buffering? Is there a general rule about digital chips vs analog chips? Phase noise is produced by the internal noise of the active devices employed as well as the passive components such as resistors. Poor quality components like some capacitors can also generate significant excess phase noise. In the final analysis everything is analog during switching transitions, even digital chips. The jitter in the timing of a logic edge transition is determined by the input signal jitter plus any noise on the finite risetime input as well as internal noise in the logic circuit. Using the same chip to buffer other unrelated logic signals will produce ground bounce that may affect the effective switching threshold for a PPS signal should a transition of the unrelated logic signal occur too close to a PPS transition. The inductance of the chips power and ground connections along with the load on the unrelated signal buffer output together with the PPS input signal risetme determines the significance of this effect. The noise contributed by a device itself depends more on on the characteristics of the devices used not whether the intended application is digital or analog. Bipolar devices tend to have lower 1/f noise corner frequencies than MOSFETS, GaAs devices tend to have very high 1/f noise corner frequencies. SiGe devices have lower 1/f noise corner frequencies than GaAs devices. Negative feedback can be used to reduce 1/f noise in analog cicuitry, such feedback is difficult to impossible to use with digital circuits so well designed analog circuitry can have lower 1/f noise than digital circuitry employing the same devices. Even after correction for sawtooth timing error the PPS output of a GPS timing receiver has a residual jitter of a few nanoseconds As long as one doesn't use a long cascaded chain of slow buffers it is very difficult to significantly degrade the jitter of the PPS output produced by a GPS timing receiver. Using a ground plane (and preferably a VCC plane) together with a good supply bypassing scheme is essential to reduce the interaction (via the impedance of the power supply system) between unrelated signals on a PCB. In a low phase noise oscillator using analog techniques is essential as it is then possible to provide local negative feedback to suppress 1/f noise generated by the active devices. However even if you are forced to use digital devices in an oscillator it is possible to significantly reduce the phase noise if the principles outlined in the latest extensions to Leeson's theory of oscillator phase noise are used. Indeed it is shown that, as observed in practice, the 1/f phase noise corner frequency of an oscillator is not identical to the 1/f noise corner of the active devices employed. Indeed in a well designed oscillator the 1/f phase noise corner is significantly lower than the 1/f noise corner of the active device used. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Motorola Oncore GPS Interface Board
David Forbes wrote: Jason Rabel wrote: A good initial buffer chip for all the TTL signals would be an IDT QS3384 with 10 inputs/outputs. Jason, The only problem with that part is that it's not a buffer! It's a switch. It has no drive capability at all. There are useful buffer chips for this task, but their names escape me just now. Perhaps the 74FCT245 or equivalent would work. Driving a full 5V TTL signal into a 50 ohm load is another matter - you need a lot of DC power (1/2 watt) to do that. I was just using a Liner Tech LT1010 for a similar job - it would get the job done, but folks here might complain about the phase noise. ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts If one uses a 5V source with a 50 ohm output impedance and terminates the 50 ohm cable in a high impedance a 5V swing is developed across the load and the source impedance damps out the reflection from the mismatched termination. This also has the advantage that power is only dissipated during signal transitions so that when using this technique to drive a 50 ohm cable terminated in a high impedance with a PPS signal which only has 2 transitions per second the power required to drive the load is very low whilst the waveform at the load is resonably clean (as long as the load (not cable) capacitance isn't too high. The attached GIF file illustrates how this may be done using a 74AC540 octal inverter. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Motorola Oncore GPS Interface Board
Jason Rabel wrote: Jason, The only problem with that part is that it's not a buffer! It's a switch. It has no drive capability at all. There are useful buffer chips for this task, but their names escape me just now. Perhaps the 74FCT245 or equivalent would work. Driving a full 5V TTL signal into a 50 ohm load is another matter - you need a lot of DC power (1/2 watt) to do that. I was just using a Liner Tech LT1010 for a similar job - it would get the job done, but folks here might complain about the phase noise. You're right... I guess I had a brain fart, I don't know where my mind was at that moment... ;) Anyhow, besides using a buffer chip (like the several mentioned in other posts), how would using a plain old voltage following op-amp compare? I haven't looked up any specs yet, I'm just throwing the idea out there. ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Unless you use a wideband opamp the transition times will be inferior to those achieved with a relatively inexpensive logic gate such as a 74AC540 or equivalent. Depending on the opamp output stage you may also need a negative supply to ensure that the opamp output will actually reach zero volts. To ensure stability it may be necessary to use a small resistor in series with the opamp output, in which case you may as well use this resistor to match the line impedance. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Motorola Oncore GPS Interface Board
I may have asked this before, but do you happen to have a few references on the extensions to Leeson's theory? Cheers, Magnus References are: /A General Theory of Phase Noise/ /in Electrical Oscillators/ Ali Hajimiri, Student Member, IEEE, and Thomas H. Lee, Member, IEEE IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 33, NO. 2, FEBRUARY 1998 179-194 /Oscillator Phase Noise: A Tutorial/ Thomas H. Lee, Member, IEEE, and Ali Hajimiri, Member, IEEE IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 3, MARCH 2000 326-336 Discovered these references on the Intel site in an article on the improved phase noise of the integrated ring oscillator VCOs used in some of their chips. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] Predicting clock stability from thevariouscharacterizationmethods
Tom Van Baak wrote: Brooke, Maybe this helps. The clock prediction into the future is based on the past history and the current point. If the measured ADEV for a clock is, say 1e-13, for a measurement interval of 1 day (tau), then the prediction, within one standard deviation, is that you'll be within 1e-13 tomorrow. 1e-13 at one day is about 9 ns. I think this is right. Can someone double check? It shouldn't matter what your divider does -- 9 ns of time error is 9 ns regardless if it's the zero-crossing of a 5 MHz RF output of the leading edge of a 1PPS signal. A divider postpones cycle wrapping but doesn't affect clock accuracy or stability (other than the obvious introduction of passive active component noise in the signal path). /tvb - Original Message - From: Brooke Clarke To: Tom Van Baak ; Discussion of precise time and frequency measurement Sent: Thursday, November 30, 2006 13:31 Subject: Re: [time-nuts] Predicting clock stability from thevariouscharacterizationmethods Hi Tom: Is there a way to use the Allan plot to predict the variation in a reading? For example if you use the plot comparing the 1 PPS from a GPS receiver to a good Cesium frequency standard, then: (1) what size of variation would you expect if the Cesium standard was divided down to 1 kHz and that was compared to the GPS 1 PPS, or (2) what size of variation would you expect if the Cesium standard was divided down to 1 Pulse/1,000 seconds? Have Fun, Brooke Clarke ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Tom Surely the time standard deviation should be: TDEV = TAU*MODADEV(TAU)/SQRT(3) ?? At least this appears to be so in the link you gave: http://www.wriley.com/paper2ht.htm Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] LPRO-101 with Brooks Shera's GPS locking circuit
Tom Van Baak wrote: On the subject of Brooks Shera's design, the one thing that troubles me is the use of a 24 MHz oscillator to count the width of the 1PPS signal. This yields a precision of 4.16e-8, but does it really? No, with averaging it's much better than that. This oscillator is uncontrolled and any drift would exist as noise that would have to be filtered (He uses a software low pass filter). No, when an oscillator is used as a timebase for what is essentially a short period time interval counter the XO drift rate does not affect the result like you think. Suppose you use a cheap XO with a huge drift rate of 100 ppm per year or even 1 ppm per day to make TI measurements between the OCXO and GPS. So an average measurement that is, say 12.34 ns today, will be off by 1 ppm tomorrow: it will be 12.34001 ns instead. Do you see now why it doesn't matter how bad the XO is? Secondly, someone can double check me here -- but it seems to me that any GPSDO that uses a built-in TIC to monitor the deviation between the GPS 1PPS and the OCXO 1PPS is a closed loop system and so the actual accuracy of the TIC timebase has no effect on the function of the GPSDO. I mean, the 24 MHz clock could drift down to 20 MHz or up to 30 MHz and the GPSDO would still work fine (hey, maybe even better). /tvb ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Tom Yes, frequency changes in the TIC oscillator only change the phase detector gain, if the loop attempts to lock somewhere near zero phase shift then the phase error at lock will be relatively unaffected by phase detector gain changes of a few percent. However if the phase detector gain changes by too much the loop dynamics will be compromised. If the loop locks at say 90 degrees phase shift then changes in the phase detector gain will affect the static phase error when the loop is locked. Even then the frequency offset will be zero for a second order loop. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] LPRO-101 with Brooks Shera's GPS locking circuit
[EMAIL PROTECTED] wrote: On Thu, December 14, 2006 23:07, Dr Bruce Griffiths said: Thus devising inexpensive phase detectors/TICs with subnanosecond performance allows one to take advantage of improvements in GPS timing receiver performance when they occur. The possibility of utilising GPS carrier phase tracking techniques in a timing receiver offers a potential timing resolution and jitter in the picosecond range which would allow enhanced GPSDO performance. Alternatively one could then achieve much better performance with less expensive oscillators. Currently dual frequency GPS geodetic receivers achieve subnanosecond resolution and stability when the data is processed, albeit not in real time. Bruce I have had an idea for some time, even have the hardware pieces since a year or more. Wish there were more time to spend on realizing projects... :-( Its not very original, but I have not seen it explored in any GPSDOs. Why not do the phase detection/frequency measurement inside the GPS receiver? Find a GPS that can be driven by your VCOCXO. (Zarlink's GP4020 accept 10MHz. CMCs Allstar and Superstar receivers are still available.) Control the oscillator softly enough that the tracking loops will not unlock. PLL augmented code measurement noise is in the low dm region for a good receiver design. Using a known surveyed position this would give one sub ns measurement for each satellite tracked. And then there is the phase measurements that should be usable in some sense. Other information that is available for a static receiver with internet connection is the ultra-rapid ephemeris and clock-parameters that are available for surveying use. These are much better than the broadcasted ephemeris. It appears as if this concept would open performance enhancement opportunities that are not used by the current OEM GPS timing receivers. This structure would not need to generate the 1PPS from the GPS, and there is no need for an external phase/TIC. It does instead ad an adaptable amount of software complexity to solve the GPS time error outside the GPS. What is the catch, that leads every(?) GPSDO designer along a different path? -- Björn ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Björn You will need a dual frequency receiver to more accurately correct for the ionospheric delay. Currently non approved users do not have access to the codes required to use the L2 frequency signals in an optimum way. Various kludges are required to extract some info from the L1 frequency carrier phase if one doesn't have the despreading codes. However this should change as the GPS system is enhanced to provide 2 or more frequencies to civilian users. Multipath effects become even more critical as one attempts subnanosecond timing performance. One may have to use either a choke ring ground plane antenna (as used in geodetic receivers) or resort to phased array techniques. There is at least one commercially available GPS disciplined OCXO system that uses carrier phase measurement techniques to discipline a crystal oscillator. A fractional standard deviation of 1E-11 for a measurement time of around 1 second is claimed. When using carrier phase measurement techniques it is advantageous to use the oscillator being disciplined to generate all the receiver local oscillator frequencies as well as the correlator clock frequencies. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
Re: [time-nuts] LPRO-101 with Brooks Shera's GPS locking circuit
[EMAIL PROTECTED] wrote: On Thu, December 14, 2006 23:07, Dr Bruce Griffiths said: Thus devising inexpensive phase detectors/TICs with subnanosecond performance allows one to take advantage of improvements in GPS timing receiver performance when they occur. The possibility of utilising GPS carrier phase tracking techniques in a timing receiver offers a potential timing resolution and jitter in the picosecond range which would allow enhanced GPSDO performance. Alternatively one could then achieve much better performance with less expensive oscillators. Currently dual frequency GPS geodetic receivers achieve subnanosecond resolution and stability when the data is processed, albeit not in real time. Bruce I have had an idea for some time, even have the hardware pieces since a year or more. Wish there were more time to spend on realizing projects... :-( Its not very original, but I have not seen it explored in any GPSDOs. Why not do the phase detection/frequency measurement inside the GPS receiver? Find a GPS that can be driven by your VCOCXO. (Zarlink's GP4020 accept 10MHz. CMCs Allstar and Superstar receivers are still available.) Control the oscillator softly enough that the tracking loops will not unlock. PLL augmented code measurement noise is in the low dm region for a good receiver design. Using a known surveyed position this would give one sub ns measurement for each satellite tracked. And then there is the phase measurements that should be usable in some sense. Other information that is available for a static receiver with internet connection is the ultra-rapid ephemeris and clock-parameters that are available for surveying use. These are much better than the broadcasted ephemeris. It appears as if this concept would open performance enhancement opportunities that are not used by the current OEM GPS timing receivers. This structure would not need to generate the 1PPS from the GPS, and there is no need for an external phase/TIC. It does instead ad an adaptable amount of software complexity to solve the GPS time error outside the GPS. What is the catch, that leads every(?) GPSDO designer along a different path? -- Björn ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts Björn You will need a dual frequency receiver to more accurately correct for the ionospheric delay. Currently non approved users do not have access to the codes required to use the L2 frequency signals in an optimum way. Various kludges are required to extract some info from the L1 frequency carrier phase if one doesn't have the despreading codes. However this should change as the GPS system is enhanced to provide 2 or more frequencies to civilian users. Multipath effects become even more critical as one attempts subnanosecond timing performance. One may have to use either a choke ring ground plane antenna (as used in geodetic receivers) or resort to phased array techniques. There is at least one commercially available GPS disciplined OCXO system that uses carrier phase measurement techniques to discipline a crystal oscillator. A fractional standard deviation of 1E-11 for a measurement time of around 1 second is claimed. When using carrier phase measurement techniques it is advantageous to use the oscillator being disciplined to generate all the receiver local oscillator frequencies as well as the correlator clock frequencies. Bruce ___ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
