Hi All.
Do you know if this patch will make it in the 4.2.2 release expected
around September 18th ?
Thanks!
Bernard
Anatoly Sokolov wrote:
Anatoly Sokolov wrote:
Hi.
This patch optimizes logic left shift of unsigned char by 4, 5, and 6,
excluding double 'andi' instructions in some
-Original Message-
From:
[EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED]
org] On Behalf Of Bernard Fouché
Sent: Tuesday, September 11, 2007 4:33 AM
To: Anatoly Sokolov
Cc: avr-gcc-list@nongnu.org
Subject: Re: [avr-gcc-list] Inversion of logic improves size speed
Hi All.
Do you
Anatoly Sokolov wrote:
Hi.
This patch optimizes logic left shift of unsigned char by 4, 5, and 6,
excluding double 'andi' instructions in some cases.
snip
Now:
0092 getBit4InvShift:
92: 82 95swap r24
94: 81 70andi r24, 0x01 ; 1
96: 08 95ret
0098
-Original Message-
From:
[EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED]
org] On Behalf Of Wouter van Gulik
Sent: Monday, August 27, 2007 3:25 AM
To: Anatoly Sokolov
Cc: avr-gcc-list@nongnu.org
Subject: Re: [avr-gcc-list] Inversion of logic improves size speed
One thing, the patch
Eric Weddington schreef:
Patch was not attached to email. However, Anatoly attached the patch to the
bug report.
What bug report?
I looked at:
Non optimal bit extraction
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33049
No register save:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33050
Anatoly Sokolov wrote:
Hi.
This patch optimizes logic left shift of unsigned char by 4, 5, and 6,
excluding double 'andi' instructions in some cases.
Patch.
Anatoly.
begin 666 gcc_fix_11259_33028.txt
[EMAIL PROTECTED](=C8R]R96-O9RYCCT]/3T]/3T]/3T]/3T]/3T]/3T]/3T]/3T]
-Original Message-
From: Wouter van Gulik [mailto:[EMAIL PROTECTED]
Sent: Monday, August 27, 2007 7:04 AM
To: Eric Weddington
Cc: 'Anatoly Sokolov'; avr-gcc-list@nongnu.org
Subject: Re: [avr-gcc-list] Inversion of logic improves size speed
Eric Weddington schreef:
Patch
-Original Message-
From:
[EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED]
org] On Behalf Of Anatoly Sokolov
Sent: Monday, August 27, 2007 7:14 AM
To: Wouter van Gulik
Cc: avr-gcc-list@nongnu.org
Subject: Re: [avr-gcc-list] Inversion of logic improves size speed
Anatoly Sokolov
Hi.
This patch optimizes logic left shift of unsigned char by 4, 5, and 6,
excluding double 'andi' instructions in some cases.
...
uint8_t getBit4InvShift(uint8_t temp) { uint8_t r = 0; if((temp4)1)
r|=0x1; return r; }
uint8_t getBit5InvShift(uint8_t temp) { uint8_t r = 0; if((temp5)1)
Anatoly Sokolov schreef:
Hi,
Bug #11259 [avr] gcc Double 'andi' missed optimization:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=11259
Bug #29560 Poor optimization for character shifts on Atmel AVR:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29560
Bug #29560 seems to be a little
Hi,
From: Wouter van Gulik [EMAIL PROTECTED]
Sent: Sunday, August 05, 2007 11:46 PM
After some testing I found out that inverting shift and and
instruction can significantly reduce speed and size. In the first is
case the compiler misses that it can optimise the shifts for bit 4..7
by
Wouter van Gulik [EMAIL PROTECTED] wrote:
Is this a (known?) bug or am I missing something?
It's not strictly a bug but a missed optimization. Could you fill
in a bugzilla report on GCC for this? If you replace the uint8_t by
unsigned char, no further preprocessing is needed, so you can
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