Re: [casper] Roach2 aux clocking and Bram's

2015-08-05 Thread Wesley New
The problem here is that the FVCO is not within the range of 600MHz to 1600MHz. This is an MMCM configuration issue as Dave has already mentioned. I have recently fixed a similar bug in the SKA-SA mlib_devel repository. Is this the repository that you are using? I have tested the aux clock on

Re: [casper] Roach2 aux clocking and Bram's

2015-08-05 Thread Vereese Van Tonder
Hi Andrew, Dave and Wes, Thanks for all the advice, I have a lot of things that I can test again now. I'm currently using the casper_astro_soak_test mlib_devel repository, I'll see the SKA-SA mlib_devel for the fix on the aux_clk. When I ran the aux_clk design at 143MHz the XSG_core_config

Re: [casper] Roach2 aux clocking and Bram's

2015-08-05 Thread Jack Hickish
Hi Vereese, Adding an iadc block will (I think, having just checked the adc yellow block code) change the number or software devices on the OPB bus, so could affect the problem if Dave's first hypothesis is correct. Having said that, your test using sys_clk, as long as you left all the yellow

Re: [casper] Roach2 aux clocking and Bram's

2015-08-04 Thread David MacMahon
Hi, Vereese, That's a very curious failure mode! It's very interesting that everything worked fine when clocking via iADC, but not when clocking via your mezzanine board (or aux_clk) even though the fabric clock rate was the same. I can think of two possible theories for what's going on