Hi jack,
thanks for your help.
Greetings,
Roberto
El vie., 23 oct. 2015 a las 19:13, Jack Hickish ()
escribió:
> Hi Roberto,
>
> I added an MSSGE block (roach2, clocking off adc0 at 2000/32 MHz) and a
> software register on one of the adc outputs to your adc5g_dmux_x2
Hi Jack,
I'm using Xilinx 14.5, and i can compile the original yellow block.
I don't have a branch in the casper repository, but i upload the library to
a git repository of my own. Here is the link
https://github.com/amermelao/mlib_devel_roberto.git. My model is caled
adc5g_dmux_x2.
Cheers,
Hi Roberto,
That's an interesting one. I don't think I've ever seen xps segfault.
First, are you using the latest (14.7) versions of the Xilinx tools?
Second, can you compile the original yellow block OK?
Other than go through the changes you've made step by step until you
identify the what's
i'm trying to do a yellow block similar to the 83000x2. Instead of using
the 83000 adc i want to do it with the adc5g adc (for roach2).
I've used the tutorial 7 of casper for reference and some other documents
to build the yellow block (i also looked how the adc5g was done).
I'm stuck becuase
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