Something we've had with PFBs and FFTs is that they don't resize properly
if you simply change their length in a design. It may be worth deleting
them and putting new ones.
On 12 Sep 2015 20:03, "Danny Price" wrote:
> Hi Michael
>
> I always blame the sync gen first! I’d
Hi Michael
I always blame the sync gen first! I’d suggest just sending out a single pulse
to reset the logic, not a heartbeat, at least to begin with, to rule this out.
Jack’s suggestion that it might be the addressing of the shared BRAM is
definitely a possibility too.
It’s very easy for
Hi Michael,
Are you certain that
1. The snapshot bram address counters have been changed to accommodate the
new deeper rams. If not they will wrap and never write to the lower part of
the ram.
2. Whatever controls the valid signal to the shared brams has been modified
so that valid goes high for
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