Re: Re: Re: [casper] timing errors

@postgrad.manchester.ac.uk>, "casper@lists.berkeley.edu" <casper@lists.berkeley.edu> 主题: Re: Re: [casper] timing errors Hello Yunpeng, Black boxing can help speed up compile time but the place-and-route needs to run every time, so it won't really help the design meet timin

Re: Re: [casper] timing errors

Hello Yunpeng, Black boxing can help speed up compile time but the place-and-route needs to run every time, so it won't really help the design meet timing. In my experience that's the thing that takes long. Good luck. Regards, James On Mon, Jun 5, 2017 at 9:58 AM, Vereese Van Tonder

Re: Re: [casper] timing errors

Hi Yunpeng, You can try "Black Boxing" parts of your design, that you know works. There's a tutorial on the CASPER wiki here: https://casper.berkeley.edu/wiki/Tutorial_HDL_Black_Box I hope this helps. On Sun, Jun 4, 2017 at 4:43 AM, 门云鹏 wrote: > Hi James, Michael, and

Re: Re: [casper] timing errors

Hi James, Michael, and Vereese, Thanks for your reply. I have read the timing report to find the failing paths, and tried to add delay blocks or increasing adder / multiplier latency. It works well but not always, especially for timing errors in some yellow blocks, for instance I will try