Hi Michael,
Is this actually the optimisation parameter of the xilinx bram block, or an
optimisation of a casper block which completely changes some underlying
circuit (eg by doing a bunch of fanout control and instantiating multiple
small brams instead of one big one)?
If the latter, are you
Dear all,
I've been chasing the cause of some nasty artefacts in my spectra recently. The
first turned out to be a known bug in the Xilinx compiler, activated when the
BRAM_sharing optimisation in the FFT is checked, however the artefacts I'm
seeing since seem to be activated by the RAM blocks
Hi Michael,
Hmmm. Can you link the repo you're using and a reference design?
Thanks
Jack
On Sun, 18 Sep 2016 at 15:05 Michael D'Cruze <
michael.dcr...@postgrad.manchester.ac.uk> wrote:
> Hi Jack,
>
>
>
> To implement the change in optimisation I altered the delay_bram init
> script. Line 84
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