Re: [casper] Help with PlanAhead

I actually didn't know that tool existed! I am trying to meet timing constraints, and I'm actually very close to do so, so I'm definitely gonna try smartxplorer. Thanks for the advise! Franco On 25/05/17 15:24, Michael D'Cruze wrote: Hi Franco, Just curious, but have you considered using

Re: [casper] Help with PlanAhead

Thanks for the feedback Jack! On 25/05/17 13:46, Jack Hickish wrote: Hi Franco, 1) Yes, this is an optimization the tools have performed. If you dig into the Xilinx manuals you can probably find some options / UCF entries to turn off this type of optimization, or at least make it less

RE: [casper] Help with PlanAhead

Hi Franco, Just curious, but have you considered using SmartXplorer to assist in getting your design to meet timing, if this is the eventual goal? Usually I find that with a medium or large design, if I can adjust the latencies in Simulink to get within a timing score of, say, 1, then

Re: [casper] Help with PlanAhead

Hi Franco, 1) Yes, this is an optimization the tools have performed. If you dig into the Xilinx manuals you can probably find some options / UCF entries to turn off this type of optimization, or at least make it less aggressive. I don't use these enough to know exactly which ones you want, but