Hi Mark,
Thanks for this.
In terms of the BSP images, it should not be necessary to use
"fpga.convert_hex_to_bin()". I use the bin file and hex file that is
generated from Vivado. These versions are stored in the repo link I sent
you. You can use either one. In otherwords, this is all you need
Hi Adam,
I will go through what I did to get the Skarab into this state.
import casperfpga
fpga = casperfpga.SkarabFpga('169.254.128.213')
fpga.convert_hex_to_bin('frm123701u1r1_mez3_golden_ska_sa.hex',True);
fpga.convert_hex_to_bin('frm123701u1r1_mez3_ska_sa.hex',True);
Hi Jonathan,
Thanks for the feedback on the documents and your kind words. These
documents will be added to a repo and linked to the wiki by the end of next
week. I will send an email out when this is ready.
I agree with Clifford. I am still not sure what caused the board to be
bricked and I
Hello Clifford,
Thank you very much for the detailed response, and it is good to know Peralex
is overlooking the correspondence. I confess to being a little frustrated at
the end of the day yesterday, so may have been a bit grumpy. Adam bore the
brunt, and I really do appreciate his patient,
Hi Jonathan (and Adam/Wesley/Mark)
*Firstly*, I want to assure you that Peralex is monitoring the Casper
group mails, and we will step in where we feel it necessary. Right now,
it looks like you are getting excellent support from SKA-SA.
*Secondly*, our aim with Skarab is that end users never
Thanks very much for the quick response, Adam, and the detailed procedures,
much appreciated. I found two JTAG pods, one the Xilinx branded one, and a
more compact version by Diligent, and a couple of cable sets. An attempt at
reprogramming will be made today and we will let you know. Best
Hi Jonathan and Mark,
I have written a How To for configuring the flash via the JTAG (
https://docs.google.com/a/ska.ac.za/document/d/1TeVELJ1jEQLzk-qqzWhXODd_HEalTkDJhXq4Q1Y_qgU/edit?usp=sharing
)
I have also updated the https://github.com/ska-sa/skarab_bsp_images (master
branch) repo with the
Hi Jonathan and Mark,
Thanks for the feedback. The documentation is a work in progress, so
feedback is important.
I will certainly add a How To on configuring the SKARAB via the JTAG and we
are/will be working on a user manual for casperfpga.
The schematics are part of the "Peralex
Hi Adam,
Ok thanks. I found a Xilinx Platform USB pod in anticipation of this need
before leaving the office. I still need to locate the fly lead cables.
For this reason alone this needs to wait till tomorrow. It's also very
late for you so I feel badly keeping you up.
The package of
Hi Jonathan and Mark,
Yes, JTAG is the way. Okay, I have done this before. This is what needs to
be done and I am going via memory here - will confirm when I am in the
office tomorrow:
1) Remove the SKARAB lid
2) This is TBC, but you will need to short the jumper on P9 (schematic page
42),
Hi Wes and other SKARAB experts,
To my understanding our SKARAB is now "bricked" and no longer responds on
Ethernet at all. We now need a way to bring it back to life from a straight
off the factory floor state. We surmise this involves JTAG and while there
is a tantalizing mention of this
Hi Mark,
I assume you were loading the latest BSP images to your SKARAB? Further to
what Wesley said, please can you also indicate the following:
1) Did you reprogramme both the multiboot and golden flash images?
2) Did you use the *.hex or *.bin file that was in the repo?
3) Is it possible
Hi Mark,
Firstly, welcome to the CASPER community.
The SKARAB has multiple images stored in Flash. These are meant only used
for the initial FPGA image at start up and a fall back image. This is a
Xilinx standard method of configuration. You should be using the
upload_to_ram_and_program
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