Author: Sameer Sahasrabuddhe
Date: 2020-01-16T15:15:38+05:30
New Revision: ed181efa175d3e0acc134e6cd161914e64c7195e
URL:
https://github.com/llvm/llvm-project/commit/ed181efa175d3e0acc134e6cd161914e64c7195e
DIFF:
Author: Saiyedul Islam
Date: 2020-04-27T09:39:03+05:30
New Revision: 06bdffb2bb45d8666ec86782d21214ef545a71fd
URL:
https://github.com/llvm/llvm-project/commit/06bdffb2bb45d8666ec86782d21214ef545a71fd
DIFF:
Author: Sameer Sahasrabuddhe
Date: 2021-06-29T00:21:07+05:30
New Revision: 280593bd3ff1db6d19ccb8182698dd9c816734e2
URL:
https://github.com/llvm/llvm-project/commit/280593bd3ff1db6d19ccb8182698dd9c816734e2
DIFF:
Author: Sameer Sahasrabuddhe
Date: 2022-02-11T22:51:56+05:30
New Revision: d8f99bb6e0641474b6bc1728295b40a8fa279f9a
URL:
https://github.com/llvm/llvm-project/commit/d8f99bb6e0641474b6bc1728295b40a8fa279f9a
DIFF:
Author: Sameer Sahasrabuddhe
Date: 2022-12-12T16:32:58+05:30
New Revision: bb48aa20e761e26226c6f909a07246781d68ba41
URL:
https://github.com/llvm/llvm-project/commit/bb48aa20e761e26226c6f909a07246781d68ba41
DIFF:
Author: Sameer Sahasrabuddhe
Date: 2022-12-13T11:18:39+05:30
New Revision: cd50f910f4d1a6bb54fd8968f067febbc7320f28
URL:
https://github.com/llvm/llvm-project/commit/cd50f910f4d1a6bb54fd8968f067febbc7320f28
DIFF:
@@ -199,15 +214,31 @@ RValue
CodeGenFunction::EmitAMDGPUDevicePrintfCallExpr(const CallExpr *E) {
}
llvm::Value *Arg = A.getRValue(*this).getScalarVal();
+if (isString(A.getType().getTypePtr()) && CGM.getLangOpts().OpenCL)
ssahasra wrote:
The
@@ -178,17 +181,29 @@ RValue
CodeGenFunction::EmitNVPTXDevicePrintfCallExpr(const CallExpr *E) {
E, this, GetVprintfDeclaration(CGM.getModule()), false);
}
+// Deterimines if an argument is a string
+static bool isString(const clang::Type *argXTy) {
@@ -198,15 +213,31 @@ RValue
CodeGenFunction::EmitAMDGPUDevicePrintfCallExpr(const CallExpr *E) {
}
llvm::Value *Arg = A.getRValue(*this).getScalarVal();
+if (isString(A.getType().getTypePtr()) && CGM.getLangOpts().OpenCL)
+ Arg =
ssahasra wrote:
> ping
Some comments still need to be addressed.
https://github.com/llvm/llvm-project/pull/72556
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@@ -198,6 +229,10 @@ static void locateCStrings(SparseBitVector<8> ,
StringRef Str) {
if (SpecEnd == StringRef::npos)
return;
auto Spec = Str.slice(SpecPos, SpecEnd + 1);
+
+if ((Spec.find_first_of("v")) != StringRef::npos)
ssahasra wrote:
@@ -26,28 +26,31 @@ using namespace llvm;
#define DEBUG_TYPE "amdgpu-emit-printf"
-static Value *fitArgInto64Bits(IRBuilder<> , Value *Arg) {
+static Value *fitArgInto64Bits(IRBuilder<> , Value *Arg,
+ bool IsBuffered) {
+ const DataLayout =
@@ -406,5 +410,9 @@ TARGET_BUILTIN(__builtin_amdgcn_cvt_pk_fp8_f32, "iffiIb",
"nc", "fp8-insts")
TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_bf8_f32, "ifiiIi", "nc", "fp8-insts")
TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_fp8_f32, "ifiiIi", "nc", "fp8-insts")
+// OpenCL
@@ -1,12 +1,68 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-// RUN: %clang_cc1 -cl-std=CL1.2 -triple amdgcn-amd-amdhsa
-disable-llvm-passes -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -cl-std=CL1.2 -triple amdgcn-amd-amdhsa
https://github.com/ssahasra updated
https://github.com/llvm/llvm-project/pull/73920
>From 6b87550b48f5fae5c34304a14a302d37e81a Mon Sep 17 00:00:00 2001
From: Sameer Sahasrabuddhe
Date: Fri, 1 Dec 2023 11:49:02 +0530
Subject: [PATCH] [clang][AMDGPU] precommit test for ballot on Windows
The
https://github.com/ssahasra updated
https://github.com/llvm/llvm-project/pull/73906
>From 8ecb6310a4912de50628cf3db5ff8488fa919bb1 Mon Sep 17 00:00:00 2001
From: Sameer Sahasrabuddhe
Date: Fri, 1 Dec 2023 14:24:30 +0530
Subject: [PATCH 1/2] [clang][AMDGPU] precommit test for ballot on Windows
@@ -0,0 +1,15 @@
+// REQUIRES: amdgpu-registered-target
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx900 -x hip
-emit-llvm -fcuda-is-device -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx900 -x hip -S
-fcuda-is-device -o - %s
@@ -0,0 +1,27 @@
+// REQUIRES: amdgpu-registered-target
+// XFAIL: *
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -aux-triple
x86_64-pc-windows-msvc -target-cpu gfx900 -x hip -emit-llvm -fcuda-is-device -o
- %s | FileCheck %s
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa
@@ -406,5 +410,9 @@ TARGET_BUILTIN(__builtin_amdgcn_cvt_pk_fp8_f32, "iffiIb",
"nc", "fp8-insts")
TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_bf8_f32, "ifiiIi", "nc", "fp8-insts")
TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_fp8_f32, "ifiiIi", "nc", "fp8-insts")
+// OpenCL
https://github.com/ssahasra updated
https://github.com/llvm/llvm-project/pull/73920
>From 8ecb6310a4912de50628cf3db5ff8488fa919bb1 Mon Sep 17 00:00:00 2001
From: Sameer Sahasrabuddhe
Date: Fri, 1 Dec 2023 14:24:30 +0530
Subject: [PATCH] [clang][AMDGPU] precommit test for ballot on Windows
The
@@ -150,8 +150,8 @@ BUILTIN(__builtin_amdgcn_mqsad_u32_u8, "V4UiWUiUiV4Ui",
"nc")
// Ballot builtins.
//===--===//
-TARGET_BUILTIN(__builtin_amdgcn_ballot_w32, "Uib", "nc", "wavefrontsize32")
https://github.com/ssahasra closed
https://github.com/llvm/llvm-project/pull/73906
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@@ -4742,6 +4742,16 @@ void Clang::ConstructJob(Compilation , const JobAction
,
Args.ClaimAllArgs(options::OPT_gen_cdb_fragment_path);
}
+ if (TC.getTriple().isAMDGPU() && types::isOpenCL(Input.getType())) {
+if (Args.getLastArg(options::OPT_mprintf_kind_EQ)) {
+
@@ -170,20 +173,49 @@ static Value *appendString(IRBuilder<> , Value
*Desc, Value *Arg,
return callAppendStringN(Builder, Desc, Arg, Length, IsLast);
}
+static Value *appendVectorArg(IRBuilder<> , Value *Desc, Value *Arg,
+ bool IsLast, bool
@@ -4742,6 +4742,16 @@ void Clang::ConstructJob(Compilation , const JobAction
,
Args.ClaimAllArgs(options::OPT_gen_cdb_fragment_path);
}
+ if (TC.getTriple().isAMDGPU() && types::isOpenCL(Input.getType())) {
+if (Args.getLastArg(options::OPT_mprintf_kind_EQ)) {
+
https://github.com/ssahasra closed
https://github.com/llvm/llvm-project/pull/73920
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https://github.com/ssahasra created
https://github.com/llvm/llvm-project/pull/73920
The Clang declaration of the wave-64 builtin uses "UL" as the return type,
which is interpreted as a 32-bit unsigned integer on Windows. This emits an
incorrect LLVM declaration with i32 return type instead of
https://github.com/ssahasra updated
https://github.com/llvm/llvm-project/pull/73906
>From 8ecb6310a4912de50628cf3db5ff8488fa919bb1 Mon Sep 17 00:00:00 2001
From: Sameer Sahasrabuddhe
Date: Fri, 1 Dec 2023 14:24:30 +0530
Subject: [PATCH 1/2] [clang][AMDGPU] precommit test for ballot on Windows
@@ -26,28 +26,34 @@ using namespace llvm;
#define DEBUG_TYPE "amdgpu-emit-printf"
-static Value *fitArgInto64Bits(IRBuilder<> , Value *Arg) {
+static Value *fitArgInto64Bits(IRBuilder<> , Value *Arg,
+ bool IsBuffered) {
+ const DataLayout =
@@ -4742,6 +4742,16 @@ void Clang::ConstructJob(Compilation , const JobAction
,
Args.ClaimAllArgs(options::OPT_gen_cdb_fragment_path);
}
+ if (TC.getTriple().isAMDGPU() && types::isOpenCL(Input.getType())) {
+if (Args.getLastArg(options::OPT_mprintf_kind_EQ)) {
+
@@ -170,20 +173,49 @@ static Value *appendString(IRBuilder<> , Value
*Desc, Value *Arg,
return callAppendStringN(Builder, Desc, Arg, Length, IsLast);
}
+static Value *appendVectorArg(IRBuilder<> , Value *Desc, Value *Arg,
+ bool IsLast, bool
@@ -168,20 +174,48 @@ static Value *appendString(IRBuilder<> , Value
*Desc, Value *Arg,
return callAppendStringN(Builder, Desc, Arg, Length, IsLast);
}
+static Value *appendVectorArg(IRBuilder<> , Value *Desc, Value *Arg,
+ bool IsLast, bool
https://github.com/ssahasra edited
https://github.com/llvm/llvm-project/pull/72556
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https://github.com/ssahasra requested changes to this pull request.
https://github.com/llvm/llvm-project/pull/72556
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@@ -198,15 +213,31 @@ RValue
CodeGenFunction::EmitAMDGPUDevicePrintfCallExpr(const CallExpr *E) {
}
llvm::Value *Arg = A.getRValue(*this).getScalarVal();
+if (isString(A.getType().getTypePtr()) && CGM.getLangOpts().OpenCL)
+ Arg =
@@ -170,20 +173,49 @@ static Value *appendString(IRBuilder<> , Value
*Desc, Value *Arg,
return callAppendStringN(Builder, Desc, Arg, Length, IsLast);
}
+static Value *appendVectorArg(IRBuilder<> , Value *Desc, Value *Arg,
+ bool IsLast, bool
@@ -194,6 +226,8 @@ static void locateCStrings(SparseBitVector<8> ,
StringRef Str) {
SpecPos += 2;
continue;
}
+if (Str.find_first_of("v", SpecPos) != StringRef::npos)
ssahasra wrote:
I don't think this will work as expected. It can
@@ -170,20 +173,49 @@ static Value *appendString(IRBuilder<> , Value
*Desc, Value *Arg,
return callAppendStringN(Builder, Desc, Arg, Length, IsLast);
}
+static Value *appendVectorArg(IRBuilder<> , Value *Desc, Value *Arg,
+ bool IsLast, bool
@@ -1,12 +1,68 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-// RUN: %clang_cc1 -cl-std=CL1.2 -triple amdgcn-amd-amdhsa
-disable-llvm-passes -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -cl-std=CL1.2 -triple amdgcn-amd-amdhsa
@@ -170,20 +173,49 @@ static Value *appendString(IRBuilder<> , Value
*Desc, Value *Arg,
return callAppendStringN(Builder, Desc, Arg, Length, IsLast);
}
+static Value *appendVectorArg(IRBuilder<> , Value *Desc, Value *Arg,
+ bool IsLast, bool
@@ -4742,6 +4742,16 @@ void Clang::ConstructJob(Compilation , const JobAction
,
Args.ClaimAllArgs(options::OPT_gen_cdb_fragment_path);
}
+ if (TC.getTriple().isAMDGPU() && types::isOpenCL(Input.getType())) {
+if (Args.getLastArg(options::OPT_mprintf_kind_EQ)) {
+
@@ -26,28 +26,31 @@ using namespace llvm;
#define DEBUG_TYPE "amdgpu-emit-printf"
-static Value *fitArgInto64Bits(IRBuilder<> , Value *Arg) {
+static Value *fitArgInto64Bits(IRBuilder<> , Value *Arg,
+ bool IsBuffered) {
+ const DataLayout =
@@ -26,28 +26,31 @@ using namespace llvm;
#define DEBUG_TYPE "amdgpu-emit-printf"
-static Value *fitArgInto64Bits(IRBuilder<> , Value *Arg) {
+static Value *fitArgInto64Bits(IRBuilder<> , Value *Arg,
+ bool IsBuffered) {
+ const DataLayout =
@@ -406,5 +410,9 @@ TARGET_BUILTIN(__builtin_amdgcn_cvt_pk_fp8_f32, "iffiIb",
"nc", "fp8-insts")
TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_bf8_f32, "ifiiIi", "nc", "fp8-insts")
TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_fp8_f32, "ifiiIi", "nc", "fp8-insts")
+// OpenCL
@@ -406,5 +410,9 @@ TARGET_BUILTIN(__builtin_amdgcn_cvt_pk_fp8_f32, "iffiIb",
"nc", "fp8-insts")
TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_bf8_f32, "ifiiIi", "nc", "fp8-insts")
TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_fp8_f32, "ifiiIi", "nc", "fp8-insts")
+// OpenCL
https://github.com/ssahasra edited
https://github.com/llvm/llvm-project/pull/78572
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@@ -18365,6 +18366,28 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
return nullptr;
}
+void CodeGenFunction::AddAMDGCNFenceAddressSpaceMMRA(llvm::Instruction *Inst,
ssahasra wrote:
The function immediately below this uses "AMDGPU" in
@@ -678,6 +679,59 @@ class SIMemoryLegalizer final : public MachineFunctionPass
{
bool runOnMachineFunction(MachineFunction ) override;
};
+static std::array, 3> ASNames = {{
+{"global", SIAtomicAddrSpace::GLOBAL},
+{"local", SIAtomicAddrSpace::LDS},
+{"image",
https://github.com/ssahasra approved this pull request.
The frontend changes and the MMRA emitted in LLVM IR look good to me. The
backend changes also look okay, but please see if anyone else has comments
about that.
https://github.com/llvm/llvm-project/pull/78572
@@ -4408,6 +4409,42 @@ Target-Specific Extensions
Clang supports some language features conditionally on some targets.
+AMDGPU Language Extensions
+--
+
+__builtin_amdgcn_fence
+^^
+
+``__builtin_amdgcn_fence`` emits a fence.
+
+*
@@ -18365,6 +18366,28 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
return nullptr;
}
+void CodeGenFunction::AddAMDGCNFenceAddressSpaceMMRA(llvm::Instruction *Inst,
+ const CallExpr *E) {
+ constexpr
@@ -678,6 +680,54 @@ class SIMemoryLegalizer final : public MachineFunctionPass
{
bool runOnMachineFunction(MachineFunction ) override;
};
+static std::array, 3> ASNames = {{
ssahasra wrote:
Use StringMap for this?
@@ -678,6 +680,54 @@ class SIMemoryLegalizer final : public MachineFunctionPass
{
bool runOnMachineFunction(MachineFunction ) override;
};
+static std::array, 3> ASNames = {{
+{"global", SIAtomicAddrSpace::GLOBAL},
+{"local", SIAtomicAddrSpace::LDS},
+{"image",
https://github.com/ssahasra edited
https://github.com/llvm/llvm-project/pull/78572
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@@ -678,6 +680,50 @@ class SIMemoryLegalizer final : public MachineFunctionPass
{
bool runOnMachineFunction(MachineFunction ) override;
};
+static const StringMap ASNames = {{
+{"global", SIAtomicAddrSpace::GLOBAL},
+{"local", SIAtomicAddrSpace::LDS},
+
https://github.com/ssahasra approved this pull request.
Looks good to me. But I have no opinion about that discussion with whether
"image" should be available for explicit use!
https://github.com/llvm/llvm-project/pull/78572
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ssahasra wrote:
> Should we also rename the MMRA to `amdgpu-fence-as` (remove OpenCL from the
> name) ?
Even the "fence" prefix is not entirely correct. The same tags also make sense
on a load-acquire or store-release, which are "fence like" instructions, or
"operations with implicit
@@ -18365,6 +18366,30 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
return nullptr;
}
+void CodeGenFunction::AddAMDGCNAddressSpaceMMRA(llvm::Instruction *Inst,
+const CallExpr *E,
+
@@ -18365,6 +18366,30 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned
BuiltinID,
return nullptr;
}
+void CodeGenFunction::AddAMDGCNAddressSpaceMMRA(llvm::Instruction *Inst,
+const CallExpr *E,
+
@@ -4408,6 +4409,54 @@ Target-Specific Extensions
Clang supports some language features conditionally on some targets.
+AMDGPU Language Extensions
+--
+
+__builtin_amdgcn_fence
+^^
+
+``__builtin_amdgcn_fence`` emits a fence for
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Nathan =?utf-8?q?Gauër?= ,
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Message-ID:
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@@ -1130,8 +1130,96 @@ struct BitTest {
static BitTest decodeBitTestBuiltin(unsigned BuiltinID);
};
+
+// Returns the first convergence
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Message-ID:
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https://github.com/ssahasra commented:
LGTM, with a few nits.
For the record, I
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@@ -1130,8 +1130,92 @@ struct BitTest {
static BitTest
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In-Reply-To:
https://github.com/ssahasra edited
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@@ -1130,8 +1130,92 @@ struct
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@@ -1130,8 +1130,92 @@ struct BitTest {
static BitTest
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https://github.com/ssahasra approved this pull
https://github.com/ssahasra approved this pull request.
https://github.com/llvm/llvm-project/pull/72556
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@@ -3616,6 +3617,12 @@ unsigned FunctionDecl::getBuiltinID(bool
ConsiderWrapperFunctions) const {
if (!ConsiderWrapperFunctions && getStorageClass() == SC_Static)
return 0;
+ // AMDGCN implementation supports printf as a builtin
+ // for OpenCL
+ if
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