must be NONE or the FB must be NULL
if pixel_source == FB.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic.c| 21 ++--
drivers/gpu/drm/drm_atomic_helper.c | 39 +
include/drm/drm_atomic_helper.h | 4 ++--
include/drm
Add solid_fill and pixel_source properties to DPU plane
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
b/drivers/gpu/drm/msm/disp/dpu1
Add "SOLID_FILL" as a valid pixel source. If the pixel_source property is
set to "SOLID_FILL", it will display data from the drm_plane "solid_fill"
blob property.
Reviewed-by: Dmitry Baryshkov
Acked-by: Pekka Paalanen
Acked-by: Harry Wentland
Acked-by: Sebastia
Add pixel source to the atomic plane state dump
Reviewed-by: Dmitry Baryshkov
Acked-by: Harry Wentland
Acked-by: Sebastian Wick
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic.c| 1 +
drivers/gpu/drm/drm_blend.c | 1 +
drivers/gpu/drm/drm_crtc_internal.h | 1 +
3
Since solid fill planes allow for a NULL framebuffer in a valid commit,
add NULL framebuffer checks to atomic commit calls within DPU.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 9 +++-
drivers/gpu/drm/msm/disp/dpu1
n:
struct drm_mode_solid_fill {
u32 r, g, b, pad;
};
Acked-by: Harry Wentland
Acked-by: Sebastian Wick
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic_state_helper.c | 9
drivers/gpu/drm/drm_atomic_uapi.c | 26 ++
drivers/gpu/drm/d
uot;, .data = _rgxx3_info },
+ { .compatible = "anbernic,rg351v-panel", .data = _rg351v_info },
+ { .compatible = "anbernic,rg353p-panel", .data = _rg353p_info },
+ { .compatible = "powkiddy,rk2023-panel", .data = _rk2023_info },
{ /* sentine
On 9/24/2023 3:06 AM, Dmitry Baryshkov wrote:
On 29/08/2023 03:05, Jessica Zhang wrote:
Add support for pixel_source property to drm_plane and related
documentation. In addition, force pixel_source to
DRM_PLANE_PIXEL_SOURCE_FB in DRM_IOCTL_MODE_SETPLANE as to not break
legacy userspace
On 9/24/2023 3:29 AM, Dmitry Baryshkov wrote:
On 29/08/2023 03:05, Jessica Zhang wrote:
Since solid fill planes allow for a NULL framebuffer in a valid commit,
add NULL framebuffer checks to atomic commit calls within DPU.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
On 9/24/2023 3:23 AM, Dmitry Baryshkov wrote:
On 22/09/2023 20:49, Jessica Zhang wrote:
On 8/29/2023 1:22 AM, Pekka Paalanen wrote:
On Mon, 28 Aug 2023 17:05:13 -0700
Jessica Zhang wrote:
Loosen the requirements for atomic and legacy commit so that, in cases
where pixel_source != FB
and addressing some outstanding failures.
Signed-off-by: Abhinav Kumar
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/ci/build.sh | 1 +
drivers/gpu/drm/ci/test.yml | 15 +++
2 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/ci/build.sh b/drivers/gpu/drm/ci/build.sh
Add skips, fails and flakes for the SM8250 test.
Generated using update-xfails.py [1]
[1] https://patchwork.freedesktop.org/patch/561453/?series=124793=1
Signed-off-by: Abhinav Kumar
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/ci/xfails/msm-sm8250-fails.txt | 29
.
For now, we will keep the job as manual trigger only and drop that rule later
after we stabilize the tests.
[1] https://gitlab.freedesktop.org/drm/msm/-/jobs/50092719
---
Jessica Zhang (3):
drm/ci: Add SM8250 job to CI
drm/ci: enable CONFIG_INTERCONNECT_QCOM_SM8250 for arm64 config
Set CONFIG_INTERCONNECT_QCOM_SM8250 needs to =y so that the ASIX AX88179
USB Ethernet driver can be probed in time to set up nfsroot.
Signed-off-by: Abhinav Kumar
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/ci/arm64.config | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu
for the r66451 command mode panel though the drop reported here seems
more drastic.
I'll try recreating this on SM8550 MTP and investigate it.
Thanks,
Jessica Zhang
Neil
Depends on: "Add prepare_prev_first flag to Visionox VTDR6130" [1]
Changes since v1:
- Changed from email a
and all seem to work identical
to the 353 otherwise.
Hi Chris,
LGTM, thanks!
Reviewed-by: Jessica Zhang
BR,
Jessica Zhang
Signed-off-by: Chris Morgan
---
drivers/gpu/drm/panel/panel-newvision-nv3051d.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel
)
{
struct device *dev = >dev;
+ struct device_node *np = dev->of_node;
Hi Chris,
Thanks for the patch.
It mostly looks good to me, but just one question here -- why not pass
in `dev->of_node` directly into `of_device_is_compatible()`?
Thanks,
Jessica Zhang
struct panel_nv3
mipi_dsi_generic_write_seq(ctx->dsi, 0xbd, 0x05);
+ usleep_range(1000, 2000);
Just to check my understanding of the comment here.. so the above DCS
command will set the panel to 90Hz, and if we change the parameter to
0x00, it will be set to 60Hz instead?
Thanks,
Jess
On 9/22/2023 10:12 AM, Helen Koike wrote:
Add job that runs igt on top of vkms.
Signed-off-by: Helen Koike
Tested-by: Jessica Zhang
Acked-by: Jessica Zhang
---
See pipeline:
https://gitlab.freedesktop.org/helen.fornazier/linux/-/pipelines/990494
v2:
- do not mv modules to /lib
/cargo-installkNKRwf`
Caused by:
package `rustix v0.38.13` cannot be built because it requires rustc 1.63 or
newer, while the currently active rustc version is 1.60.0
A patch to Mesa was recently added fixing this error, so update it.
Signed-off-by: Helen Koike
Tested-by: Jessica Zhang
Acked
On 8/29/2023 1:22 AM, Pekka Paalanen wrote:
On Mon, 28 Aug 2023 17:05:13 -0700
Jessica Zhang wrote:
Loosen the requirements for atomic and legacy commit so that, in cases
where pixel_source != FB, the commit can still go through.
This includes adding framebuffer NULL checks in other areas
On 9/18/2023 5:58 AM, John Watts wrote:
This display is extremely similar to the LTK035C5444T, but still has
some minor variations in panel initialization.
Signed-off-by: John Watts
Reviewed-by: Jessica Zhang
---
.../gpu/drm/panel/panel-newvision-nv3052c.c | 223
On 9/18/2023 5:58 AM, John Watts wrote:
The panel needs us to wait 120ms between exiting and entering sleep.
Guarantee that by always waiting 150ms before entering sleep mode.
Hi John,
Same question as the last patch -- is this a fix for something?
Thanks,
Jessica Zhang
Signed-off
-by: John Watts
Hi John,
Just wondering, is there some context to this change? I.e., was this
made to fix a specific issue?
This seems like a pretty significant increase in wait time so, if it's
not a fix, I'm not sure if this would be an improvement on the current
behavior.
Thanks,
Jessica
On 9/11/2023 2:02 AM, John Watts wrote:
SPI drivers needs their own list of compatible device IDs in order
for automatic module loading to work. Add those for this driver.
Hi John,
Reviewed-by: Jessica Zhang
Thanks,
Jessica Zhang
Signed-off-by: John Watts
---
drivers/gpu/drm/panel
e function? Otherwise this throws a
compiler warning.
With that change,
Reviewed-by: Jessica Zhang
Thanks,
Jessica Zhang
+
+ for (i = 0; i < panel_regs_len; i++) {
+ err = mipi_dbi_command(dbi, panel_regs[i].cmd,
+ panel_regs
this LGTM.
Reviewed-by: Jessica Zhang
Thanks,
Jessica Zhang
Signed-off-by: Ruihai Zhou
---
This patch base on original fixes series [1]
[1]
https://patchwork.kernel.org/project/dri-devel/cover/20230703-fix-boe-tv101wum-nl6-v3-0-bd6e9432c...@linaro.org/
---
drivers/gpu/drm/panel/panel-boe-tv10
On 9/13/2023 9:12 PM, John Watts wrote:
On Wed, Sep 13, 2023 at 02:43:43PM -0700, Jessica Zhang wrote:
Hi John,
Just curious, what do you mean by these registers being mostly unknown?
I do see them specified in the online specs -- some even seem to map to
existing MIPI_DCS_* enums (ex
On 9/13/2023 9:09 PM, John Watts wrote:
On Wed, Sep 13, 2023 at 02:34:38PM -0700, Jessica Zhang wrote:
Hi John,
Having a separate panel_regs_len field seems a bit unnecessary to me.
Looks like it's only being called in the panel prepare() and I don't seen
any reason why we shouldn't just
John,
Just curious, what do you mean by these registers being mostly unknown?
I do see them specified in the online specs -- some even seem to map to
existing MIPI_DCS_* enums (ex. 0x01 to MIPI_DCS_SOFT_RESET, and 0x04 to
MIPI_DCS_GET_DISPLAY_ID).
Thanks,
Jessica Zhang
{ 0xe3, 0x00
() and I don't
seen any reason why we shouldn't just call the ARRAY_SIZE() macro there.
Thanks,
Jessica Zhang
};
struct nv3052c {
@@ -36,12 +43,7 @@ struct nv3052c {
struct gpio_desc *reset_gpio;
};
-struct nv3052c_reg {
- u8 cmd;
- u8 val;
-};
-
-static const
.prepare = 50, /* T2 */
+ .enable = 200, /* T3 */
+ .disable = 110, /* T10 */
+ .unprepare = 1000, /* T13 */
The inclusion of the comments seems unnecessary.
Thanks,
Jessica Zhang
+ },
As I participate more actively in the drm/panel subsystem, I would
like to get notified about new changes in this area.
Since I have contributed and continue to contribute to drm/panel,
add myself as a reviewer for the DRM panel drivers to help the review
process
Signed-off-by: Jessica Zhang
Add solid_fill and pixel_source properties to DPU plane
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
b/drivers/gpu/drm/msm/disp/dpu1
Since solid fill planes allow for a NULL framebuffer in a valid commit,
add NULL framebuffer checks to atomic commit calls within DPU.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 9 ++-
drivers/gpu/drm/msm/disp/dpu1
Add solid_fill property data to the atomic plane state dump.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic.c | 4
drivers/gpu/drm/drm_plane.c | 8
include/drm/drm_plane.h | 3 +++
3 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic.c b
include/drm/drm_plane.h | 90 ++
include/uapi/drm/drm_mode.h | 24 +
13 files changed, 478 insertions(+), 112 deletions(-)
---
base-commit: 00ee72279c963989ab435b0bc90b5dc05a9aab79
change-id: 20230404-solid-fill-05016175db36
Best regards,
--
Jessica Zhang
sources will be defined in the
drm_plane_pixel_source enum.
Currently, the only pixel sources are DRM_PLANE_PIXEL_SOURCE_FB (the
default value) and DRM_PLANE_PIXEL_SOURCE_NONE.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic_state_helper.c | 1 +
drivers/gpu/drm/drm_atomic_uapi.c
to configure the alpha value for the solid fill color.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 37 +--
1 file changed, 25 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1
Add "SOLID_FILL" as a valid pixel source. If the pixel_source property is
set to "SOLID_FILL", it will display data from the drm_plane "solid_fill"
blob property.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_blend.c | 10 +
Add pixel source to the atomic plane state dump
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic.c| 1 +
drivers/gpu/drm/drm_blend.c | 1 +
drivers/gpu/drm/drm_crtc_internal.h | 1 +
3 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers
Currently framebuffer checks happen directly in
drm_atomic_plane_check(). Move these checks into their own helper
method.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic.c | 130 ---
1 file changed, 73 insertions
must be NONE or the FB must be NULL
if pixel_source == FB.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic.c| 20 +++-
drivers/gpu/drm/drm_atomic_helper.c | 36
include/drm/drm_atomic_helper.h | 4 ++--
include/drm
n:
struct drm_mode_solid_fill {
u32 r, g, b;
};
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic_state_helper.c | 9
drivers/gpu/drm/drm_atomic_uapi.c | 26 ++
drivers/gpu/drm/drm_blend.c | 30 ++
include/drm/d
On 8/8/2023 3:57 PM, Jessica Zhang wrote:
On 8/7/2023 6:07 PM, Dmitry Baryshkov wrote:
On 8 August 2023 00:41:07 GMT+03:00, Jessica Zhang
wrote:
On 8/4/2023 6:27 AM, Dmitry Baryshkov wrote:
On Fri, 28 Jul 2023 at 20:03, Jessica Zhang
wrote:
Document and add support
fore panel enable() by default. Any panel that needs DSI host to be
powered on later could then explicitly set the flag to false in their
respective drivers.
Thanks,
Jessica Zhang
I do not consider it's the right way to fix regression caused by [2]
I consider [2] should be reverted, panel
org/r/20230525-add-widebus-support-v1-0-c7069f2ef...@quicinc.com
---
Jessica Zhang (4):
drm/msm/dpu: Move setting of dpu_enc::wide_bus_en to atomic enable()
drm/msm/dpu: Enable widebus for DSI INTF
drm/msm/dsi: Add DATABUS_WIDEN MDP_CTRL2 bit
drm/msm/dsi: Enable widebus for
DSI 6G v2.5.x+ supports a data-bus widen mode that allows DSI to send
48 bits of compressed data instead of 24.
Enable this mode whenever DSC is enabled for supported chipsets.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/dsi/dsi.c | 2 +-
drivers/gpu/drm/msm/dsi/dsi.h | 1
Add a DATABUS_WIDEN bit to the MDP_CTRL2 register to allow DSI to enable
databus widen mode.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/dsi/dsi.xml.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h
b/drivers/gpu/drm
during runtime in the future.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1
DPU supports a data-bus widen mode for DSI INTF.
Enable this mode for all supported chipsets if widebus is enabled for DSI.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 7 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 2 ++
drivers
that this is a common change for a lot of patches in this series.
Thanks,
Jessica Zhang
+
#include "dpu_hwio.h"
#include "dpu_hw_catalog.h"
#include "dpu_hw_top.h"
@@ -268,16 +270,17 @@ static void _setup_mdp_ops(struct dpu_hw_mdp_ops *ops,
On 8/7/2023 6:07 PM, Dmitry Baryshkov wrote:
On 8 August 2023 00:41:07 GMT+03:00, Jessica Zhang
wrote:
On 8/4/2023 6:27 AM, Dmitry Baryshkov wrote:
On Fri, 28 Jul 2023 at 20:03, Jessica Zhang wrote:
Document and add support for solid_fill property to drm_plane. In
addition, add
On 8/2/2023 12:32 PM, Marijn Suijten wrote:
I find this title very undescriptive, it doesn't really explain from/to
where this move is happening nor why.
On 2023-08-02 11:08:48, Jessica Zhang wrote:
Move the setting of dpu_enc.wide_bus_en to
dpu_encoder_virt_atomic_enable() so
On 8/2/2023 12:39 PM, Marijn Suijten wrote:
On 2023-08-02 11:08:49, Jessica Zhang wrote:
DPU supports a data-bus widen mode for DSI INTF.
Enable this mode for all supported chipsets if widebus is enabled for DSI.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1
On 8/4/2023 6:27 AM, Dmitry Baryshkov wrote:
On Fri, 28 Jul 2023 at 20:03, Jessica Zhang wrote:
Document and add support for solid_fill property to drm_plane. In
addition, add support for setting and getting the values for solid_fill.
To enable solid fill planes, userspace must assign
On 8/2/2023 11:20 AM, Dmitry Baryshkov wrote:
On Wed, 2 Aug 2023 at 21:09, Jessica Zhang wrote:
DPU supports a data-bus widen mode for DSI INTF.
Enable this mode for all supported chipsets if widebus is enabled for DSI.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1
On 8/4/2023 6:15 AM, Sebastian Wick wrote:
On Fri, Jul 28, 2023 at 7:03 PM Jessica Zhang wrote:
Add support for pixel_source property to drm_plane and related
documentation. In addition, force pixel_source to
DRM_PLANE_PIXEL_SOURCE_FB in DRM_IOCTL_MODE_SETPLANE as to not break
legacy
On 7/31/2023 5:52 PM, Dmitry Baryshkov wrote:
On 01/08/2023 03:39, Jessica Zhang wrote:
On 7/30/2023 9:15 PM, Dmitry Baryshkov wrote:
On 28/07/2023 20:02, Jessica Zhang wrote:
Drop DPU_PLANE_COLOR_FILL_FLAG and check the DRM solid_fill property to
determine if the plane is solid fill
On 7/28/2023 5:05 PM, Dmitry Baryshkov wrote:
On 28/07/2023 20:02, Jessica Zhang wrote:
Add solid_fill property data to the atomic plane state dump.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic.c | 4
drivers/gpu/drm/drm_plane.c | 10 ++
include/drm
On 7/28/2023 5:04 PM, Dmitry Baryshkov wrote:
On 28/07/2023 20:02, Jessica Zhang wrote:
Add pixel source to the atomic plane state dump
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic.c | 1 +
drivers/gpu/drm/drm_crtc_internal.h | 2 ++
drivers/gpu/drm/drm_plane.c
On 8/4/2023 6:40 AM, Sebastian Wick wrote:
On Mon, Jul 31, 2023 at 6:01 AM Dmitry Baryshkov
wrote:
On 28/07/2023 20:02, Jessica Zhang wrote:
Document and add support for solid_fill property to drm_plane. In
addition, add support for setting and getting the values for solid_fill
On 7/31/2023 6:00 AM, Neil Armstrong wrote:
Hi,
On 26/07/2023 00:56, Jessica Zhang wrote:
Due to a recent introduction of the pre_enable_prev_first bridge flag
[1],
the panel driver will be probed before the DSI is enabled, causing the
DCS commands to fail to send.
Ensure that DSI
Add a DATABUS_WIDEN bit to the MDP_CTRL2 register to allow DSI to enable
databus widen mode.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/dsi/dsi.xml.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h
b/drivers/gpu/drm/msm/dsi/dsi.xml.h
index
rnel.org/r/20230525-add-widebus-support-v1-0-c7069f2ef...@quicinc.com
---
Jessica Zhang (4):
drm/msm/dpu: Move DPU encoder wide_bus_en setting
drm/msm/dpu: Enable widebus for DSI INTF
drm/msm/dsi: Add DATABUS_WIDEN MDP_CTRL2 bit
drm/msm/dsi: Enable widebus for DSI
driver
DSI 6G v2.5.x+ supports a data-bus widen mode that allows DSI to send
48 bits of compressed data instead of 24.
Enable this mode whenever DSC is enabled for supported chipsets.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/dsi/dsi.c | 5 +
drivers/gpu/drm/msm/dsi/dsi.h
Move the setting of dpu_enc.wide_bus_en to
dpu_encoder_virt_atomic_enable() so that it mirrors the setting of
dpu_enc.dsc.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm
DPU supports a data-bus widen mode for DSI INTF.
Enable this mode for all supported chipsets if widebus is enabled for DSI.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 11 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 4
Drop vsync_event and vsync_event_work handlers as they are unnecessary.
In addition drop the dpu_enc_ktime_template event class as it will be
unused after the vsync_event handlers are dropped.
Signed-off-by: Jessica Zhang
---
Changes in v2:
- Dropped dpu_enc_early_kickoff event
On 8/1/2023 1:37 PM, Dmitry Baryshkov wrote:
On 01/08/2023 23:18, Jessica Zhang wrote:
Drop vsync_event and vsync_event_work handlers as they are unnecessary.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 65
+
drivers/gpu
Drop vsync_event and vsync_event_work handlers as they are unnecessary.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 65 +
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 4 --
2 files changed, 1 insertion(+), 68 deletions(-)
diff
On 7/30/2023 9:15 PM, Dmitry Baryshkov wrote:
On 28/07/2023 20:02, Jessica Zhang wrote:
Drop DPU_PLANE_COLOR_FILL_FLAG and check the DRM solid_fill property to
determine if the plane is solid fill. In addition drop the DPU plane
color_fill field as we can now use drm_plane_state.solid_fill
On 7/7/2023 4:12 PM, Dmitry Baryshkov wrote:
Drop the dpu_encoder_phys_ops' destroy() callback. No phys backend
implements it anymore, so it is useless.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 18
On 7/7/2023 4:12 PM, Dmitry Baryshkov wrote:
The field dpu_plane::lock was never used for protecting any kind of
data. Drop it now.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 6 --
1 file changed, 6 deletions
On 7/7/2023 4:12 PM, Dmitry Baryshkov wrote:
Change struct allocation of encoder's phys backend data to use
drmm_kzalloc(). This removes the need to perform any actions on encoder
destruction.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp
On 7/7/2023 4:12 PM, Dmitry Baryshkov wrote:
Change struct dpu_crtc allocation to use drmm_crtc_alloc_with_planes().
This removes the need to perform any actions on CRTC destruction.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1
On 7/7/2023 4:12 PM, Dmitry Baryshkov wrote:
Change struct dpu_plane allocation to use drmm_universal_plane_alloc().
This removes the need to perform any actions on plane destruction.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1
-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c| 19 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h| 16 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c| 12 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h| 10 ++-
.../gpu/drm/msm/disp/dpu1/dpu_hw_dsc_1_2.c| 7
ies/121337/
Suggested-by: Jessica Zhang
Signed-off-by: Paloma Arellano
---
.../gpu/drm/panel/panel-visionox-vtdr6130.c | 77 ++-
1 file changed, 73 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-visionox-vtdr6130.c
b/drivers/gpu/drm/panel/panel-visiono
must be NONE or the FB must be NULL
if pixel_source == FB.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic.c| 20 +++-
drivers/gpu/drm/drm_atomic_helper.c | 34 --
drivers/gpu/drm/drm_plane.c | 16
include
Add solid_fill and pixel_source properties to DPU plane
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
b/drivers/gpu/drm/msm/disp/dpu1
n:
struct drm_mode_solid_fill {
u32 version;
u32 r, g, b;
};
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic_state_helper.c | 9 +
drivers/gpu/drm/drm_atomic_uapi.c | 55 +++
drivers/gpu/drm/drm_blend.c | 30
Add pixel source to the atomic plane state dump
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic.c| 1 +
drivers/gpu/drm/drm_crtc_internal.h | 2 ++
drivers/gpu/drm/drm_plane.c | 12
3 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm
to configure the alpha value for the solid fill color.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 24 ++--
1 file changed, 18 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
Add solid_fill property data to the atomic plane state dump.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic.c | 4
drivers/gpu/drm/drm_plane.c | 10 ++
include/drm/drm_plane.h | 3 +++
3 files changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic.c
Since solid fill planes allow for a NULL framebuffer in a valid commit,
add NULL framebuffer checks to atomic commit calls within DPU.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 9 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 41
- Added support for solid fill on planes of varying sizes
---
Jessica Zhang (10):
drm: Introduce pixel_source DRM plane property
drm: Introduce solid fill DRM plane property
drm: Add solid fill pixel source
drm/atomic: Add pixel source to plane state dump
drm/atomic
sources will be defined in the
drm_plane_pixel_source enum.
The current possible pixel sources are DRM_PLANE_PIXEL_SOURCE_NONE and
DRM_PLANE_PIXEL_SOURCE_FB with *_PIXEL_SOURCE_FB being the default value.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic_state_helper.c | 1 +
drivers/gpu
Currently framebuffer checks happen directly in
drm_atomic_plane_check(). Move these checks into their own helper
method.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic.c | 130 ---
1 file changed, 73 insertions(+), 57 deletions(-)
diff
Add "SOLID_FILL" as a valid pixel source. If the pixel_source property is
set to "SOLID_FILL", it will display data from the drm_plane "solid_fill"
blob property.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_blend.c | 10 +-
include/drm/drm_plane
Please resend under the correct email.
Thanks,
Jessica Zhang
On 7/27/2023 6:12 PM, parellan wrote:
From: Paloma Arellano
Enable display compression (DSC v1.2) and CMD mode for 1080x2400 Visionox
VTDR6130 AMOLED DSI panel. In addition, this patch will set the default
to command mode with DSC
4fb912e5e190 ("drm/bridge: Introduce pre_enable_prev_first to alter
bridge init order")
Fixes: 2349183d32d8 ("drm/panel: add visionox vtdr6130 DSI panel driver")
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/panel/panel-visionox-vtdr6130.c | 1 +
1 file changed, 1 insertion(+)
Zhang
Thanks,
Jessica Zhang
Fixes: a6dfab2738fc2 ("drm/panel: Add driver for Visionox r66451 panel")
Signed-off-by: Arnd Bergmann
---
drivers/gpu/drm/panel/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kco
On 7/7/2023 4:12 PM, Dmitry Baryshkov wrote:
Use devm_kzalloc to create VBIF data structure. This allows us to
remove corresponding kfree and drop dpu_hw_intr_destroy() function.
Hi Dmitry,
Nit: I think you mean dpu_hw_vbif_destroy() here.
Reviewed-by: Jessica Zhang
Thanks,
Jessica
On 7/7/2023 4:12 PM, Dmitry Baryshkov wrote:
Use devm_kzalloc to create interrupts data structure. This allows us to
remove corresponding kfree and drop dpu_hw_intr_destroy() function.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1
-by: Dmitry Baryshkov
Hi Dmitry,
Reviewed-by: Jessica Zhang
Thanks,
Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index
On 7/17/2023 11:04 PM, Dmitry Baryshkov wrote:
On 18/07/2023 03:30, Jessica Zhang wrote:
On 7/14/2023 6:38 PM, Dmitry Baryshkov wrote:
On 15/07/2023 03:59, Jessica Zhang wrote:
On 7/14/2023 3:30 PM, Dmitry Baryshkov wrote:
On Fri, 14 Jul 2023 at 22:03, Jessica Zhang
wrote:
On 7
On 7/14/2023 6:38 PM, Dmitry Baryshkov wrote:
On 15/07/2023 03:59, Jessica Zhang wrote:
On 7/14/2023 3:30 PM, Dmitry Baryshkov wrote:
On Fri, 14 Jul 2023 at 22:03, Jessica Zhang
wrote:
On 7/13/2023 6:23 PM, Dmitry Baryshkov wrote:
On 14/07/2023 03:21, Jessica Zhang wrote:
DSI 6G
On 7/14/2023 3:30 PM, Dmitry Baryshkov wrote:
On Fri, 14 Jul 2023 at 22:03, Jessica Zhang wrote:
On 7/13/2023 6:23 PM, Dmitry Baryshkov wrote:
On 14/07/2023 03:21, Jessica Zhang wrote:
DSI 6G v2.5.x+ and DPU 7.x+ support a data-bus widen mode that allows DSI
to send 48 bits
ich series removed it. Can you list
the relevant series as a dependency?
Thanks,
Jessica Zhang
[1]
https://elixir.bootlin.com/linux/latest/source/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c#L812
dpu_kms->hw_mdp = NULL;
}
@@ -1051,7 +1049,8 @@ static int dpu_kms_hw_in
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