Hi Jarkko,
On 17 November 2017 at 19:27, Jarkko Sakkinen
wrote:
> On Fri, Nov 17, 2017 at 03:28:53PM +0200, Jarkko Sakkinen wrote:
>
> At least signed-off-by from PrassanaKumar is missing from the 2nd
> commit. I'll add it.
I had the impression that my
Hi Bryan,
On Fri, Jan 26, 2018 at 5:04 PM, Bryan O'Donoghue
wrote:
> Bryan O'Donoghue (1):
> crypto: caam: Fix endless loop when RNG is already initialized
>
> Rui Miguel Silva (4):
> crypto: caam: Fix null dereference at error path
> crypto: caam: do not use
Signed-off-by: Corentin Labbe
---
Documentation/crypto/crypto_engine.rst | 48 ++
1 file changed, 48 insertions(+)
create mode 100644 Documentation/crypto/crypto_engine.rst
diff --git a/Documentation/crypto/crypto_engine.rst
This patch convert the stm32-cryp driver to the new crypto engine API.
Signed-off-by: Corentin Labbe
Tested-by: Fabien Dessenne
---
drivers/crypto/stm32/stm32-cryp.c | 29 +
1 file changed, 21 insertions(+), 8
This patch convert the driver to the new crypto engine API.
Signed-off-by: Corentin Labbe
---
drivers/crypto/virtio/virtio_crypto_algs.c | 16 ++--
drivers/crypto/virtio/virtio_crypto_common.h | 3 +--
drivers/crypto/virtio/virtio_crypto_core.c | 3
This patch convert the driver to the new crypto engine API.
Signed-off-by: Corentin Labbe
---
drivers/crypto/omap-aes.c | 21 +++--
drivers/crypto/omap-aes.h | 3 +++
drivers/crypto/omap-des.c | 24 ++--
3 files changed, 36
This patch convert the stm32-hash driver to the new crypto engine API.
Signed-off-by: Corentin Labbe
Tested-by: Fabien Dessenne
---
drivers/crypto/stm32/stm32-hash.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
Hello
The current crypto_engine support only ahash and ablkcipher request.
My first patch which try to add skcipher was Nacked, it will add too many
functions
and adding other algs(aead, asymetric_key) will make the situation worst.
This patchset remove all algs specific stuff and now only
The crypto engine could actually only enqueue hash and ablkcipher request.
This patch permit it to enqueue any type of crypto_async_request.
Signed-off-by: Corentin Labbe
Tested-by: Fabien Dessenne
---
crypto/crypto_engine.c | 301
From: Rui Miguel Silva
Add CAAM clock so that we could use the Cryptographic Acceleration and
Assurance Module (CAAM) hardware block.
Signed-off-by: Rui Miguel Silva
Cc: "Horia Geantă"
Cc: Aymen Sghaier
commit 1005bccd7a4a ("crypto: caam - enable instantiation of all RNG4 state
handles") introduces a control when incrementing ent_delay which contains
the following comment above it:
/*
* If either SH were instantiated by somebody else
* (e.g. u-boot) then it is assumed that the entropy
*
From: Rui Miguel Silva
I.MX7x only use two clocks for the CAAM module, so make sure we do not try to
use the mem and the emi_slow clock when running in that imx7d and imx7s machine
type.
[bod: fixed minor trailing whitespace issue]
Signed-off-by: Rui Miguel Silva
From: Rui Miguel Silva
Add CAAM device node to the i.MX7s device tree.
Signed-off-by: Rui Miguel Silva
Cc: "Horia Geantă"
Cc: Aymen Sghaier
Cc: Fabio Estevam
Cc: Peng Fan
From: Rui Miguel Silva
caam_remove already removes the debugfs entry, so we need to remove the one
immediately before calling caam_remove.
This fix a NULL dereference at error paths is caam_probe fail.
[bod: changed name prefix to "crypto: caam: Fix .."]
[bod: added Fixes
V2-resend:
- Patch 0005 lost in the ether - resending
V2:
- Endian detection is ok with TrustZone enabled Horia.
Endian detection logic tested with TrustZone enabled. The register that
this relies on though isn't affected by the lock-down in the first page.
Assuming set of affected
On Fri, Jan 26, 2018 at 12:05:42PM +0300, Yury Norov wrote:
> On Wed, Jan 24, 2018 at 10:22:13AM +, Will Deacon wrote:
> > On Wed, Jan 24, 2018 at 12:05:16PM +0300, Yury Norov wrote:
> > > This series adds API for 128-bit memory IO access and enables it for
> > > ARM64.
> > > The original
From: Rui Miguel Silva
caam_remove already removes the debugfs entry, so we need to remove the one
immediately before calling caam_remove.
This fix a NULL dereference at error paths is caam_probe fail.
[bod: changed name prefix to "crypto: caam: Fix .."]
[bod: added Fixes
From: Rui Miguel Silva
Add CAAM device node to the i.MX7s device tree.
Signed-off-by: Rui Miguel Silva
Cc: "Horia Geantă"
Cc: Aymen Sghaier
Cc: Fabio Estevam
Cc: Peng Fan
From: Rui Miguel Silva
I.MX7x only use two clocks for the CAAM module, so make sure we do not try to
use the mem and the emi_slow clock when running in that imx7d and imx7s machine
type.
[bod: fixed minor trailing whitespace issue]
Signed-off-by: Rui Miguel Silva
From: Rui Miguel Silva
Add CAAM clock so that we could use the Cryptographic Acceleration and
Assurance Module (CAAM) hardware block.
Signed-off-by: Rui Miguel Silva
Cc: "Horia Geantă"
Cc: Aymen Sghaier
commit 1005bccd7a4a ("crypto: caam - enable instantiation of all RNG4 state
handles") introduces a control when incrementing ent_delay which contains
the following comment above it:
/*
* If either SH were instantiated by somebody else
* (e.g. u-boot) then it is assumed that the entropy
*
V2:
- Endian detection is ok with TrustZone enabled Horia.
Endian detection logic tested with TrustZone enabled. The register that
this relies on though isn't affected by the lock-down in the first page.
Assuming set of affected registers is actually just the 'deco' registers
though there
On Thu, Jan 18, 2018 at 08:41:09PM +0100, Stephan Müller wrote:
> Hi Herbert,
>
> Sorry, I forgot to CC you on this patch -- v2 is unchanged from the
> original patch. It only adds you in copy.
>
> ---8<---
>
> GCM can be invoked with a zero destination buffer. This is possible if
> the AAD and
On Tue, Jan 16, 2018 at 08:41:58AM +0100, Antoine Tenart wrote:
> From: Colin Ian King
>
> The function safexcel_try_push_requests is local to the source and does
> not need to be in global scope, so make it static.
>
> Cleans up sparse warning:
> symbol
On Wed, Jan 17, 2018 at 11:26:47AM +, Wei Yongjun wrote:
> devm_ioremap_resource() already checks if the resource is NULL, so
> remove the unnecessary platform_get_resource() error check.
>
> Signed-off-by: Wei Yongjun
Patch applied. Thanks.
--
Email: Herbert Xu
On Tue, Jan 16, 2018 at 03:26:13PM +0100, Kamil Konieczny wrote:
> Async hash operations can use result pointer in final/finup/digest,
> but not in init/update/export/import, so test it for misuse.
>
> Signed-off-by: Kamil Konieczny
Patch applied. Thanks.
--
On Wed, Jan 17, 2018 at 07:50:56PM +0100, Corentin Labbe wrote:
> Since CRYPTO_SHA384 does not exists, Kconfig should not select it.
> Anyway, all SHA384 stuff is in CRYPTO_SHA512 which is already selected.
>
> Fixes: a21eb94fc4d3i ("crypto: axis - add ARTPEC-6/7 crypto accelerator
> driver")
>
On Wed, Jan 17, 2018 at 11:40:34AM +, Wei Yongjun wrote:
> There is a error message within devm_ioremap_resource
> already, so remove the dev_err call to avoid redundant
> error message.
>
> Signed-off-by: Wei Yongjun
Patch applied. Thanks.
--
Email: Herbert Xu
On Fri, Jan 19, 2018 at 12:04:32PM +, Ard Biesheuvel wrote:
> This supersedes all outstanding patches from me related to SHA-3, SHA-512
> or SM-3.
>
> - fix a correctness issue in the SHA-3 code (#1) and a performance issue (#2),
> the first one is definitely a -stable candidate, the second
On Sat, Jan 20, 2018 at 12:53:15AM +0300, Alexey Khoroshilov wrote:
> If clk_get() fails, device_remove_file() looks inappropriate.
>
> The error path, where all crypto_register fail, misses resource
> deallocations.
>
> Found by Linux Driver Verification project (linuxtesting.org).
>
>
On Wed, Jan 17, 2018 at 11:40:24AM +, Wei Yongjun wrote:
> There is a error message within devm_ioremap_resource
> already, so remove the dev_err call to avoid redundant
> error message.
>
> Signed-off-by: Wei Yongjun
Patch applied. Thanks.
--
Email: Herbert Xu
On Thu, Jan 18, 2018 at 09:58:13AM +0100, LABBE Corentin wrote:
>
> I have two way of adding a new netlink request
> - keep the current patch and simply add a new CRYPTO_MSG_GETSTAT which use
> the same function than CRYPTO_MSG_GETALG
> => minimal changes, in fact CRYPTO_MSG_GETSTAT and
Performing the hash of an empty file leads to a kernel Oops
[ 44.504600] Unable to handle kernel paging request for data at address
0x000c
[ 44.512819] Faulting instruction address: 0xc02d2be8
[ 44.524088] Oops: Kernel access of bad area, sig: 11 [#1]
[ 44.529171] BE PREEMPT CMPC885
On Wed, Jan 24, 2018 at 10:22:13AM +, Will Deacon wrote:
> On Wed, Jan 24, 2018 at 12:05:16PM +0300, Yury Norov wrote:
> > This series adds API for 128-bit memory IO access and enables it for ARM64.
> > The original motivation for 128-bit API came from new Cavium network device
> > driver. The
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