Hi Kim
-Original Message-
From: Kim Phillips [mailto:kim.phill...@freescale.com]
Sent: Thursday, June 12, 2014 4:23 AM
To: Gupta Ruchika-R66431
Cc: linux-crypto@vger.kernel.org; herb...@gondor.apana.org.au
Subject: Re: [PATCH] crypto:caam - Modify width of few read only registers
On Thu, 12 Jun 2014 04:56:14 -0500
Gupta Ruchika-R66431 ruchika.gu...@freescale.com wrote:
From: Kim Phillips [mailto:kim.phill...@freescale.com]
Sent: Thursday, June 12, 2014 4:23 AM
/* Check to see if QI present. If so, enable */
- ctrlpriv-qi_present =
On Tue, 29 Apr 2014 15:34:37 +0530
Ruchika Gupta ruchika.gu...@freescale.com wrote:
Few read only registers like CHAVID, CTPR etc were wrongly defined
as 64 bit registers. This functioned properly on the powerpc platforms.
However ARM SoC's wouldn't function correctly if these registers
are
08, 2014 5:25 AM
To: Gupta Ruchika-R66431
Cc: linux-crypto@vger.kernel.org; herb...@gondor.apana.org.au
Subject: Re: [PATCH] crypto:caam - Modify width of few read only registers
On Tue, 6 May 2014 23:09:15 -0500
Gupta Ruchika-R66431 ruchika.gu...@freescale.com wrote:
Hi Kim,
Hi Ruchika
On Thursday, May 08, 2014 at 01:54:42 AM, Kim Phillips wrote:
[...]
In the first version of guide they were defined as 64 bit. They were
later changed to 32 bit once issue was reported while testing on
emulator. Latest guide of LS2100 has them modified. A register width
column has also
On Tue, 6 May 2014 23:09:15 -0500
Gupta Ruchika-R66431 ruchika.gu...@freescale.com wrote:
Hi Kim,
Hi Ruchika,
From: Kim Phillips [mailto:kim.phill...@freescale.com]
Sent: Wednesday, May 07, 2014 2:02 AM
On Tue, 6 May 2014 05:11:23 -0500
Gupta Ruchika-R66431
On Tue, 6 May 2014 05:11:23 -0500
Gupta Ruchika-R66431 ruchika.gu...@freescale.com wrote:
From: Kim Phillips [mailto:kim.phill...@freescale.com]
Sent: Friday, May 02, 2014 2:15 AM
On Tue, 29 Apr 2014 15:34:37 +0530
Ruchika Gupta ruchika.gu...@freescale.com wrote:
Few read only
Hi Kim,
-Original Message-
From: Kim Phillips [mailto:kim.phill...@freescale.com]
Sent: Wednesday, May 07, 2014 2:02 AM
To: Gupta Ruchika-R66431
Cc: linux-crypto@vger.kernel.org; herb...@gondor.apana.org.au
Subject: Re: [PATCH] crypto:caam - Modify width of few read only registers
On Tue, 29 Apr 2014 15:34:37 +0530
Ruchika Gupta ruchika.gu...@freescale.com wrote:
Few read only registers like CHAVID, CTPR etc were wrongly defined
as 64 bit registers. This functioned properly on the powerpc platforms.
However ARM SoC's wouldn't function correctly if these registers
are
Few read only registers like CHAVID, CTPR etc were wrongly defined
as 64 bit registers. This functioned properly on the powerpc platforms.
However ARM SoC's wouldn't function correctly if these registers
are defined as 64 bit. So correcting the definition to two 32 bit registers.
Signed-off-by:
Few read only registers like CHAVID, CTPR etc were wrongly defined
as 64 bit registers. This functioned properly on the powerpc platforms.
However ARM SoC's wouldn't function correctly if these registers
are defined as 64 bit. So correcting the definition to two 32 bit registers.
Signed-off-by:
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