On Thu, Apr 18, 2019 at 6:26 AM damon wrote:
>
> Use the number of addresses to define the relevant macros.
>
> Signed-off-by: damon
> ---
> arch/riscv/include/asm/pgtable-32.h | 2 ++
> arch/riscv/include/asm/pgtable-64.h | 3 ++-
> arch/riscv/include/asm/pgtable.h| 4 ++--
> 3 files
This patch adds SCAUSE interrupt flag and SCAUSE interrupt related
defines to asm/csr.h. We also use these defines in kernel/irq.c and
express SIE/SIP flags in-terms of SCAUSE interrupt causes.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/csr.h | 25 +
arch/riscv
.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/csr.h | 32 ++--
arch/riscv/include/asm/irqflags.h| 10 -
arch/riscv/include/asm/mmu_context.h | 7 +-
arch/riscv/kernel/entry.S| 22 +--
arch/riscv/kernel/head.S
The spacing between macro name and value is not consistent in
asm/csr.h. This patch beautifies asm/csr.h by using tabs to align
macro values instead of spaces.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/csr.h | 76 ++--
1 file changed, 38 insertions
nce v2:
- Dropped PATCH1 which added asm/encoding.h
- Added new PATCH1 which beautifies asm/csr.h by using tabs to
align macro values
Changes since v1:
- Squash PATCH2 into cpatch3
- Added new PATCH2 to add interrupt related SCAUSE defines
in asm/encoding.h
Anup Patel (3):
RISC-V: Use tabs to
On Mon, Apr 15, 2019 at 11:19 AM Christoph Hellwig wrote:
>
> On Sat, Apr 13, 2019 at 03:38:35PM +, Anup Patel wrote:
> > It's better to have all RISC-V spec related defines in one place
> > so this patch adds separate asm/encoding.h for such defines which
> > can
This patch adds SCAUSE interrupt flag and SCAUSE interrupt cause
related defines to asm/encoding.h. We also use these defines in
arch/riscv/kernel/irq.c and express SIE/SIP flag in-terms of
interrupt causes.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/encoding.h | 25
.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/csr.h | 15 ---
arch/riscv/include/asm/encoding.h| 16
arch/riscv/include/asm/irqflags.h| 10 +-
arch/riscv/include/asm/mmu_context.h | 7 +--
arch/riscv/kernel/entry.S| 22
nce v1:
- Squash PATCH2 into cpatch3
- Added new PATCH2 to add interrupt related SCAUSE defines
in asm/encoding.h
Anup Patel (3):
RISC-V: Add separate asm/encoding.h for spec related defines
RISC-V: Add interrupt related SCAUSE defines in asm/encoding.h
RISC-V: Access CSRs using CSR numbers
It's better to have all RISC-V spec related defines in one place
so this patch adds separate asm/encoding.h for such defines which
can be included in assembly as well as C code.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/csr.h | 52 +-
arch/riscv/include
On Sat, Apr 13, 2019 at 1:25 PM Christoph Hellwig wrote:
>
> On Sat, Apr 13, 2019 at 07:39:44AM +, Anup Patel wrote:
> > We should prefer accessing CSRs using their CSR numbers because:
> > 1. It compiles fine with older toolchains.
> > 2. We can use latest CSR name
On Sat, Apr 13, 2019 at 1:23 PM Christoph Hellwig wrote:
>
> On Sat, Apr 13, 2019 at 07:39:35AM +, Anup Patel wrote:
> > It's better to have all RISC-V spec related defines in one place
> > so this patch adds separate asm/encoding.h for such defines which
> > can
On Sat, Apr 13, 2019 at 1:24 PM Christoph Hellwig wrote:
>
> I think this should be merged with the next patch. Also please
> only add the CSRs that we actually use.
Sure, will do.
Regards,
Anup
. sptbr => CSR_SATP, sbadaddr => CSR_STVAL, etc.)
3. We can access newly added CSRs even if toolchain does not recognize
newly addes CSRs by name. (e.g. BSSTATUS, BSIE, SSIP, etc.)
The patchset can be found in riscv_csr_number_v1 branch of
https//github.com/avpatel/linux.git
Anup Patel (3):
Each CSR is encoded as 12bit number in RISC-V instructions. This patch
adds defines for CSR numbers to allow us access CSRs using CSR numbers.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/encoding.h | 237 ++
1 file changed, 237 insertions(+)
diff --git
.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/csr.h | 15 ---
arch/riscv/include/asm/irqflags.h| 10 +-
arch/riscv/include/asm/mmu_context.h | 2 +-
arch/riscv/kernel/entry.S| 22 +++---
arch/riscv/kernel/head.S
It's better to have all RISC-V spec related defines in one place
so this patch adds separate asm/encoding.h for such defines which
can be included in assembly as well as C code.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/csr.h | 52 +-
arch/riscv/include
On Tue, Apr 9, 2019 at 10:14 PM Palmer Dabbelt wrote:
>
> On Tue, 12 Mar 2019 15:08:12 PDT (-0700), Anup Patel wrote:
> > This patch adds rv32_defconfig for 32bit systems. The only
> > difference between rv32_defconfig and defconfig is that
> > rv32_defconfig has CONFIG_
On Tue, Apr 9, 2019 at 10:17 PM Palmer Dabbelt wrote:
>
> On Tue, 12 Mar 2019 15:08:16 PDT (-0700), Anup Patel wrote:
> > The setup_vm() must access kernel symbols in a position independent way
> > because it will be called from head.S with MMU off.
> >
> > If we com
> -Original Message-
> From: Guo Ren
> Sent: Tuesday, April 9, 2019 8:33 AM
> To: Anup Patel
> Cc: Palmer Dabbelt ; Albert Ou
> ; linux-kernel@vger.kernel.org; Mike Rapoport
> ; Christoph Hellwig ; Atish Patra
> ; Gary Guo ; Paul Walmsley
> ; linux-ri...@li
On Sat, Apr 6, 2019 at 2:47 AM Palmer Dabbelt wrote:
>
> On Thu, 04 Apr 2019 23:01:11 PDT (-0700), a...@brainfault.org wrote:
> > On Fri, Apr 5, 2019 at 11:24 AM Christoph Hellwig
> > wrote:
> >>
> >> On Fri, Apr 05, 2019 at 05:49:34AM +, Anup Patel wrote
On Fri, Apr 5, 2019 at 11:24 AM Christoph Hellwig wrote:
>
> On Fri, Apr 05, 2019 at 05:49:34AM +, Anup Patel wrote:
> > The Maximum Physical Memory 2GiB option for 64bit systems is currently
> > broken because kernel hangs at boot-time when this option is enabled
>
fixes above issue by removing unusable memory region in
setup_bootmem().
Signed-off-by: Anup Patel
Reviewed-by: Christoph Hellwig
---
Changes since v2:
- Drop brackets in if() condition added by this patch
Changes since v1:
- Use memblock_remove() instead of memblock_reserve()
---
arch/riscv/mm
_t pmd)
> +{
> + return pmd_present(pmd)
> + && (pmd_val(pmd) & (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC));
> +}
> +
> static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
> {
> *pmdp = pmd;
> --
> 2.20.1
>
Looks good to me.
Reviewed-by: Anup Patel
Regards,
Anup
On Tue, Apr 2, 2019 at 2:05 PM Mike Rapoport wrote:
>
> On Tue, Apr 02, 2019 at 06:02:38AM +, Anup Patel wrote:
> > The Maximum Physical Memory 2GiB option for 64bit systems is currently
> > broken because kernel hangs at boot-time when this option is enabled
> > and t
fixes above issue by removing unusable memory region in
setup_bootmem().
Signed-off-by: Anup Patel
---
Changes since v1:
- Use memblock_remove() instead of memblock_reserve()
---
arch/riscv/mm/init.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm
On Tue, Apr 2, 2019 at 2:05 PM Mike Rapoport wrote:
>
> On Tue, Apr 02, 2019 at 06:02:38AM +, Anup Patel wrote:
> > The Maximum Physical Memory 2GiB option for 64bit systems is currently
> > broken because kernel hangs at boot-time when this option is enabled
> > and t
fixes above issue by reserving unusable memory region in
setup_bootmem().
Signed-off-by: Anup Patel
---
arch/riscv/mm/init.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 5fd8c922e1c2..6b063f20a9d0 100644
--- a/arch/riscv/mm/init.c
Hi Palmer,
On Fri, Mar 29, 2019 at 11:48 AM Palmer Dabbelt wrote:
>
> On Fri, 22 Mar 2019 06:25:09 PDT (-0700), Christoph Hellwig wrote:
> > Looks good,
> >
> > Reviewed-by: Christoph Hellwig
>
> Thanks. I've added this to my fixes list for the next RC.
I have another RC fix as well:
"[PATCH
On Fri, Mar 29, 2019 at 10:34 AM Paul Walmsley wrote:
>
>
> On Thu, 28 Mar 2019, Anup Patel wrote:
>
> > Signed-off-by: Gary Guo
> > Signed-off-by: Anup Patel
> > ---
> > Changes since v1:
> > - We adapt good aspects from Gary Guo's ASID allocator i
in
performance.
Co-developed-by:: Gary Guo
Signed-off-by: Anup Patel
---
Changes since v2:
- Move to lazy TLB flushing because we get slow path warnings if we
use flush_tlb_all()
- Don't set ASID bits to all 1s in head.s. Instead just do it on
boot CPU calling asids_init() for determining number
On Thu, Mar 28, 2019 at 8:03 PM Gary Guo wrote:
>
>
>
> On 28/03/2019 14:13, Anup Patel wrote:
> > On Thu, Mar 28, 2019 at 7:07 PM Gary Guo wrote:
> >>
> >> Hi Anup,
> >>
> >> The code still does not use ASID in TLB flush routines. Wit
On Thu, Mar 28, 2019 at 8:00 PM Gary Guo wrote:
>
>
>
> On 28/03/2019 14:09, Anup Patel wrote:
> > On Thu, Mar 28, 2019 at 7:07 PM Gary Guo wrote:
> >>
> >> Hi Anup,
> >>
> >> The code still does not use ASID in TLB flush routines. Wit
ystems. 32-bit CONTEXTID may overflow in a month time.
>
> Please all see my inline comments.
>
> Best,
> Gary
>
> On 28/03/2019 06:32, Anup Patel wrote:
> > Currently, we do local TLB flush on every MM switch. This is very harsh
> > on performance because
overflow in a month time?
>
> Please all see my inline comments.
>
> Best,
> Gary
>
> On 28/03/2019 06:32, Anup Patel wrote:
> > Currently, we do local TLB flush on every MM switch. This is very harsh
> > on performance because we are forcing page table walks afte
On Thu, Mar 28, 2019 at 3:22 PM Anup Patel wrote:
>
> On Thu, Mar 28, 2019 at 1:25 PM Mike Rapoport wrote:
> >
> > On Wed, Mar 27, 2019 at 12:54:41AM -0700, Christoph Hellwig wrote:
> > > On Mon, Mar 25, 2019 at 09:46:59PM +0530, Anup Patel wrote:
> > > &
aligned version of va_pa_offset such that all of the physical
> address space will be mapped.
>
> Signed-off-by: Logan Gunthorpe
> Cc: Palmer Dabbelt
> Cc: Albert Ou
> Cc: Anup Patel
> Cc: Atish Patra
> Cc: Paul Walmsley
> Cc: Zong Li
> Cc: Mike Rapoport
> ---
>
On Thu, Mar 28, 2019 at 1:25 PM Mike Rapoport wrote:
>
> On Wed, Mar 27, 2019 at 12:54:41AM -0700, Christoph Hellwig wrote:
> > On Mon, Mar 25, 2019 at 09:46:59PM +0530, Anup Patel wrote:
> > > > Why do you even care about kernel mappings for non-existant ram.
>
TLBs provided by QEMU. Unfortunately, ASID bits of SATP CSR
are not implemented on SiFive Unleashed board so we don't see any change
in performance.
Signed-off-by: Gary Guo
Signed-off-by: Anup Patel
---
Changes since v1:
- We adapt good aspects from Gary Guo's ASID allocator implementation
fix that issue? It's somewhere in my
> email queue...
That was a patch I submitted to fix overlapping FIXMAP and VMALLOC
regions.
This patch does not consider FIXMAP region.
I suggest we introduce asm/memory.h where we have all critical defines
related to virtual memory layout. Also, t
On Wed, Mar 27, 2019 at 7:39 PM Gary Guo wrote:
>
> I think my code already get all the caveats cases covered. The only
> thing my code is missing is handling the case when ASID is not
> supported. Maybe it is better to work based on that instead?
Well, I have also spend enough time hardening
On Wed, Mar 27, 2019 at 7:08 PM Gary Guo wrote:
>
> On 27/03/2019 11:42, Anup Patel wrote:
> > On Wed, Mar 27, 2019 at 4:57 PM Gary Guo wrote:
> >>
> >> Hi Anup,
> >>
> >> This won't work in an actual hardware with ASID supp
On Wed, Mar 27, 2019 at 7:12 PM Gary Guo wrote:
>
> I would also like to mention that your code assumes 64-bit atomics
> support which we don't have on 32-bit systems. Using 32-bit to track
> ASID generations isn't sufficient and will cause overflows. That's why I
> have asid_generation_overflow
On Wed, Mar 27, 2019 at 4:57 PM Gary Guo wrote:
>
> Hi Anup,
>
> This won't work in an actual hardware with ASID support. There're more
Can you elaborate why?
This implementation is based on Linux ARM64 ASID allocator which is
tested for large number of CPUs on real HW.
> interactions with TLB
and ASIDs provided by QEMU. Unfortunately, ASID bits
of SATP CSR are not implemented on SiFive Unleashed board so we don't
see any change in performance.
Signed-off-by: Anup Patel
---
This patch is based on Linux-5.1-rc2 and TLB flush cleanup patches v4
from Gary Guo. It can be also found
ot;RISC-V: Move setup_vm() to mm/init.c")
Suggested-by: Christoph Hellwig
Suggested-by: Mike Rapoport
Signed-off-by: Anup Patel
Reviewed-by: Mike Rapoport
Reviewed-by: Christoph Hellwig
---
v4: Use "#error" for setup_vm() compiled without cmodel=medany
v3: Don't use CFLAG &
On Tue, Mar 26, 2019 at 7:52 AM Palmer Dabbelt wrote:
>
> On Mon, 25 Mar 2019 00:01:45 PDT (-0700), a...@brainfault.org wrote:
> > On Mon, Mar 25, 2019 at 12:18 PM Christoph Hellwig
> > wrote:
> >>
> >> On Mon, Mar 25, 2019 at 01:25:50PM +0800, Alan Kao wrote:
> >> > Hi Anup,
> >> >
> >> >
On Mon, Mar 25, 2019 at 5:08 PM Christoph Hellwig wrote:
>
> > +ifdef CONFIG_FTRACE
> > +CFLAGS_REMOVE_init.o = -pg
> > +endif
> > +
> > obj-y += init.o
> > obj-y += fault.o
> > obj-y += extable.o
> > obj-y += ioremap.o
> > obj-y += cacheflush.o
> > +
> > +CFLAGS_init.o := -mcmodel=medany
>
On Mon, Mar 25, 2019 at 8:29 PM Christoph Hellwig wrote:
>
> On Mon, Mar 25, 2019 at 06:18:45PM +0530, Anup Patel wrote:
> > We trying to addresses following issues in current code:
> > 1. The current setup_vm() maps all possible kernel virtual addresses (128GB
> >
On Mon, Mar 25, 2019 at 5:09 PM Christoph Hellwig wrote:
>
> I'm still not sold on this at all. It is a lot more code, a lot harder
> to read code and all for a very narrow corner case that isn't even
> going to be enabled in default configs.
In case you missed my previous response about why
On Mon, Mar 25, 2019 at 5:09 PM Christoph Hellwig wrote:
>
> I'm still not sold on this at all. It is a lot more code, a lot harder
> to read code and all for a very narrow corner case that isn't even
> going to be enabled in default configs.
The old page table setup code does not exist
memblock setup, we map all available memory banks.
With this patch in-place, the booting constraint for RISCV32 and RISCV64
kernel is much more relaxed when CONFIG_BOOT_PAGE_ALIGNED=y and we can
now boot kernel very close to RAM start thereby minimizng memory wastage.
Signed-off-by: Anup Patel
---
arch
le
- Added PATCH5 to fix memory reservation in setup_bootmem()
Anup Patel (4):
RISC-V: Add separate defconfig for 32bit systems
RISC-V: Fix memory reservation in setup_bootmem()
RISC-V: Remove redundant trampoline page table
RISC-V: Allow booting kernel from any 4KB aligned address
arch/ris
Rapoport
Signed-off-by: Anup Patel
Reviewed-by: Christoph Hellwig
---
arch/riscv/mm/init.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 8cf9ff1f9058..3e66b7cb3a61 100644
--- a/arch/riscv/mm/init.c
+++ b/arch
to above, this patch removes trampoline page table and related code
from kernel/head.S and mm/init.c.
Signed-off-by: Anup Patel
---
arch/riscv/kernel/head.S | 13 -
arch/riscv/mm/init.c | 10 --
2 files changed, 4 insertions(+), 19 deletions(-)
diff --git a/arch/riscv/kernel
This patch adds rv32_defconfig for 32bit systems. The only
difference between rv32_defconfig and defconfig is that
rv32_defconfig has CONFIG_ARCH_RV32I=y.
Signed-off-by: Anup Patel
---
arch/riscv/configs/rv32_defconfig | 84 +++
1 file changed, 84 insertions
1e9e946f0b ("RISC-V: Move setup_vm() to mm/init.c")
Suggested-by: Christoph Hellwig
Suggested-by: Mike Rapoport
Signed-off-by: Anup Patel
Reviewed-by: Mike Rapoport
---
v3: Don't use CFLAG "-pg" for mm/init.o
v2: Removed CFLAGS_setup.o from kernel/Makefile and replaced SoBs
-
On Mon, Mar 25, 2019 at 12:18 PM Christoph Hellwig wrote:
>
> On Mon, Mar 25, 2019 at 01:25:50PM +0800, Alan Kao wrote:
> > Hi Anup,
> >
> > Sorry for being late to the party. I think one more thing should
> > move together with setup_vm():
>
> Ah, I wonded about that yesterday but wasn't sure.
On Mon, Mar 25, 2019 at 10:56 AM Alan Kao wrote:
>
> Hi Anup,
>
> Sorry for being late to the party. I think one more thing should
> move together with setup_vm():
>
> On Mon, Mar 25, 2019 at 03:37:38AM +, Anup Patel wrote:
> > The Linux RISC-V 32bit kernel is bro
On Sat, Mar 23, 2019 at 9:15 PM Mike Rapoport wrote:
>
> On Thu, Mar 21, 2019 at 09:47:47AM +, Anup Patel wrote:
> > The setup_vm() must access kernel symbols in a position independent way
> > because it will be called from head.S with MMU off.
> >
> > If we com
On Fri, Mar 22, 2019 at 7:03 PM Christoph Hellwig wrote:
>
> >
> > - /* Compute satp for kernel page tables, but don't load it yet */
> > + /* Compute satp for kernel page directory, but don't load it yet */
>
>
> > /*
> > - * Load trampoline page directory, which will cause us
=medany for mm/init.c
2. Moving remaing MM-related stuff va_pa_offset, pfn_base and
empty_zero_page from kernel/setup.c to mm/init.c
Fixes: 6f1e9e946f0b ("RISC-V: Move setup_vm() to mm/init.c")
Suggested-by: Christoph Hellwig
Suggested-by: Mike Rapoport
Signed-off-by: Anup Patel
---
v
On Mon, Mar 25, 2019 at 12:44 AM Gary Guo wrote:
>
>
>
> > -Original Message-
> > From: linux-riscv On Behalf Of
> > Anup
> > Patel
> > Sent: Sunday, March 24, 2019 11:08
> > To: Palmer Dabbelt ; Albert Ou
> > Cc: Anup Patel ; linux-ke
On Sun, Mar 24, 2019 at 8:27 PM Christoph Hellwig wrote:
>
> On Sun, Mar 24, 2019 at 11:08:29AM +, Anup Patel wrote:
> > Signed-off-by: Christoph Hellwig
> > Signed-off-by: Mike Rapoport
>
> Huh? I don't think this is from Mike and me.
>
> > +unsigned long
On Sun, Mar 24, 2019 at 10:13 PM Mike Rapoport wrote:
>
> On Sun, Mar 24, 2019 at 03:57:08PM +0100, Christoph Hellwig wrote:
> > On Sun, Mar 24, 2019 at 11:08:29AM +, Anup Patel wrote:
> > > Signed-off-by: Christoph Hellwig
> > > Signed-off-by: Mike Rapopor
=medany for mm/init.c
2. Moving remaing MM-related stuff va_pa_offset, pfn_base and
empty_zero_page from kernel/setup.c to mm/init.c
Fixes: 6f1e9e946f0b ("RISC-V: Move setup_vm() to mm/init.c")
Signed-off-by: Christoph Hellwig
Signed-off-by: Mike Rapoport
Signed-off-by: Anup Patel
---
On Sat, Mar 23, 2019 at 10:54 PM Christoph Hellwig wrote:
>
> On Sat, Mar 23, 2019 at 05:40:12PM +0200, Mike Rapoport wrote:
> > I have no general objection, but I presume the patch will be significantly
> > simplified if the addition of 4K pages support will follow the removal of
> > the
On Sat, Mar 23, 2019 at 9:10 PM Mike Rapoport wrote:
>
> On Thu, Mar 21, 2019 at 09:47:51AM +, Anup Patel wrote:
> > Currently, we have to boot RISCV64 kernel from a 2MB aligned physical
> > address and RISCV32 kernel from a 4MB aligned physical address. This
> > const
p_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
> "clockevents/riscv/timer:starting",
> --
> 2.21.0
>
Looks good to me.
It would be great if you can add "Fixes:" line and
"Cc: sta...@vger.kernel.org"
Reviewed-by: Anup Patel
Regards,
Anup
On Fri, Mar 22, 2019 at 6:55 PM Christoph Hellwig wrote:
>
> Looks good,
>
> Reviewed-by: Christoph Hellwig
>
> Btw, what is the 32-bit test vehicle of choice? qemu with the
> virt machine?
Yes, for now QEMU seems to be only the option.
I am not aware of any board we can purchase for RV32.
: f2c17aabc917 ("RISC-V: Implement compile-time fixed mappings")
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/fixmap.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/include/asm/fixmap.h b/arch/riscv/include/asm/fixmap.h
index 5cf53dd882e5..9c
to above, this patch removes trampoline page table and related code
from kernel/head.S and mm/init.c.
Signed-off-by: Anup Patel
---
arch/riscv/kernel/head.S | 13 ++-
arch/riscv/mm/init.c | 79
2 files changed, 19 insertions(+), 73 deletions(-)
diff
memblock setup, we map all available memory banks.
With this patch in-place, the booting constraint for RISCV32 and RISCV64
kernel is much more relaxed when CONFIG_BOOT_PAGE_ALIGNED=y and we can
now boot kernel very close to RAM start thereby minimizng memory wastage.
Signed-off-by: Anup Patel
---
arch
Rapoport
Signed-off-by: Anup Patel
---
arch/riscv/mm/init.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 2e2f2567964c..99b42380d17d 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -18,6 +18,8
addressing.
Fixes: 6f1e9e946f0b ("RISC-V: Move setup_vm() to mm/init.c")
Signed-off-by: Anup Patel
---
arch/riscv/kernel/head.S | 1 +
arch/riscv/mm/init.c | 73 ++--
2 files changed, 49 insertions(+), 25 deletions(-)
diff --git a/arch/riscv/ker
based on load address alignment
- Added PATCH4 to remove redundant trampoline page table
- Added PATCH5 to fix memory reservation in setup_bootmem()
Anup Patel (5):
RISC-V: Add separate defconfig for 32bit systems
RISC-V: Make setup_vm() independent of GCC code model
RISC-V: Allow booting
This patch adds rv32_defconfig for 32bit systems. The only
difference between rv32_defconfig and defconfig is that
rv32_defconfig has CONFIG_ARCH_RV32I=y.
Signed-off-by: Anup Patel
---
arch/riscv/configs/rv32_defconfig | 84 +++
1 file changed, 84 insertions
On Mon, Mar 18, 2019 at 12:48 PM Mike Rapoport wrote:
>
> On Sat, Mar 16, 2019 at 04:55:30AM +0530, Anup Patel wrote:
> > On Fri, Mar 15, 2019 at 9:52 PM Anup Patel wrote:
> > >
> > > On Fri, Mar 15, 2019 at 9:28 PM Mike Rapoport wrote:
> > > >
> >
On Fri, Mar 15, 2019 at 9:52 PM Anup Patel wrote:
>
> On Fri, Mar 15, 2019 at 9:28 PM Mike Rapoport wrote:
> >
> > On Thu, Mar 14, 2019 at 11:28:32PM +0530, Anup Patel wrote:
> > > On Thu, Mar 14, 2019 at 12:23 PM Mike Rapoport wrote:
> > > >
> >
On Fri, Mar 15, 2019 at 9:28 PM Mike Rapoport wrote:
>
> On Thu, Mar 14, 2019 at 11:28:32PM +0530, Anup Patel wrote:
> > On Thu, Mar 14, 2019 at 12:23 PM Mike Rapoport wrote:
> > >
> > > On Thu, Mar 14, 2019 at 02:36:01AM +0530, Anup Patel wrote:
> > >
On Fri, Mar 15, 2019 at 9:28 PM Mike Rapoport wrote:
>
> On Thu, Mar 14, 2019 at 11:28:32PM +0530, Anup Patel wrote:
> > On Thu, Mar 14, 2019 at 12:23 PM Mike Rapoport wrote:
> > >
> > > On Thu, Mar 14, 2019 at 02:36:01AM +0530, Anup Patel wrote:
> > >
On Thu, Mar 14, 2019 at 12:23 PM Mike Rapoport wrote:
>
> On Thu, Mar 14, 2019 at 02:36:01AM +0530, Anup Patel wrote:
> > On Thu, Mar 14, 2019 at 12:01 AM Mike Rapoport wrote:
> > >
> > > On Tue, Mar 12, 2019 at 10:08:22PM +, Anup Patel wrote:
> > &g
On Thu, Mar 14, 2019 at 12:01 AM Mike Rapoport wrote:
>
> On Tue, Mar 12, 2019 at 10:08:22PM +, Anup Patel wrote:
> > Currently, we have to boot RISCV64 kernel from a 2MB aligned physical
> > address and RISCV32 kernel from a 4MB aligned physical address. This
> &g
in-place, the booting constraint for RISCV32 and RISCV64
kernel is much more relaxed and we can now boot kernel very close to
RAM start thereby minimizng memory wastage.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/fixmap.h | 5 +
arch/riscv/include/asm/pgtable-64.h | 5 +
arch/riscv
This patch adds rv32_defconfig for 32bit systems. The only
difference between rv32_defconfig and defconfig is that
rv32_defconfig has CONFIG_ARCH_RV32I=y.
Signed-off-by: Anup Patel
---
arch/riscv/configs/rv32_defconfig | 84 +++
1 file changed, 84 insertions
addressing.
Fixes: 6f1e9e946f0b ("RISC-V: Move setup_vm() to mm/init.c")
Signed-off-by: Anup Patel
---
arch/riscv/kernel/head.S | 1 +
arch/riscv/mm/init.c | 71 ++--
2 files changed, 47 insertions(+), 25 deletions(-)
diff --git a/arch/riscv/ker
From: Anup Patel
This patchset primarily extends initial page table setup using fixmap
to boot Linux RISC-V kernel (64bit and 32bit) from any 4KB aligned address.
We also add 32bit defconfig to allow people to try 32bit Linux RISC-V
kernel as well.
The patchset is tested on SiFive Unleashed
uot; hart, in case they
> don't
> +* have.
> + */
> + if (elf_hwcap)
> + elf_hwcap &= this_hwcap;
> + else
> + elf_hwcap = this_hwcap;
> + }
>
> /* We don't support systems with F but without D, so mask those out
> * here. */
> --
> 2.7.4
>
Looks good to me.
Reviewed-by: Anup Patel
Regards,
Anup
On Thu, Feb 14, 2019 at 6:07 AM Palmer Dabbelt wrote:
>
> On Wed, 13 Feb 2019 00:21:43 PST (-0800), a...@brainfault.org wrote:
> > On Wed, Feb 13, 2019 at 4:45 AM Palmer Dabbelt wrote:
> >>
> >> On Sat, 19 Jan 2019 05:27:53 PST (-0800), Anup Patel wrote:
>
v1:
- Use more characters per line in changelog of PATCH3
- Removed #ifndef __ASSEMBLY__ from PATCH5
- Use more characters per line in commets of PATCH5
- Added PATCH6 to implement keepinitrd kernel parameter
Anup Patel (5):
RISC-V: Setup init_mm before parse_early_param()
RISC-V: Move set
We should setup init_mm before doing parse_early_param() in setup_arch()
to be consistent with setup_arch() of other architectures such as x86,
ARM, and ARM64.
Signed-off-by: Anup Patel
Reviewed-by: Christoph Hellwig
Reviewed-by: Palmer Dabbelt
---
arch/riscv/kernel/setup.c | 9 -
1
We should free-up initrd memory in free_initrd_mem() instead
of doing nothing.
Signed-off-by: Anup Patel
---
arch/riscv/mm/init.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index b1167a6f5a92..aabf1869c54b 100644
--- a/arch
The setup_bootmem() mainly populates memblocks and does early memory
reservations. The right location for this function is mm/init.c. It
calls setup_initrd() so we move that as well.
Signed-off-by: Anup Patel
Reviewed-by: Christoph Hellwig
Reviewed-by: Palmer Dabbelt
---
arch/riscv/include
The setup_vm() is responsible for setting up initial page table hence
should be placed in mm/init.c.
Signed-off-by: Anup Patel
Reviewed-by: Christoph Hellwig
Reviewed-by: Palmer Dabbelt
---
arch/riscv/kernel/setup.c | 49 ---
arch/riscv/mm/init.c | 49
This patch implements compile-time virtual to physical mappings. These
compile-time fixed mappings can be used by earlycon, ACPI, and early
ioremap for creating fixed mappings when FIX_EARLYCON_MEM=y.
To start with, we have enabled compile-time fixed mappings for earlycon.
Signed-off-by: Anup
> -Original Message-
> From: Mike Rapoport [mailto:r...@linux.ibm.com]
> Sent: Wednesday, February 13, 2019 3:30 PM
> To: Anup Patel
> Cc: Palmer Dabbelt ; Albert Ou
> ; Atish Patra ; Paul
> Walmsley ; Christoph Hellwig
> ; linux-ri...@lists.inf
On Wed, Feb 13, 2019 at 4:45 AM Palmer Dabbelt wrote:
>
> On Sat, 19 Jan 2019 05:27:53 PST (-0800), Anup Patel wrote:
> > This patchset does:
> > 1. Moves MM related code from kernel/setup.c to mm/init.c
> > 2. Implements compile-time fixed mappings
> >
> > Us
This patch implements compile-time virtual to physical mappings. These
compile-time fixed mappings can be used by earlycon, ACPI, and early
ioremap for creating fixed mappings when FIX_EARLYCON_MEM=y.
To start with, we have enabled compile-time fixed mappings for earlycon.
Signed-off-by: Anup
The setup_vm() is responsible for setting up initial page table hence
should be placed in mm/init.c.
Signed-off-by: Anup Patel
Reviewed-by: Christoph Hellwig
Reviewed-by: Palmer Dabbelt
---
arch/riscv/kernel/setup.c | 49 ---
arch/riscv/mm/init.c | 49
We should setup init_mm before doing parse_early_param() in setup_arch()
to be consistent with setup_arch() of other architectures such as x86,
ARM, and ARM64.
Signed-off-by: Anup Patel
Reviewed-by: Christoph Hellwig
Reviewed-by: Palmer Dabbelt
---
arch/riscv/kernel/setup.c | 9 -
1
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