Set the frequency of the generated clock used by sdmmc devices in order
to not rely on the configuration done by previous components.

Signed-off-by: Ludovic Desroches <ludovic.desroc...@microchip.com>
---
 arch/arm/boot/dts/sama5d2.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 2e2c1a7b1d1d..8d79ff75e3cd 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -300,6 +300,8 @@
                        interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
                        clocks = <&pmc PMC_TYPE_PERIPHERAL 31>, <&pmc 
PMC_TYPE_GCK 31>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
                        clock-names = "hclock", "multclk", "baseclk";
+                       assigned-clocks = <&pmc PMC_TYPE_GCK 31>;
+                       assigned-clock-rates = <480000000>;
                        status = "disabled";
                };
 
@@ -309,6 +311,8 @@
                        interrupts = <32 IRQ_TYPE_LEVEL_HIGH 0>;
                        clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc 
PMC_TYPE_GCK 32>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
                        clock-names = "hclock", "multclk", "baseclk";
+                       assigned-clocks = <&pmc PMC_TYPE_GCK 32>;
+                       assigned-clock-rates = <480000000>;
                        status = "disabled";
                };
 
-- 
2.23.0

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