From: Vaibhav Jain <vaib...@linux.ibm.com>

commit a2948b17f6b936fc52f86c0f92c46d2f91928b79 upstream.

In case a platform doesn't provide explicit flush-hints but provides an
explicit flush callback via ND_REGION_ASYNC region flag, then
nvdimm_has_flush() still returns '0' indicating that writes do not
require flushing. This happens on PPC64 with patch at [1] applied, where
'deep_flush' of a region was denied even though an explicit flush
function was provided.

Fix this by adding a condition to nvdimm_has_flush() to test for the
ND_REGION_ASYNC flag on the region and see if a 'region->flush' callback
is assigned.

Link: 
http://lore.kernel.org/r/161703936121.36.7260632399582101498.stgit@e1fbed493c87 
[1]
Fixes: c5d4355d10d4 ("libnvdimm: nd_region flush callback support")
Reported-by: Shivaprasad G Bhat <sb...@linux.ibm.com>
Signed-off-by: Vaibhav Jain <vaib...@linux.ibm.com>
Link: https://lore.kernel.org/r/20210402092555.208590-1-vaib...@linux.ibm.com
Signed-off-by: Dan Williams <dan.j.willi...@intel.com>
Signed-off-by: Greg Kroah-Hartman <gre...@linuxfoundation.org>
---
 drivers/nvdimm/region_devs.c |    9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

--- a/drivers/nvdimm/region_devs.c
+++ b/drivers/nvdimm/region_devs.c
@@ -1142,6 +1142,11 @@ int nvdimm_has_flush(struct nd_region *n
                        || !IS_ENABLED(CONFIG_ARCH_HAS_PMEM_API))
                return -ENXIO;
 
+       /* Test if an explicit flush function is defined */
+       if (test_bit(ND_REGION_ASYNC, &nd_region->flags) && nd_region->flush)
+               return 1;
+
+       /* Test if any flush hints for the region are available */
        for (i = 0; i < nd_region->ndr_mappings; i++) {
                struct nd_mapping *nd_mapping = &nd_region->mapping[i];
                struct nvdimm *nvdimm = nd_mapping->nvdimm;
@@ -1152,8 +1157,8 @@ int nvdimm_has_flush(struct nd_region *n
        }
 
        /*
-        * The platform defines dimm devices without hints, assume
-        * platform persistence mechanism like ADR
+        * The platform defines dimm devices without hints nor explicit flush,
+        * assume platform persistence mechanism like ADR
         */
        return 0;
 }


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