> I wonder if we have different configs...
>
>>
>>
>> Second issues is, trackpoint is reported as "ImPS/2 Generic Wheel
>> Mouse". Middle button scrolling is not enabled by default.
>
> I think this will be fixed by:
>
>
> I wonder if we have different configs...
>
>>
>>
>> Second issues is, trackpoint is reported as "ImPS/2 Generic Wheel
>> Mouse". Middle button scrolling is not enabled by default.
>
> I think this will be fixed by:
>
>
On Sun, Aug 13, 2017 at 06:53:04PM +0530, Bhumika Goyal wrote:
> Make these const as they are only used during a copy operation.
> Done using Coccinelle.
Pls make sure you use the right subsystem tags, hint, you cna check git log
on that subsystem/file to find the right ones
Applied after fixing
On Sun, Aug 13, 2017 at 06:53:04PM +0530, Bhumika Goyal wrote:
> Make these const as they are only used during a copy operation.
> Done using Coccinelle.
Pls make sure you use the right subsystem tags, hint, you cna check git log
on that subsystem/file to find the right ones
Applied after fixing
For now baud field of earlycon structure device is't initialised at all
in of_setup_earlycon (in oppositе to register_earlycon).
So when I use stdout-path to point earlycon device
(like stdout-path = or stdout-path = "serial:115200n8")
baud field of earlycon device structure remains
For now baud field of earlycon structure device is't initialised at all
in of_setup_earlycon (in oppositе to register_earlycon).
So when I use stdout-path to point earlycon device
(like stdout-path = or stdout-path = "serial:115200n8")
baud field of earlycon device structure remains
2017-08-18 07:11-0700, Wanpeng Li:
> From: Wanpeng Li
>
> [ cut here ]
> WARNING: CPU: 7 PID: 3861 at /home/kernel/ssd/kvm/arch/x86/kvm//vmx.c:11299
> nested_vmx_vmexit+0x176e/0x1980 [kvm_intel]
> CPU: 7 PID: 3861 Comm: qemu-system-x86 Tainted: G
2017-08-18 07:11-0700, Wanpeng Li:
> From: Wanpeng Li
>
> [ cut here ]
> WARNING: CPU: 7 PID: 3861 at /home/kernel/ssd/kvm/arch/x86/kvm//vmx.c:11299
> nested_vmx_vmexit+0x176e/0x1980 [kvm_intel]
> CPU: 7 PID: 3861 Comm: qemu-system-x86 Tainted: GW OE
On Thu, Aug 10, 2017 at 06:54:25PM +0300, Anton Vasilyev wrote:
> If device_node np doesn't contain child or first child doesn't have
> property "reg" then hidma_mgmt_of_populate_channels() perfoms
> deallocation on uninitialized local variable res.
>
> The patch adds res initialization by NULL.
On Thu, Aug 10, 2017 at 06:54:25PM +0300, Anton Vasilyev wrote:
> If device_node np doesn't contain child or first child doesn't have
> property "reg" then hidma_mgmt_of_populate_channels() perfoms
> deallocation on uninitialized local variable res.
>
> The patch adds res initialization by NULL.
Initialize hw interface as part of the nic initialization for accessing hw.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
Documentation/networking/hinic.txt | 125 ++
drivers/net/ethernet/Kconfig
Initialize hw interface as part of the nic initialization for accessing hw.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
Documentation/networking/hinic.txt | 125 ++
drivers/net/ethernet/Kconfig | 1 +
drivers/net/ethernet/Makefile
Add the management messages for sending to api cmd and the asynchronous
event handler for the completion of the messages.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
.../net/ethernet/huawei/hinic/hinic_hw_api_cmd.c | 35 ++
Add the management messages for sending to api cmd and the asynchronous
event handler for the completion of the messages.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
.../net/ethernet/huawei/hinic/hinic_hw_api_cmd.c | 35 ++
.../net/ethernet/huawei/hinic/hinic_hw_api_cmd.h |
On Tue, Aug 15 2017 at 11:11am -0400,
Arnd Bergmann wrote:
> The new lockdep support for completions causeed the stack usage
> in dm-integrity to explode, in case of write_journal from 504 bytes
> to 1120 (using arm gcc-7.1.1):
>
> drivers/md/dm-integrity.c: In function
On Tue, Aug 15 2017 at 11:11am -0400,
Arnd Bergmann wrote:
> The new lockdep support for completions causeed the stack usage
> in dm-integrity to explode, in case of write_journal from 504 bytes
> to 1120 (using arm gcc-7.1.1):
>
> drivers/md/dm-integrity.c: In function 'write_journal':
>
Initialize api cmd resources as part of management initialization.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
drivers/net/ethernet/huawei/hinic/Makefile | 4 +-
.../net/ethernet/huawei/hinic/hinic_hw_api_cmd.c | 446
Initialize api cmd resources as part of management initialization.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
drivers/net/ethernet/huawei/hinic/Makefile | 4 +-
.../net/ethernet/huawei/hinic/hinic_hw_api_cmd.c | 446 +
On 20/08/2017 19:22, Mason wrote:
> On 07/08/2017 14:47, Marc Zyngier wrote:
>
>> On 01/08/17 17:56, Mason wrote:
>>
>>> +static int tango_set_type(struct irq_data *data, uint flow_type)
>>> +{
>>> + return 0;
>>
>> What does this mean? Either you can do a set-type (and you do it), or
>> you
On 20/08/2017 19:22, Mason wrote:
> On 07/08/2017 14:47, Marc Zyngier wrote:
>
>> On 01/08/17 17:56, Mason wrote:
>>
>>> +static int tango_set_type(struct irq_data *data, uint flow_type)
>>> +{
>>> + return 0;
>>
>> What does this mean? Either you can do a set-type (and you do it), or
>> you
Update the hardware about api cmd resources and initialize it.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
.../net/ethernet/huawei/hinic/hinic_hw_api_cmd.c | 173 -
Update the hardware about api cmd resources and initialize it.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
.../net/ethernet/huawei/hinic/hinic_hw_api_cmd.c | 173 -
.../net/ethernet/huawei/hinic/hinic_hw_api_cmd.h | 38 +
Add the api cmd commands for sending management messages to the nic.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
.../net/ethernet/huawei/hinic/hinic_hw_api_cmd.c | 329 -
Add the api cmd commands for sending management messages to the nic.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
.../net/ethernet/huawei/hinic/hinic_hw_api_cmd.c | 329 -
.../net/ethernet/huawei/hinic/hinic_hw_api_cmd.h | 65
Handle aeq elements that are accumulated on the aeq by calling the
registered handler for the specific event.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
drivers/net/ethernet/huawei/hinic/hinic_hw_csr.h | 49 +++
Handle aeq elements that are accumulated on the aeq by calling the
registered handler for the specific event.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
drivers/net/ethernet/huawei/hinic/hinic_hw_csr.h | 49 +++
drivers/net/ethernet/huawei/hinic/hinic_hw_eqs.c | 463
Add the port management commands that are sent as management messages.
The port management commands are used for netdev operations.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
drivers/net/ethernet/huawei/hinic/Makefile | 4
Add the port management commands that are sent as management messages.
The port management commands are used for netdev operations.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
drivers/net/ethernet/huawei/hinic/Makefile | 4 +-
Add port management message for setting Rx mode in the card,
used for rx_mode netdev operation.
The link event handler is used for getting a notification about the
link state.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
Add port management message for setting Rx mode in the card,
used for rx_mode netdev operation.
The link event handler is used for getting a notification about the
link state.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
drivers/net/ethernet/huawei/hinic/hinic_dev.h | 17 ++
CCF generic mux will shift the mask using the value defined in shift
Define the mask accordingly
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
CCF generic mux will shift the mask using the value defined in shift
Define the mask accordingly
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/host/meson-gx-mmc.c
Remove unused clock rate defines. These should not be defined but
requested from the clock framework.
Also correct typo on the DELAY register
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 4 +---
1 file
spinlock used in interrupt handler should use the _irqsave variant
Fixes: 51c5d8447bd7 ("MMC: meson: initial support for GX platforms")
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 5 +++--
1 file
Remove unused clock rate defines. These should not be defined but
requested from the clock framework.
Also correct typo on the DELAY register
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
spinlock used in interrupt handler should use the _irqsave variant
Fixes: 51c5d8447bd7 ("MMC: meson: initial support for GX platforms")
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff
The patchset features several bugfixes, rework and upgrade for the
meson-gx MMC driver.
The main goal is to improve readability and enable new high speed
modes, such as eMMC DDR52 and sdcard UHS modes up to SDR50 (100Mhz)
SDR104 is not working with a few cards on the p200 and the
libretech-cc. I
The patchset features several bugfixes, rework and upgrade for the
meson-gx MMC driver.
The main goal is to improve readability and enable new high speed
modes, such as eMMC DDR52 and sdcard UHS modes up to SDR50 (100Mhz)
SDR104 is not working with a few cards on the p200 and the
libretech-cc. I
Remove conditional write of cfg register. Warn if set_clk fails for some
reason. Consistently use host->dev instead of mixing with mmc_dev(mmc)
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 22
On 21 August 2017 at 16:59, Peter Zijlstra wrote:
> On Mon, Aug 21, 2017 at 08:23:10AM -0700, Andy Lutomirski wrote:
>> > Ah, but only root can create per-cpu events or attach events to kernel
>> > threads (with sensible paranoia levels).
>>
>> But this may not need to be
Remove conditional write of cfg register. Warn if set_clk fails for some
reason. Consistently use host->dev instead of mixing with mmc_dev(mmc)
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 22 +-
1 file changed, 9
On 21 August 2017 at 16:59, Peter Zijlstra wrote:
> On Mon, Aug 21, 2017 at 08:23:10AM -0700, Andy Lutomirski wrote:
>> > Ah, but only root can create per-cpu events or attach events to kernel
>> > threads (with sensible paranoia levels).
>>
>> But this may not need to be percpu. If a non root
It does not make much sense to define cap-sd-highspeed in the emmc nodes
Just remove it.
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi| 1 -
arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 1 -
It does not make much sense to define cap-sd-highspeed in the emmc nodes
Just remove it.
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi| 1 -
arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 1 -
On Mon, Aug 21, 2017 at 05:01:38PM +0100, Mark Rutland wrote:
> On Mon, Aug 21, 2017 at 05:53:26PM +0200, Peter Zijlstra wrote:
> > On Thu, Jun 22, 2017 at 03:41:38PM +0100, Mark Rutland wrote:
> > > Regardless of which events form a group, it does not make sense for the
> > > events to target
On Mon, Aug 21, 2017 at 05:01:38PM +0100, Mark Rutland wrote:
> On Mon, Aug 21, 2017 at 05:53:26PM +0200, Peter Zijlstra wrote:
> > On Thu, Jun 22, 2017 at 03:41:38PM +0100, Mark Rutland wrote:
> > > Regardless of which events form a group, it does not make sense for the
> > > events to target
This patchset feature updates around mmc. It is linked to this series [0]
but does not strictly depends on it. It adds:
* The regulator settling times for the gpio regulator of nanopi-k2 and
the libretech-cc.
* UHS modes for the p20x and nanopi-k2.
* clk-gate pins: these are the pinmuxes used
This patchset feature updates around mmc. It is linked to this series [0]
but does not strictly depends on it. It adds:
* The regulator settling times for the gpio regulator of nanopi-k2 and
the libretech-cc.
* UHS modes for the p20x and nanopi-k2.
* clk-gate pins: these are the pinmuxes used
Add the pinctrl to switch mmc clk pins in gpio (pulled down) mode. This
is necessary to be able to gate the clk outside of the SoC while
keeping it running in the controller
Signed-off-by: Jerome Brunet
---
.../arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 9 --
Add the pinctrl to switch mmc clk pins in gpio (pulled down) mode. This
is necessary to be able to gate the clk outside of the SoC while
keeping it running in the controller
Signed-off-by: Jerome Brunet
---
.../arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 9 --
Changing the card voltage on the nanopi-k2 is not instantaneous,
especially when switching from 3.3v to 1.8v.
It take at least 3ms for the regulator to go from 3.3v to 1.8v. Add
margin to that to make sure we don't upset the sdcard during the voltage
switch
Fixes: 9bc7ffb08daf ("arm64: dts:
Changing the card voltage on the nanopi-k2 is not instantaneous,
especially when switching from 3.3v to 1.8v.
It take at least 3ms for the regulator to go from 3.3v to 1.8v. Add
margin to that to make sure we don't upset the sdcard during the voltage
switch
Fixes: 9bc7ffb08daf ("arm64: dts:
Unfortunately, the PCB of the libretech-cc cannot handle sdcard
at 200Mhz reliably, so sdr104 is removed
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 1 -
1 file changed, 1 deletion(-)
diff --git
Unfortunately, the PCB of the libretech-cc cannot handle sdcard
at 200Mhz reliably, so sdr104 is removed
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 1 -
1 file changed, 1 deletion(-)
diff --git
Now that the clock source 0 is properly described in the CCF, use it
instead of assuming the default value (xtal)
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 6 +++---
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 6 +++---
2 files
Now that the clock source 0 is properly described in the CCF, use it
instead of assuming the default value (xtal)
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 6 +++---
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 6 +++---
2 files changed, 6 insertions(+), 6
Enable sdcard UHS modes, up to SDR50, on p20x based boards.
While the s905 supports SDR104 mode, it appears that the PCB of p20x
based boards can't cope with a rate as high as 200Mhz.
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 3 +++
Enable sdcard UHS modes, up to SDR50, on p20x based boards.
While the s905 supports SDR104 mode, it appears that the PCB of p20x
based boards can't cope with a rate as high as 200Mhz.
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 3 +++
1 file changed, 3
SDR104 seems to be OK on the nanopi-k2 SBC so enable it
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
SDR104 seems to be OK on the nanopi-k2 SBC so enable it
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
Changing the card voltage on the cc is not instantaneous, especially
when switching from 3.3v to 1.8v.
It take at least 30ms for the regulator to go from 3.3v to 1.8v. Add
margin to that to make sure we don't upset the sdcard during the voltage
switch
Fixes: 61ff2af9b278 ("ARM64: dts: fixup
Changing the card voltage on the cc is not instantaneous, especially
when switching from 3.3v to 1.8v.
It take at least 30ms for the regulator to go from 3.3v to 1.8v. Add
margin to that to make sure we don't upset the sdcard during the voltage
switch
Fixes: 61ff2af9b278 ("ARM64: dts: fixup
Enable UHS modes, up to SDR50, on the nanopi-k2 SBC.
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
Enable UHS modes, up to SDR50, on the nanopi-k2 SBC.
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
Perform basic initialisation of the clk register before providing it to
the CCF.
Thanks to devm, carrying the clock structure around after init is not
necessary. Rework the function to remove these from the controller host
data.
Finally, set initial mmc clock rate before enabling it, simplifying
Perform basic initialisation of the clk register before providing it to
the CCF.
Thanks to devm, carrying the clock structure around after init is not
necessary. Rework the function to remove these from the controller host
data.
Finally, set initial mmc clock rate before enabling it, simplifying
cfg init function overwrite values set in the clk init function
Remove the cfg pokes from the clk init. Actually, trying to use
the CLK_AUTO, like initially tried in clk_init, would break
the card initialization
BEWARE not to poke the cfg register while the divider value in clk
register is 0. It
cfg init function overwrite values set in the clk init function
Remove the cfg pokes from the clk init. Actually, trying to use
the CLK_AUTO, like initially tried in clk_init, would break
the card initialization
BEWARE not to poke the cfg register while the divider value in clk
register is 0. It
This patch adds the following support to the HNS3 driver:
1. Support to change the Maximum Transmission Unit of a
port in the HNS NIC hardware.
2. Initializes the supported MTU range for the netdevice.
Signed-off-by: lipeng
Signed-off-by: Salil Mehta
This patch adds the following support to the HNS3 driver:
1. Support to change the Maximum Transmission Unit of a
port in the HNS NIC hardware.
2. Initializes the supported MTU range for the netdevice.
Signed-off-by: lipeng
Signed-off-by: Salil Mehta
Reviewed-by: Andrew Lunn
Reviewed-by:
In DDR modes, meson mmc controller requires an input rate twice as fast
as the output rate
Fixes: 51c5d8447bd7 ("MMC: meson: initial support for GX platforms")
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c
In DDR modes, meson mmc controller requires an input rate twice as fast
as the output rate
Fixes: 51c5d8447bd7 ("MMC: meson: initial support for GX platforms")
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 41
Initial default tx phase was set to 0 while the datasheet recommends 270.
Some cards fails to initialize with this setting and eMMC mode DDR52 does
not work.
Changing this setting to 270 fixes these issues, without any regression
so far
Signed-off-by: Jerome Brunet
---
Initial default tx phase was set to 0 while the datasheet recommends 270.
Some cards fails to initialize with this setting and eMMC mode DDR52 does
not work.
Changing this setting to 270 fixes these issues, without any regression
so far
Signed-off-by: Jerome Brunet
---
Implement voltage switch callback (shamelessly copied from sunxi mmc
driver). This allow, with the appropriate tuning function, to use
SD ultra high speed modes.
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
Implement voltage switch callback (shamelessly copied from sunxi mmc
driver). This allow, with the appropriate tuning function, to use
SD ultra high speed modes.
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 23 +++
1 file
2017-08-18 16:46+0800, Jason Wang:
>
>
> On 2017年08月16日 22:10, Michael S. Tsirkin wrote:
> > On Wed, Aug 16, 2017 at 03:34:54PM +0200, Paolo Bonzini wrote:
> > > Microsoft pointed out privately to me that KVM's handling of
> > > KVM_FAST_MMIO_BUS is invalid. Using skip_emulation_instruction is
2017-08-18 16:46+0800, Jason Wang:
>
>
> On 2017年08月16日 22:10, Michael S. Tsirkin wrote:
> > On Wed, Aug 16, 2017 at 03:34:54PM +0200, Paolo Bonzini wrote:
> > > Microsoft pointed out privately to me that KVM's handling of
> > > KVM_FAST_MMIO_BUS is invalid. Using skip_emulation_instruction is
Several phases can be controlled on the meson-gx controller, the core, tx
and rx clock phase. The tx and rx uses delays to allow for a more fine
grained setting of the phase. To properly compute the phase using delays,
accessing the clock rate is necessary.
Instead of ad-hoc functions, use the
Several phases can be controlled on the meson-gx controller, the core, tx
and rx clock phase. The tx and rx uses delays to allow for a more fine
grained setting of the phase. To properly compute the phase using delays,
accessing the clock rate is necessary.
Instead of ad-hoc functions, use the
The card_busy callback is important to then add the voltage switch
callback as it allow to verify that the card is done dealing with
the voltage switch
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 13
The card_busy callback is important to then add the voltage switch
callback as it allow to verify that the card is done dealing with
the voltage switch
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 13 +
1 file changed, 13
No functional change, just improve interrupt handler readability
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 93 +
1 file changed, 39 insertions(+), 54
No functional change, just improve interrupt handler readability
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 93 +
1 file changed, 39 insertions(+), 54 deletions(-)
diff --git
Rework tuning function of the rx phase. Now that the phase can be
more precisely set using CCF, test more phase setting and find the
largest working window. Then the tuning selected is the one at the
center of the window.
This rework allows to use new modes, such as UHS SDR50
Reviewed-by: Kevin
Rework tuning function of the rx phase. Now that the phase can be
more precisely set using CCF, test more phase setting and find the
largest working window. Then the tuning selected is the one at the
center of the window.
This rework allows to use new modes, such as UHS SDR50
Reviewed-by: Kevin
It seems that the mmc clock is also used and required, somehow, by
the controller it self.
It is shown during init, when writing to CFG while the divider is set
to 0 will crash the SoC. During voltage switch, the controller may crash
and the card may then fail to exit busy state if the clock is
It seems that the mmc clock is also used and required, somehow, by
the controller it self.
It is shown during init, when writing to CFG while the divider is set
to 0 will crash the SoC. During voltage switch, the controller may crash
and the card may then fail to exit busy state if the clock is
Remove CLK_DIVIDER_ALLOW_ZERO. This flag means that a 1 based divider
with a 0 value will behave as a bypass clock
The mmc divider does not behave like this, a 0 value disables the clock
Remove this flag so CCF never allows a 0 value on this clock
Fixes: 51c5d8447bd7 ("MMC: meson: initial
Remove CLK_DIVIDER_ALLOW_ZERO. This flag means that a 1 based divider
with a 0 value will behave as a bypass clock
The mmc divider does not behave like this, a 0 value disables the clock
Remove this flag so CCF never allows a 0 value on this clock
Fixes: 51c5d8447bd7 ("MMC: meson: initial
Clean-up clk_set function to prepare the next changes (DDR and clk-stop)
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 30 +-
1 file changed, 9 insertions(+), 21 deletions(-)
Clean-up clk_set function to prepare the next changes (DDR and clk-stop)
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 30 +-
1 file changed, 9 insertions(+), 21 deletions(-)
diff --git
On Mon, Aug 21, 2017 at 05:53:26PM +0200, Peter Zijlstra wrote:
> On Thu, Jun 22, 2017 at 03:41:38PM +0100, Mark Rutland wrote:
> > Regardless of which events form a group, it does not make sense for the
> > events to target different tasks and/or CPUs, as this leaves the group
> > inconsistent
On Mon, Aug 21, 2017 at 05:53:26PM +0200, Peter Zijlstra wrote:
> On Thu, Jun 22, 2017 at 03:41:38PM +0100, Mark Rutland wrote:
> > Regardless of which events form a group, it does not make sense for the
> > events to target different tasks and/or CPUs, as this leaves the group
> > inconsistent
Create the resources for queue pair operations: doorbell area,
consumer index address and producer index address.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
drivers/net/ethernet/huawei/hinic/Makefile | 4 +-
Create the resources for queue pair operations: doorbell area,
consumer index address and producer index address.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
drivers/net/ethernet/huawei/hinic/Makefile | 4 +-
drivers/net/ethernet/huawei/hinic/hinic_hw_if.h | 1 +
Create the logical queues of the nic.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
drivers/net/ethernet/huawei/hinic/Makefile | 5 +-
drivers/net/ethernet/huawei/hinic/hinic_dev.h| 5 +
Create the logical queues of the nic.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
drivers/net/ethernet/huawei/hinic/Makefile | 5 +-
drivers/net/ethernet/huawei/hinic/hinic_dev.h| 5 +
drivers/net/ethernet/huawei/hinic/hinic_hw_dev.c | 131 +
Update the nic about the resources of the queue pairs.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
drivers/net/ethernet/huawei/hinic/Makefile | 5 +-
drivers/net/ethernet/huawei/hinic/hinic_common.c | 55 ++
Update the nic about the resources of the queue pairs.
Signed-off-by: Aviad Krawczyk
Signed-off-by: Zhao Chen
---
drivers/net/ethernet/huawei/hinic/Makefile | 5 +-
drivers/net/ethernet/huawei/hinic/hinic_common.c | 55 ++
drivers/net/ethernet/huawei/hinic/hinic_common.h |
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