Re: [PATCH] ASoC: codec: wm9860: avoid maybe-uninitialized warning

On Thu, Apr 20, 2017 at 09:44:28AM +0200, Arnd Bergmann wrote: > On Thu, Apr 20, 2017 at 8:48 AM, Daniel Baluta > wrote: > > On Wed, Apr 19, 2017 at 8:04 PM, Arnd Bergmann wrote: > > gcc version 6.2.1 20161016 (Linaro GCC 6.2-2016.11) > I'm using

Re: [PATCH v5] drm/pl111: Initial drm/kms driver for pl111

Russell King - ARM Linux writes: > On Tue, Apr 11, 2017 at 02:00:21PM -0700, Eric Anholt wrote: >> Russell King - ARM Linux writes: >> >> > On Tue, Apr 11, 2017 at 09:06:31AM -0700, Eric Anholt wrote: >> >> Russell King - ARM Linux

[PATCH 1/4] sched/topology: optimize build_group_mask()

The group mask is always used in intersection with the group cpus. So, when building the group mask, we don't have to care about cpus that are not part of the group. Signed-off-by: Lauro Ramos Venancio --- kernel/sched/topology.c | 4 ++-- 1 file changed, 2 insertions(+), 2

[PATCH 2/4] sched/topology: all instances of a sched group must use the same sched_group_capacity

Use the group balance cpu to select the same sched_group_capacity instance for all instances of a sched group. As the group mask is stored in the struct sched_group_capacity and the function group_balance_cpu() cannot be used when the group mask is not available, this patch creates a function to

Re: [RFC] minimum gcc version for kernel: raise to gcc-4.3 or 4.6?

On Thu, Apr 20, 2017 at 3:15 AM, Arnd Bergmann wrote: > On Sun, Apr 16, 2017 at 9:52 PM, Kees Cook wrote: The original gcc-4.3 release was in early 2008. If we decide to still support that, we probably want the first 10 quirks in this series,

Re: [PATCH 3.18 000/124] 3.18.50-stable review

On Thu, Apr 20, 2017 at 04:28:03PM +0200, Greg Kroah-Hartman wrote: > On Thu, Apr 20, 2017 at 06:46:11AM -0700, Guenter Roeck wrote: > > On 04/19/2017 11:34 PM, Greg Kroah-Hartman wrote: > > > This is the start of the stable review cycle for the 3.18.50 release. > > > There are 124 patches in this

[PATCH 3/4] sched/topology: move comment about asymmetric node setups

Signed-off-by: Lauro Ramos Venancio --- kernel/sched/topology.c | 19 ++- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c index 55bbaf7..e77c93a 100644 --- a/kernel/sched/topology.c +++

[PATCH 4/4] sched/topology: the group balance cpu must be a cpu where the group is installed

An overlap sched group may not be installed in all cpus that compose the group. Currently, the group balance cpu may be a cpu where the group is not installed, causing two problems: 1) Two groups may have the same group balance cpu and, as consequence, share the sched_group_capacity. 2)

Re: [PATCH V5 4/7] ARM: pxa: Use - instead of @ for DT OPP entries

Viresh Kumar writes: > Compiling the DT file with W=1, DTC warns like follows: > > Warning (unit_address_vs_reg): Node /opp_table0/opp@10 has a > unit name, but no reg property > > Fix this by replacing '@' with '-' as the OPP nodes will never have a > "reg"

Re: [PATCH 0/4] infiniband: chelsio

On Thu, 2017-02-09 at 14:23 -0800, Joe Perches wrote: > Neaten logging > > Joe Perches (4): >   cxgb3: Use more common logging style >   cxgb3: Convert PDBG to pr_debug >   cxgb4: Use more common logging style >   cxgb4: Convert PDBG to pr_debug > >  drivers/infiniband/hw/cxgb3/cxio_dbg.c  | 

Re: [PATCH v2 0/3] uapi glibc compat: fix musl libc compatibility

On Thu, 2017-04-20 at 16:07 -0400, David Miller wrote: > > I think I have to put the brakes on this patch series, after much > consideration. > > It does not scale if we continually add a hodge-podge of different > ifdef tests to the UAPI headers in order to prevent mutliple > definitions. > >

[Patch V5 5/7] crypto: AES CBC multi-buffer glue code

This patch introduces the multi-buffer job manager which is responsible for submitting scatter-gather buffers from several AES CBC jobs to the multi-buffer algorithm. The glue code interfaces with the underlying algorithm that handles 8 data streams of AES CBC encryption in parallel. AES key

[Patch V5 2/7] crypto: AES CBC multi-buffer data structures

This patch introduces the data structures and prototypes of functions needed for doing AES CBC encryption using multi-buffer. Included are the structures of the multi-buffer AES CBC job, job scheduler in C and data structure defines in x86 assembly code. Originally-by: Chandramouli Narayanan

[Patch V5 4/7] crypto: AES CBC by8 encryption

This patch introduces the assembly routine to do a by8 AES CBC encryption in support of the AES CBC multi-buffer implementation. It encrypts 8 data streams of the same key size simultaneously. Originally-by: Chandramouli Narayanan Signed-off-by: Megha Dey

[Patch V5 7/7] crypto: AES CBC multi-buffer tcrypt

The tcrypt test framework for CBC multi-buffer testing is laid out in this patch. Tcrypt has been extended to validate the functionality and performance of AES CBC multi-buffer support. A new test(mode=600) has been added to test the speed of the multibuffer case, as multi-buffer encrypt will

[PATCH v5 11/11] mm: memory_hotplug: memory hotremove supports thp migration

From: Naoya Horiguchi This patch enables thp migration for memory hotremove. Signed-off-by: Naoya Horiguchi --- ChangeLog v1->v2: - base code switched from alloc_migrate_target to new_node_page() --- include/linux/huge_mm.h | 8

[PATCH v5 06/11] mm: thp: check pmd migration entry in common path

From: Zi Yan If one of callers of page migration starts to handle thp, memory management code start to see pmd migration entry, so we need to prepare for it before enabling. This patch changes various code point which checks the status of given pmds in order to prevent

[PATCH] iio: inkern: fix a static checker error

Avoid this smatch error: drivers/iio/inkern.c:751 iio_read_avail_channel_raw() error: double unlock 'mutex:>indio_dev->info_exist_lock' Fixes: 00c5f80c2fad ("iio: inkern: add helpers to query available values from channels") Signed-off-by: Peter Rosin --- drivers/iio/inkern.c

[PATCH v5 08/11] mm: hwpoison: soft offline supports thp migration

From: Naoya Horiguchi This patch enables thp migration for soft offline. Signed-off-by: Naoya Horiguchi ChangeLog: v1 -> v5: - fix page isolation counting error Signed-off-by: Zi Yan --- mm/memory-failure.c | 35

Re: [PATCH] iio: inkern: fix a static checker error

On 2017-04-20 23:12, Lars-Peter Clausen wrote: > On 04/20/2017 11:01 PM, Peter Rosin wrote: >> Avoid this smatch error: >> drivers/iio/inkern.c:751 iio_read_avail_channel_raw() error: double unlock >> 'mutex:>indio_dev->info_exist_lock' > > Looks good, but it's not just the smatch error, this is

[PATCH] fpga: Add flag to indicate SPI bitstream is bit-reversed

Add a flag that is passed to the write_init() callback, indicating that the SPI bitstream starts with LSB first. SPI controllers usually send data with MSB first. If an FPGA expects bitstream data as LSB first, the data must be reversed either by the SPI controller or by the driver. Alternatively

Re: [PATCH] Documentation: allow installing man pages to a user defined directory

On Thu, 20 Apr 2017 15:57:28 -0300 "Herton R. Krzesinski" wrote: > Documentation/DocBook/Makefile hard codes the prefixed path to which you > can install the built man pages (/usr/local prefix). That's unfortunate > since the user may want to install to another prefix or

[PATCH RESEND] drm/i915: Fix pipe/transcoder enum mismatches

In several instances the driver passes an 'enum pipe' value to a function expecting an 'enum transcoder' and viceversa. Since PIPE_x and TRANSCODER_x have the same values this doesn't cause functional problems. Still it is incorrect and causes clang to generate warnings like this:

Re: [PATCH 0/5] fs, xfs refcount conversions

On Thu, Apr 20, 2017 at 10:24:04AM -0700, Darrick J. Wong wrote: > On Thu, Apr 20, 2017 at 08:11:41AM +, Reshetova, Elena wrote: > > > > > > > v3: > > > * fixed header file inclusion > > > > I don't think I have heard anything back on this v3 patch set. > > Is there still smth here to

[PATCH 1/2] arm64: pmu: Wire-up Cortex A53 L2 cache events and DTLB refills

Add missing L2 cache events: read/write accesses and misses, as well as the DTLB refills. Signed-off-by: Florian Fainelli --- arch/arm64/kernel/perf_event.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/kernel/perf_event.c

[PATCH 2/2] arm64: pmu: Wire-up L2 cache events for ARMv8 PMUv3

The ARMv8 PMUv3 cache map did not include the L2 cache events, add them. Signed-off-by: Florian Fainelli --- arch/arm64/kernel/perf_event.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index

[PATCH 1/2] arm64: perf: Wire-up Cortex A53 L2 cache events and DTLB refills

Add missing L2 cache events: read/write accesses and misses, as well as the DTLB refills. Signed-off-by: Florian Fainelli --- arch/arm64/kernel/perf_event.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/kernel/perf_event.c

[PATCH RESEND] Makefile, LLVM: add -no-integrated-as to KBUILD_[AC]FLAGS

From: Michael Davidson Add -no-integrated-as to KBUILD_AFLAGS and KBUILD_CFLAGS for clang. Signed-off-by: Michael Davidson Signed-off-by: Matthias Kaehlcke --- Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Makefile

[PATCH 0/4] sched/topology: fix overlap group capacity and balance cpu

This patchset is on top of Peter Zijlstra's sched/core tree[1]. It is equivalent to the patch 3 from my previous patchset[2]. This patchset ensures: 1) different instances of the same sched group share the same sched_group_capacity instance. 2) instances of different groups don't share the

Re: [linux-sunxi] Re: [PATCH v2 1/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver

On Fri, Apr 07, 2017 at 03:38:05PM +0200, Maxime Ripard wrote: > Hi Priit, > > On Tue, Apr 04, 2017 at 08:09:19PM +, Priit Laes wrote: > > > > +/* Not documented on A10 */ > > > > +static SUNXI_CCU_GATE(pll_periph_sata_clk, "pll-periph-sata", > > > > "pll-periph", > > > > +

Re: [PATCH 0/5] IB/hfi1: Fine-tuning for three function implementations

On Fri, 2017-02-10 at 22:00 +0100, SF Markus Elfring wrote: > From: Markus Elfring > Date: Fri, 10 Feb 2017 21:53:21 +0100 > > A few update suggestions were taken into account > from static source code analysis. > > Markus Elfring (5): >   Use kcalloc() in

[Patch V5 6/7] crypto: AES vectors for AES CBC multibuffer testing

For more robust testing of AES CBC multibuffer support, additional test vectors have been added to the AES CBC encrypt/decrypt test case. Originally-by: Chandramouli Narayanan Signed-off-by: Megha Dey Acked-by: Tim Chen

[Patch V5 0/7] crypto: AES CBC multibuffer implementation

In this patch series, we introduce AES CBC encryption that is parallelized on x86_64 cpu with XMM registers. The multi-buffer technique encrypt 8 data streams in parallel with SIMD instructions. Decryption is handled as in the existing AESNI Intel CBC implementation which can already parallelize

Re: [kernel-hardening] Re: [PATCH v3 1/2] modules:capabilities: automatic module loading restriction

On Thu, Apr 20, 2017 at 5:02 PM, Ben Hutchings wrote: > On Thu, 2017-04-20 at 14:44 +0200, Djalal Harouni wrote: >> > On Thu, Apr 20, 2017 at 4:22 AM, Ben Hutchings >> > wrote: >> > On Thu, 2017-04-20 at 00:20 +0200, Djalal Harouni wrote: >> > [...]

Re: [PATCH 5/6] MODSIGN: Export module signature definitions.

Am Donnerstag, 20. April 2017, 15:37:37 BRT schrieb David Howells: > Mimi Zohar wrote: > > On Tue, 2017-04-18 at 17:17 -0300, Thiago Jung Bauermann wrote: > > > IMA will use the module_signature format for append signatures, so > > > export > > > the relevant definitions

Re: MMC block addressing mode.

On 04/20/2017 12:12 PM, David Daney wrote: > > Steven and Jan: Can we get around this requirement by: > > - Always set MIO_EMM_DMA[MULTI] = 1; This way by SECTOR mode may be > unimportant. > > - Always set MIO_EMM_DMA[SECTOR] = SUITABLE_CONSTANT. > No, this does not work. The 1.88GB card

Re: [tip:x86/mm] x86/mm/gup: Switch GUP to the generic get_user_page_fast() implementation

On Sat, Mar 18, 2017 at 2:52 AM, tip-bot for Kirill A. Shutemov wrote: > Commit-ID: 2947ba054a4dabbd82848728d765346886050029 > Gitweb: http://git.kernel.org/tip/2947ba054a4dabbd82848728d765346886050029 > Author: Kirill A. Shutemov >

Re: net/bonding: stack-out-of-bounds in bond_enslave

On Thu, Apr 20, 2017 at 9:32 AM, Andrey Konovalov wrote: > Hi, > > I've got the following error report while fuzzing the kernel with syzkaller. > > On linux-next commit 4f7d029b9bf009fbee76bb10c0c4351a1870d2f3 (4.11-rc7). > > A reproducer and .config are attached. > >

Re: [PATCH] ARM: dts: Add devicetree for the Raspberry Pi 3, for arm32 (v4)

Florian Fainelli writes: > On 03/29/2017 05:26 PM, Eric Anholt wrote: >> Raspbian and Fedora have decided to support the Pi3 in 32-bit mode for >> now, so it's useful to be able to test that mode on an upstream >> kernel. It's also been useful for me to use the same board

Re: [alsa-devel] [PATCH] ASoC: dwc: disallow building designware_pcm as a module

On Thu, 20 Apr 2017 21:46:46 +0200, Mark Brown wrote: > > On Wed, Apr 19, 2017 at 05:48:15PM +0100, Jose Abreu wrote: > > > What do you think Mark? If you want to keep the PCM as a module > > then we will need to abstract this more, by reducing the > > dependencies. > > I think forcing this to

Re: [RFC 0/8] Copy Offload with Peer-to-Peer PCI Memory

> Yes, this makes sense I think we really just want to distinguish host > memory or not in terms of the dev_pagemap type. I would like to see mutually exclusive flags for host memory (or not) and persistence (or not). Stephen

[PATCH v5 10/11] mm: migrate: move_pages() supports thp migration

From: Naoya Horiguchi This patch enables thp migration for move_pages(2). Signed-off-by: Naoya Horiguchi ChangeLog: v1 -> v5: - fix page counting Signed-off-by: Zi Yan --- mm/migrate.c | 47

Re: [PATCH 00/29] IB/mlx: Fine-tuning for several function implementations

> I've dropped this entire series. If you want me to consider it, you > need to respin it with the following changes: How do you think about to integrate any of my update suggestions which you do not find controversial (or questionable) at the moment? > 1) Put all similar corrections in a

[PATCH v5 03/11] mm: thp: introduce separate TTU flag for thp freezing

From: Naoya Horiguchi TTU_MIGRATION is used to convert pte into migration entry until thp split completes. This behavior conflicts with thp migration added later patches, so let's introduce a new TTU flag specifically for freezing. try_to_unmap() is used both for thp

[PATCH v5 02/11] mm: mempolicy: add queue_pages_node_check()

From: Naoya Horiguchi Introduce a separate check routine related to MPOL_MF_INVERT flag. This patch just does cleanup, no behavioral change. Signed-off-by: Naoya Horiguchi --- mm/mempolicy.c | 16 +++- 1 file changed, 11

[PATCH v5 07/11] mm: soft-dirty: keep soft-dirty bits over thp migration

From: Naoya Horiguchi Soft dirty bit is designed to keep tracked over page migration. This patch makes it work in the same manner for thp migration too. --- ChangeLog v1 -> v2: - separate diff moving _PAGE_SWP_SOFT_DIRTY from bit 7 to bit 1 - clear_soft_dirty_pmd can

[PATCH] gpio: export add/remove lookup table functions

For hot-pluggable devices adding GPIOs dynamically we need to assemble and add the gpio lookup tables at probe time in modules, so that requesting these GPIOs in attached drivers can work. Export lookup table functions for modules. Signed-off-by: Anatolij Gustschin ---

[PATCH 2/3] bus: fsl-mc: dpio: enable qbman CENA portal memory access

Once we enable the cacheable portal memory, we need to do cache flush for enqueue, vdq, buffer release, and management commands, as well as invalidate and prefetch for the valid bit of management command response and next index of dqrr. Signed-off-by: Haiying Wang ---

Re: [PATCH] arm: Documentation: update a path name

On Thu, 20 Apr 2017 12:58:40 +0800 Perr Zhang wrote: > the path in the example cmd is out of date, and the path for now > is also mentioned in the same file Gee, that's only been wrong since 2008...:) Applied, thanks. jon

Re: [PATCH 3/4] nfs: remove the objlayout driver

On Wed, 2017-04-12 at 18:01 +0200, Christoph Hellwig wrote: > The objlayout code has been in the tree, but it's been unmaintained > and > no server product for it actually ever shipped. > > Signed-off-by: Christoph Hellwig > --- >  Documentation/admin-guide/kernel-parameters.txt |   

[PATCH 0/2] FireWire-OHCI: Fine-tuning for some function implementations

From: Markus Elfring Date: Thu, 20 Apr 2017 22:22:10 +0200 A few update suggestions were taken into account from static source code analysis. Markus Elfring (2): Use kcalloc() in pci_probe() Adjust 15 checks for null pointers drivers/firewire/ohci.c | 41

Re: [PATCH 3/9] platform/x86: hp-wmi: Standardize enum usage for constants

On Wed, Apr 19, 2017 at 07:25:15PM -0700, Darren Hart wrote: > From: "Darren Hart (VMware)" > > Use enums consistently throughout the hp-wmi driver for groups of > related constants. Use hex and align the assignment within groups. Move > the *QUERY constants into an enum,

Re: [PATCH 0/2] IB/hns: Fine-tuning for two function implementations

On Thu, 2017-02-16 at 10:00 +0100, SF Markus Elfring wrote: > From: Markus Elfring > Date: Thu, 16 Feb 2017 09:55:43 +0100 > > A few update suggestions were taken into account > from static source code analysis. > > Markus Elfring (2): >   Use kmalloc_array() in

Re: [PATCH 3/6] ima: Simplify policy_func_show.

Am Donnerstag, 20. April 2017, 08:13:23 BRT schrieb Mimi Zohar: > On Tue, 2017-04-18 at 17:17 -0300, Thiago Jung Bauermann wrote: > > If the func_tokens array uses the same indices as enum ima_hooks, > > policy_func_show can be a lot simpler, and the func_* enum becomes > > unnecessary. > > My

Re: [PATCH 02/26] IB/ocrdma: Use kcalloc() in ocrdma_mbx_alloc_pd_range()

On Wed, 2017-03-08 at 16:03 +0200, Yuval Shaia wrote: > On Wed, Mar 08, 2017 at 01:41:00PM +0100, SF Markus Elfring wrote: > > > > From: Markus Elfring > > Date: Tue, 7 Mar 2017 18:23:54 +0100 > > > > * Multiplications for the size determination of memory

[Patch V5 3/7] crypto: AES CBC multi-buffer scheduler

This patch implements in-order scheduler for encrypting multiple buffers in parallel supporting AES CBC encryption with key sizes of 128, 192 and 256 bits. It uses 8 data lanes by taking advantage of the SIMD instructions with XMM registers. The multibuffer manager and scheduler is mostly written

Re: [PATCH V8 5/6] ACPI: Support the probing on the devices which apply indirect-IO

On Thu, Mar 30, 2017 at 9:26 AM, zhichang.yuan wrote: > On some platforms(such as Hip06/Hip07), the legacy ISA/LPC devices access I/O > with some special host-local I/O ports known on x86. To access the I/O > peripherals, an indirect-IO mechanism is introduced to

Re: [PATCH] Doc/PM: Sync with intel_powerclamp code behavior

On Fri, 14 Apr 2017 11:19:24 -0700 Jacob Pan wrote: > Commit feb6cd6a0f9f ("thermal/intel_powerclamp: stop sched tick in forced > idle") changed how idle injection accouting, so we need to update > the documentation accordingly. > > This patch also expands more

Re: [PATCH v2 00/11] Documentation: Add ABI to the admin guide

On Thu, 13 Apr 2017 07:08:43 -0300 Mauro Carvalho Chehab wrote: > That's the third attempt to add support for the Kernel ABI > at the Documentation's admin guide. > > The first approach was based on a generic extension that > calls a random script. This one is based on

Re: [PATCH v13 03/10] mux: minimal mux subsystem and gpio-based mux controller

On 2017-04-18 23:53, Peter Rosin wrote: > On 2017-04-18 13:44, Greg Kroah-Hartman wrote: >> On Tue, Apr 18, 2017 at 12:59:50PM +0200, Peter Rosin wrote: >>> On 2017-04-18 10:51, Greg Kroah-Hartman wrote: On Thu, Apr 13, 2017 at 06:43:07PM +0200, Peter Rosin wrote: *snip* > + if

Re: [PATCH] ASoC: dwc: disallow building designware_pcm as a module

On Wed, Apr 19, 2017 at 05:48:15PM +0100, Jose Abreu wrote: > What do you think Mark? If you want to keep the PCM as a module > then we will need to abstract this more, by reducing the > dependencies. I think forcing this to be built in to the kernel (which is what the commit message says the

Re: [PATCH v17 2/3] usb: USB Type-C connector class

Thanks for the responses :) So seems like we have a plan. In Type-C connector class the checks for TYPEC_PWR_MODE_PD and pd_revision for both the port and the partner will be removed in power_role_store and the data_role_store and will be delegated to the low level drivers. TCPM code will issue

Re: [PATCH v2] timer/sysclt: Restrict timer migration sysctl values to 0 and 1

On Thu, 20 Apr 2017, Myungho Jung wrote: I told you to check your mail so you avoid sending a V2. That mail from tip-bot is a notification that: This > Commit-ID: b94bf594cf8ed67cdd0439e70fa939783471597a which can be looked at via: > Gitweb:

Re: [PATCH v2 0/3] uapi glibc compat: fix musl libc compatibility

From: Hauke Mehrtens Date: Tue, 18 Apr 2017 23:00:33 +0200 > The code from libc-compat.h depends on some glibc specific defines and > causes compile problems with the musl libc. These patches remove some > of the glibc dependencies. With these patches the LEDE (OpenWrt) base

[PATCH 1/2] firewire: ohci: Use kcalloc() in pci_probe()

From: Markus Elfring Date: Thu, 20 Apr 2017 21:50:19 +0200 * Multiplications for the size determination of memory allocations indicated that array data structures should be processed. Thus use the corresponding function "kcalloc". This issue was detected by

Re: [PATCH v2 0/3] uapi glibc compat: fix musl libc compatibility

From: David Woodhouse Date: Thu, 20 Apr 2017 21:14:37 +0100 > I agree, except I don't think you're going far enough. Those "standard > names" you mention... some of this stuff actually depends on __GLIBC__, > and *that* isn't right either. Yep, that's something that needs

[Patch V5 1/7] crypto: Multi-buffer encryption infrastructure support

In this patch, the infrastructure needed to support multibuffer encryption implementation is added: a) Enhance mcryptd daemon to support skcipher requests. b) Add multi-buffer simd skcipher helper which presents the top-level algorithm as an skcipher. b) Update configuration to include

Re: [PATCH -mm -v9 2/3] mm, THP, swap: Check whether THP can be split firstly

On Thu, Apr 20, 2017 at 08:50:43AM +0800, Huang, Ying wrote: > Johannes Weiner writes: > > On Wed, Apr 19, 2017 at 03:06:24PM +0800, Huang, Ying wrote: > >> With the patchset, the swap out throughput improves 3.6% (from about > >> 4.16GB/s to about 4.31GB/s) in the

[PATCH v5 05/11] mm: thp: enable thp migration in generic path

From: Zi Yan This patch adds thp migration's core code, including conversions between a PMD entry and a swap entry, setting PMD migration entry, removing PMD migration entry, and waiting on PMD migration entries. This patch makes it possible to support thp migration. If

[PATCH v5 01/11] mm: x86: move _PAGE_SWP_SOFT_DIRTY from bit 7 to bit 1

From: Naoya Horiguchi pmd_present() checks _PAGE_PSE along with _PAGE_PRESENT to avoid false negative return when it races with thp spilt (during which _PAGE_PRESENT is temporary cleared.) I don't think that dropping _PAGE_PSE check in pmd_present() works well because

[PATCH v5 09/11] mm: mempolicy: mbind and migrate_pages support thp migration

From: Naoya Horiguchi This patch enables thp migration for mbind(2) and migrate_pages(2). Signed-off-by: Naoya Horiguchi --- ChangeLog v1 -> v2: - support pte-mapped and doubly-mapped thp --- mm/mempolicy.c | 108

[PATCH v5 00/11] mm: page migration enhancement for thp

From: Zi Yan Hi all, The patches are rebased on mmotm-2017-04-13-14-50 with the feedbacks from v4 patches. Hi Kirill, I have cleaned up Patch 5 and Patch 6, so PTE-mapped THP migration is handled fully by existing code. Can I have your Ack, at least on these two patches?

[PATCH v5 04/11] mm: thp: introduce CONFIG_ARCH_ENABLE_THP_MIGRATION

From: Naoya Horiguchi Introduces CONFIG_ARCH_ENABLE_THP_MIGRATION to limit thp migration functionality to x86_64, which should be safer at the first step. Signed-off-by: Naoya Horiguchi --- v1 -> v2: - fixed config name in subject and patch

Re: [PATCH] iio: inkern: fix a static checker error

On 04/20/2017 11:01 PM, Peter Rosin wrote: > Avoid this smatch error: > drivers/iio/inkern.c:751 iio_read_avail_channel_raw() error: double unlock > 'mutex:>indio_dev->info_exist_lock' Looks good, but it's not just the smatch error, this is a real issue. This even seems to be a endless loop,

[PATCH] x86/ftrace: Fix ebp in ftrace_regs_caller that screws up unwinder

From: Steven Rostedt (VMware) Fengguang Wu's zero day bot triggered a stack unwinder dump. This can be easily triggered when CONFIG_FRAME_POINTERS is enabled and -mfentry is in use on x86_32. ># cd /sys/kernel/debug/tracing ># echo 'p:schedule schedule' > kprobe_events

Re: [PATCH v5 05/32] x86/CPU/AMD: Handle SME reduction in physical address size

On Thu, Apr 20, 2017 at 12:29:20PM -0500, Tom Lendacky wrote: > Hmmm... and actually if cpu_has(X86_FEATURE_SME) is true then it's a > given that extended_cpuid_level >= 0x801f. So this can be > simplified to just: > > if (cpu_has(c, X86_FEATURE_SME)) { > ... the rest of

Re: [PATCH 3/3] arm64/locking: qspinlocks and qrwlocks support

On Thu, Apr 20, 2017 at 09:23:18PM +0300, Yury Norov wrote: > On Thu, Apr 13, 2017 at 08:12:12PM +0200, Peter Zijlstra wrote: > > On Tue, Apr 11, 2017 at 01:35:04AM +0400, Yury Norov wrote: > > > > > +++ b/arch/arm64/include/asm/qspinlock.h > > > @@ -0,0 +1,20 @@ > > > +#ifndef

Re: [PATCH 1/4] fs: fix data invalidation in the cleancache during direct IO

On Thu, Apr 20, 2017 at 04:44:31PM +0200, Jan Kara wrote: > On Thu 20-04-17 16:35:10, Jan Kara wrote: > > On Wed 19-04-17 13:28:36, Ross Zwisler wrote: > > > On Wed, Apr 19, 2017 at 06:11:31PM +0300, Andrey Ryabinin wrote: > > > > On 04/18/2017 10:38 PM, Ross Zwisler wrote: > > > > > On Fri, Apr

[PATCH 2/2] firewire: ohci: Adjust 15 checks for null pointers

From: Markus Elfring Date: Thu, 20 Apr 2017 22:10:29 +0200 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The script “checkpatch.pl” pointed information out like the following. Comparison to NULL could be written … Thus

[PATCH] perf, tools: Describe uncore event changes in perf list

From: Andi Kleen Describe the new uncore wildcard PMU match in the perf list manpage. Also fix a typo in an existing example. Signed-off-by: Andi Kleen --- tools/perf/Documentation/perf-list.txt | 12 +++- 1 file changed, 11 insertions(+),

Re: [PATCH 2/3] x86/intel_rdt: Trim whitespace while parsing schemata input

On Thu, 20 Apr 2017, Thomas Gleixner wrote: On Thu, 20 Apr 2017, Shivappa Vikas wrote: Will fix. I went overboard not wanting to add a line Finish reading the thread before you start :) Got it :) Had not seen the tip bot emails on my other email..

Re: MMC block addressing mode.

On 04/20/2017 04:24 PM, Steven J. Hill wrote: > On 04/20/2017 12:12 PM, David Daney wrote: >> >> Steven and Jan: Can we get around this requirement by: >> >> - Always set MIO_EMM_DMA[MULTI] = 1; This way by SECTOR mode may be >> unimportant. >> >> - Always set MIO_EMM_DMA[SECTOR] =

Re: [kernel-hardening] Re: [PATCH v3 1/2] modules:capabilities: automatic module loading restriction

On Thu, Apr 20, 2017 at 1:39 PM, Djalal Harouni wrote: > On Thu, Apr 20, 2017 at 5:02 PM, Ben Hutchings wrote: >> On Thu, 2017-04-20 at 14:44 +0200, Djalal Harouni wrote: >>> > On Thu, Apr 20, 2017 at 4:22 AM, Ben Hutchings >>> >

[PATCH v3] scsi/bfa: use designated initializers

Prepare to mark sensitive kernel structures for randomization by making sure they're using designated initializers. This also initializes the array members using the enum used to look up __port_action entries. Signed-off-by: Kees Cook --- v3: - drop bfa_module_s changes,

Re: [PATCH v2 5/9] staging: ccree: add AEAD support

Hi Gilad, [auto build test WARNING on linus/master] [also build test WARNING on v4.11-rc7] [cannot apply to staging/staging-testing next-20170420] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits

Re: [PATCH] pci-hyperv: Use only 16 bit integer for PCI domain

On Thu, Apr 20, 2017 at 06:37:35PM +, Haiyang Zhang wrote: > It's Nvidia driver. Which of the many nvidia drivers in the tree? Just fix it instead of coming up with stupid workarounds like this.

Re: [PATCH] net/packet: initialize val in packet_getsockopt()

From: Alexander Potapenko Date: Tue, 18 Apr 2017 19:47:08 +0200 > In the case getsockopt() is called with PACKET_HDRLEN and zero length, > |val| remains uninitialized and the syscall may behave differently > depending on its value. This doesn't have security consequences (as

Re: [PATCH] fs: compat: Remove warning from COMPATIBLE_IOCTL

e most of the remaining contents > as they come from the old llvmlinux project. Yeah, I picked a subset of the llvmlinux patches from different sources. > For reference, I've uploaded my set to > > git://git.kernel.org/pub/scm/linux/kernel/git/arnd/playground.git > next-20170420

Re: [PATCH 3/3] drm/vc4: Add specific compatible strings for Cygnus.

On Tue, Apr 18, 2017 at 12:11:57PM -0700, Eric Anholt wrote: > Cygnus has V3D 2.6 instead of 2.1, and doesn't use the VC4 display > modules. The V3D can be uniquely identified by the IDENT[01] > registers, and there's nothing to key off of for the display change > other than the lack of DT nodes

Re: [RFC 0/8] Copy Offload with Peer-to-Peer PCI Memory

On Thu, Apr 20, 2017 at 1:43 PM, Stephen Bates wrote: > >> Yes, this makes sense I think we really just want to distinguish host >> memory or not in terms of the dev_pagemap type. > > I would like to see mutually exclusive flags for host memory (or not) and > persistence

[PATCH 1/2] ARM: dts: mvebu: add missing interrupt to 98dx4251 switch

The 98dx4251 has 4 interrupts for the packet processor whereas the 98dx3236 and 98dx3336 only have 3. Signed-off-by: Chris Packham --- arch/arm/boot/dts/armada-xp-98dx4251.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git

[PATCH 2/2] ARM: dts: mvebu: disable the rtc on 98dx3236 SoC

There is no rtc for the 98dx3236 and derivative SoCs. Disable the rtc node inherited from the armada-370-xp base. Signed-off-by: Chris Packham --- arch/arm/boot/dts/armada-xp-98dx3236.dtsi | 4 1 file changed, 4 insertions(+) diff --git

[PATCH 0/2] arm64: perf: Add L2 cache events for ARMv8 PMuv3 and A53

Hi, While investigating why there were no L2 cache events generated for a Cortex A53-like PMU, it turned out that none of the L2 cache events were mapped. This is also the case for ARMv8 PMUv3, which seems a little odd considering they are defined. Thanks! Florian Fainelli (2): arm64: perf:

Re: [PATCH v2 -tip 0/6] locking: Introduce range reader/writer lock

On Thu, Apr 20, 2017 at 11:36:46AM -0700, Davidlohr Bueso wrote: > On Thu, 20 Apr 2017, Peter Zijlstra wrote: > >Those are about avoiding actually going to sleep and having to be woken > >up (and waiting to become running) again, which is a long time. > > Yes, which is why I was thinking of ways

Re: [PATCH 3/3] arm64/locking: qspinlocks and qrwlocks support

On Thu, Apr 20, 2017 at 09:23:18PM +0300, Yury Norov wrote: > Is there some test to reproduce the locking failure for the case. Possibly sysvsem stress before commit: 27d7be1801a4 ("ipc/sem.c: avoid using spin_unlock_wait()") Although a similar scheme is also used in nf_conntrack, see commit:

Re: [PATCH] of: introduce event tracepoints for dynamic device_node lifecyle

On 04/20/17 09:51, Tyrel Datwyler wrote: > On 04/19/2017 09:43 PM, Frank Rowand wrote: > < snip > >> The call stack could easily be post-processed, for example using addr2line. >> Here is the call stack for when the refcount incremented to 23 from 22 (or >> more accurately, to 22 from 21): >>

[PATCH 1/3] arm64: extend ioremap for cacheable non-shareable memory

NXP arm64 based SoC needs to allocate cacheable and non-shareable memory for the software portals of Queue manager, so we extend the arm64 ioremap support for this memory attribute. Signed-off-by: Haiying Wang --- arch/arm64/include/asm/io.h | 1 +

[PATCH 0/3] bus: fsl-mc: dpio: udpate QMan CENA region

This patchset allows the NXP's DPAA2 QMan Software portal CENA region to be cacheable as designed for the performance goal. Besides, the write allocate stash feature of the QMan requires the non-shareable attribute for this cache-enabled memory. So this patchset extends the arm64 ioremap with

[PATCH 3/3] bus: fsl-mc: dpio: change CENA regs to be cacheable

plus non-shareable to meet the performance requirement. QMan's CENA region contains registers and structures that are 64byte in size and are inteneded to be accessed using a single 64 byte bus transaction, therefore this portal memory should be configured as cache-enabled. Also because the write

Re: [PATCH v1 0/9] platform/x86: hp-wmi: Driver refactoring and cleanups

On Thu, Apr 20, 2017 at 10:38:56AM +0300, Andy Shevchenko wrote: > On Thu, Apr 20, 2017 at 5:25 AM, Darren Hart wrote: > > From: "Darren Hart (VMware)" > > > > This series factors out some redundant code, cleans up a number of style > > issues, > >

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