Since Operating Performance Points(OPP) functions are specific to
device specific power management, be specific and rename opp.h
to pm_opp.h
Reported-by: Randy Dunlap rdun...@infradead.org
Signed-off-by: Nishanth Menon n...@ti.com
---
Documentation/power/opp.txt |2 +-
arch/arm
opp_find_freq_ceil
opp_add
opp_enable
opp_disable
opp_get_notifier
opp_init_cpufreq_table
opp_free_cpufreq_table
Reported-by: Randy Dunlap rdun...@infradead.org
Signed-off-by: Nishanth Menon n...@ti.com
---
Documentation/power/opp.txt | 102 +++
arch/arm/mach
of this change was fixed as
well.
Reported-by: Randy Dunlap rdun...@infradead.org
Signed-off-by: Nishanth Menon n...@ti.com
---
Documentation/power/opp.txt |4 ++--
arch/arm/mach-omap2/pm.c |2 +-
drivers/base/power/opp.c | 41
On 09/18/2013 04:40 AM, Aida Mynzhasova wrote:
On 16.09.2013 17:14, Nishanth Menon wrote:
On 10:49-20130916, Aida Mynzhasova wrote:
On 24.08.2013 18:02, Aida Mynzhasova wrote:
This patch adds required definitions and structures for clockdomain
initialization, so omap3xxx_clockdomains_init
;
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So configuring this secure register for all the cpus here.
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Nishanth Menon n...@ti.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Marc Zyngier marc.zyng...@arm.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc
On 09/18/2013 06:33 AM, Sricharan R wrote:
Hi,
On Tuesday 17 September 2013 10:31 PM, Nishanth Menon wrote:
CNTFREQ isn't pre-programmed on DRA7 just like O5, so provide the
timer frequency via DT. Without a valid value arch_timer_init results
in div0 crash.
Cc: R Sricharan r.sricha
code in kernel tree. I dont see why we
cant just cleanup OMAP5 ES1.0 entirely from kernel tree?
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-by: Nishanth Menon n...@ti.com
---
ref: http://marc.info/?l=linux-omapm=137951198232339w=2
based on 3.12-rc1 tag
arch/arm/mach-omap2/id.c |8
arch/arm/mach-omap2/soc.h |2 --
2 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
On 09/17/2013 09:31 AM, Afzal Mohammed wrote:
Hi Nishant,
On Monday 16 September 2013 08:56 PM, Nishanth Menon wrote:
On 09/16/2013 08:48 AM, Afzal Mohammed wrote:
From: Ambresh K ambr...@ti.com
Add the data file to describe clock domains in AM43x SoC.
OMAP4 clockdomain operations
Shilimkar santosh.shilim...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
---
Based on Benoit's for_3.13/dts branch.
http://git.kernel.org/cgit/linux/kernel/git/bcousson/linux-omap-dt.git/log/?h=for_3.13/dts
Without this patch, div0 error occurs(seen on 3.12-rc1 tag):
http://pastebin.com
santosh.shilim...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
---
Based on Benoit's for_3.13/dts branch.
http://git.kernel.org/cgit/linux/kernel/git/bcousson/linux-omap-dt.git/log/?h=for_3.13/dts
Crash log: http://pastebin.com/B2sDauS9
V2: commit message update
V1: https://patchwork.kernel.org/patch
-specific
+ property. If it's missing the port will not be
+ enabled.
+
This belongs to patch which introduces SSI driver, no?
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to align the conversion with upcoming V7 of the patch
series as well.
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this. this can be addressed by Tero's clk series.
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@@
mmc1 {
status = okay;
+ bus-width = 0x4;
vmmc-supply = ldo3_reg;
pinctrl-names = default;
pinctrl-0 = mmc1_pins;
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d5f43fe..d34469c 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -16,7 +16,3 @@
regulator-always-on;
};
-mmc1 {
- status = okay;
- vmmc-supply = ldo3_reg;
-};
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+ ti,vcc-aux-disable-is-sleep;
+};
+
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-trigger = mmc1;
default-state = off;
};
};
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:
Addressed Nishants nitpicks for commit messages
Series:
Reviewed-by: Nishanth Menon n...@ti.com
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compressed)
Data Size:2187921 Bytes = 2.1 MiB
Load Address:
Entry Point:
Verifying Checksum ... OK
Loading Kernel Image ... OK
OK
Starting kernel ...
Regards
Sid.
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-on;
+ };
+
+ };
+ };
+ };
};
i2c2 {
Acked-by: Nishanth Menon n...@ti.com
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fck is optional clocks?
+ continue;
+ opt_clks_cnt++;
+ opt_clk_names[i] = clk_name;
+ }
+ return opt_clk_names;
+}
+
[...]
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On 08/14/2013 08:20 AM, Rajendra Nayak wrote:
On Wednesday 14 August 2013 06:18 PM, Nishanth Menon wrote:
Hi Rajendra,
On Tue, Jul 23, 2013 at 1:24 AM, Rajendra Nayak rna...@ti.com wrote:
[..]
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 12fa589
On 08/14/2013 08:49 AM, Mark Rutland wrote:
[Adding Mike Turquette and dt maintainers]
On Wed, Aug 14, 2013 at 02:39:44PM +0100, Nishanth Menon wrote:
On 08/14/2013 08:20 AM, Rajendra Nayak wrote:
On Wednesday 14 August 2013 06:18 PM, Nishanth Menon wrote:
Hi Rajendra,
On Tue, Jul 23, 2013
On 08/14/2013 09:20 AM, Rajendra Nayak wrote:
On Wednesday 14 August 2013 07:43 PM, Mark Rutland wrote:
On Wed, Aug 14, 2013 at 03:05:25PM +0100, Rajendra Nayak wrote:
On Wednesday 14 August 2013 07:28 PM, Nishanth Menon wrote:
On 08/14/2013 08:49 AM, Mark Rutland wrote:
[Adding Mike
On 08/08/2013 06:04 PM, Kevin Hilman wrote:
Nishanth Menon n...@ti.com writes:
On 08/08/2013 04:14 PM, Kevin Hilman wrote:
Dave Gerlach d-gerl...@ti.com writes:
On 08/08/2013 10:03 AM, Santosh Shilimkar wrote:
$subject and patch don't match.
On Thursday 08 August 2013 08:26 AM, Nishanth
On 08/09/2013 11:12 AM, Kevin Hilman wrote:
Nishanth Menon n...@ti.com writes:
On 08/08/2013 06:04 PM, Kevin Hilman wrote:
Nishanth Menon n...@ti.com writes:
On 08/08/2013 04:14 PM, Kevin Hilman wrote:
Dave Gerlach d-gerl...@ti.com writes:
On 08/08/2013 10:03 AM, Santosh Shilimkar wrote
On 08/09/2013 03:34 PM, Kevin Hilman wrote:
Nishanth Menon n...@ti.com writes:
On 08/09/2013 11:12 AM, Kevin Hilman wrote:
Nishanth Menon n...@ti.com writes:
On 08/08/2013 06:04 PM, Kevin Hilman wrote:
Nishanth Menon n...@ti.com writes:
On 08/08/2013 04:14 PM, Kevin Hilman wrote:
Dave
,
Nishanth Menon
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On 08/08/2013 11:06 AM, Dave Gerlach wrote:
On 08/08/2013 10:03 AM, Santosh Shilimkar wrote:
$subject and patch don't match.
On Thursday 08 August 2013 08:26 AM, Nishanth Menon wrote:
On 08/08/2013 03:45 AM, Russ Dill wrote:
In reference to
the M3 handling it, the M3 wouldn't know which
On 08/08/2013 04:14 PM, Kevin Hilman wrote:
Dave Gerlach d-gerl...@ti.com writes:
On 08/08/2013 10:03 AM, Santosh Shilimkar wrote:
$subject and patch don't match.
On Thursday 08 August 2013 08:26 AM, Nishanth Menon wrote:
On 08/08/2013 03:45 AM, Russ Dill wrote:
In reference to
the M3
this in
a generic manner?
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On 08/07/2013 01:12 PM, Dave Gerlach wrote:
On 08/07/2013 11:22 AM, Nishanth Menon wrote:
On 08/06/2013 12:49 PM, Dave Gerlach wrote:
[...]
+
+struct forced_standby_module am33xx_mod[] = {
+{.oh_name = usb_otg_hs},
+{.oh_name = tptc0},
+{.oh_name = tptc1},
+{.oh_name = tptc2
On 08/02/2013 05:57 AM, Tero Kristo wrote:
On 08/02/2013 10:30 AM, Roger Quadros wrote:
Hi Nishant,
On 08/01/2013 06:06 PM, Nishanth Menon wrote:
On 08/01/2013 09:58 AM, Roger Quadros wrote:
USB_DPLL must be initialized and locked at boot so that
USB modules can work.
Also program
to redo the numbering in the kernel yet again.
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__init omap4_panda_display_init_of(void);
-void __init omap_4430sdp_display_init(void);
void __init omap_4430sdp_display_init_of(void);
#endif
Am I missing some series which introduces dts entries for the pinctrl
and gpios for omap4 support?
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On 08/02/2013 08:00 AM, Tomi Valkeinen wrote:
On 02/08/13 15:54, Nishanth Menon wrote:
On 07/23/2013 04:06 AM, Tomi Valkeinen wrote:
Panda's DVI connector's DDC pins are connected to OMAP's third i2c bus.
With non-DT, the bus number was 3, and that is what is used in the
dss-common.c which
On 08/02/2013 08:04 AM, Tomi Valkeinen wrote:
On 02/08/13 15:56, Nishanth Menon wrote:
On 07/23/2013 04:06 AM, Tomi Valkeinen wrote:
This is no longer needed as omap4 is now booted using device tree.
Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
---
snip
diff --git a/arch/arm/mach
On 08/02/2013 09:22 AM, Tomi Valkeinen wrote:
On 02/08/13 16:30, Nishanth Menon wrote:
On 08/02/2013 08:00 AM, Tomi Valkeinen wrote:
Feel free to help me develop the DT support for DSS =). When that's
done, we can remove all this code.
suggesting here - but it will be nice we have some
On 07/31/2013 03:59 AM, Tero Kristo wrote:
On 07/30/2013 06:21 PM, Nishanth Menon wrote:
On 07/23/2013 02:19 AM, Tero Kristo wrote:
Parses OMAP clock data from DT and registers those clocks with the clock
framework. dt_omap_clk_init must be called early during boot for timer
initialization so
On 07/31/2013 04:46 AM, Tero Kristo wrote:
On 07/30/2013 07:23 PM, Nishanth Menon wrote:
This patch probably was submitted in the wrong sequence - fails build
and few other issues below.
Yeah, I'll double check the build sequence for these.
On 07/23/2013 02:19 AM, Tero Kristo wrote
On 07/31/2013 04:59 AM, Tero Kristo wrote:
On 07/30/2013 09:22 PM, Nishanth Menon wrote:
this patch should be 3/33 to allow dpll.c to build.
On 07/23/2013 02:19 AM, Tero Kristo wrote:
Some of the clock.h contents are needed by the new OMAP clock driver,
including dpll_data and clk_hw_omap
On 07/31/2013 05:13 AM, Tero Kristo wrote:
On 07/30/2013 09:56 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
OMAP clk driver now routes some of the basic clocks through own
registration routine to allow autoidle support. This routine just
checks a couple of device node
On 07/31/2013 05:07 AM, Tero Kristo wrote:
On 07/30/2013 09:40 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
Some devices require their clocks to be available with a specific
dev-id con-id mapping. With DT, the clocks can be found by default
only with their name
On 07/31/2013 09:45 AM, Tero Kristo wrote:
On 07/30/2013 10:17 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
This node adds support for a clock node which allows control to the
clockdomain enable / disable.
Dont we have clkdm_enable/disable for the same? should we
On 07/31/2013 09:52 AM, Tero Kristo wrote:
On 07/30/2013 10:33 PM, Nishanth Menon wrote:
[...]
+DT_CLK(NULL,cpufreq_ck,dpll_mpu_ck),
please remove cpufreq.
Hmm why?
Because cpufreq is completely broken now and your current work on it? :)
cpufreq fixing can be done
On 07/31/2013 09:59 AM, Tero Kristo wrote:
On 07/30/2013 11:00 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
[...]
diff --git a/drivers/clk/omap/clk-33xx.c b/drivers/clk/omap/clk-33xx.c
new file mode 100644
index 000..3ada30e
--- /dev/null
+++ b/drivers/clk/omap
On 07/31/2013 10:03 AM, Tero Kristo wrote:
On 07/30/2013 11:08 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
[...]
pr_err(%s: ti,clk-bypass for %s not found\n, __func__,
clk_name);
goto cleanup;
@@ -225,14 +259,31 @@ static void
On 07/31/2013 10:09 AM, Tero Kristo wrote:
On 07/30/2013 11:23 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
OMAP3 has interface clocks in addition to functional clocks, which
is it just OMAP3?
Yea, only omap3 is using this code. Basically because there is control
-omapm=137536803106017w=2
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SoCs are strewn all over the place
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.
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On 08/01/2013 10:12 AM, Tero Kristo wrote:
On 08/01/2013 05:04 PM, Nishanth Menon wrote:
On 07/31/2013 04:59 AM, Tero Kristo wrote:
On 07/30/2013 09:22 PM, Nishanth Menon wrote:
this patch should be 3/33 to allow dpll.c to build.
On 07/23/2013 02:19 AM, Tero Kristo wrote:
Some
On 08/01/2013 10:18 AM, Tero Kristo wrote:
On 08/01/2013 05:25 PM, Nishanth Menon wrote:
On 07/31/2013 05:07 AM, Tero Kristo wrote:
On 07/30/2013 09:40 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
[..]
if we can get rid of usage of omap_hwmod_get_main_clk by catching
On Thu, Aug 1, 2013 at 10:34 AM, Tero Kristo t-kri...@ti.com wrote:
I think you already dealt with (c). in the same vein, we can do (a) and
(b). Dont think anyone else has gone about this to the extent we are
attempting to do till date, so as pioneers, we might as well suggest
with a patch :D
On Tue, Jul 30, 2013 at 1:52 AM, Tony Lindgren t...@atomide.com wrote:
* Benoit Cousson benoit.cous...@gmail.com [130729 15:24]:
On 29/07/2013 19:03, Nishanth Menon wrote:
Due to wrong older revision of documentation used as reference, we
seem to have a bunch of LDOs wrongly configured
/linux.git/log/?h=for_3.11/out_of_tree/omap5_clk_data
Thanks, I'll have a try.
There is also clock data dts support now in Tero's series:
http://marc.info/?l=linux-omapm=137456411706971w=2
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are these in sync with DRA7 support being introduced for clock data in [1]?
[1] http://marc.info/?l=linux-omapm=137456411706971w=2
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More
required modules in board file, so that we dont have
to respin this yet again?
[1] http://marc.info/?t=13741659941r=1w=2
[2] http://marc.info/?l=linux-omapm=137510358229479w=2
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On 07/30/2013 07:38 AM, Rajendra Nayak wrote:
On Tuesday 30 July 2013 05:56 PM, Nishanth Menon wrote:
On 07/30/2013 06:25 AM, Rajendra Nayak wrote:
From: R Sricharan r.sricha...@ti.com
[...]
# Clock framework
obj-$(CONFIG_ARCH_OMAP2)+= $(clock-common) clock2xxx.o
@@ -181,6
On 07/30/2013 07:41 AM, Rajendra Nayak wrote:
On Tuesday 30 July 2013 06:00 PM, Nishanth Menon wrote:
On 07/30/2013 06:25 AM, Rajendra Nayak wrote:
From: R Sricharan r.sricha...@ti.com
[...]
+mcspi4: spi@480ba000 {
+compatible = ti,omap4-mcspi;
+reg
On 07/30/2013 07:48 AM, Rajendra Nayak wrote:
On Tuesday 30 July 2013 06:11 PM, Nishanth Menon wrote:
On 07/30/2013 07:38 AM, Rajendra Nayak wrote:
On Tuesday 30 July 2013 05:56 PM, Nishanth Menon wrote:
On 07/30/2013 06:25 AM, Rajendra Nayak wrote:
From: R Sricharan r.sricha...@ti.com
On 07/30/2013 07:44 AM, Chen Baozi wrote:
On Jul 30, 2013, at 8:24 PM, Nishanth Menon n...@ti.com wrote:
On 07/30/2013 01:07 AM, Chen Baozi wrote:
On Jul 30, 2013, at 11:52 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
Hi Chen,
On Tuesday 30 July 2013 09:08 AM, Chen Baozi wrote:
Hi all
trying to dereference it.
+ clkdev_add_nolock(cl);
+ }
+
return cl;
}
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License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __LINUX_CLK_OMAP_H_
+#define __LINUX_CLK_OMAP_H_
+
+int __init dt_omap_clk_init(void);
+
+#endif
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(NULL);
+CLK_OF_DECLARE(omap4_dpll_clock, ti,omap4-dpll-clock, of_omap4_dpll_setup);
+#endif
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and
arch/arm/mach-omap2/ - a possible suggestion will be to move required
data structures first and operations as required.
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(struct device_node *node);
#endif
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for keeping soc checks with
dts.
Ya, revision checks used only in few places and as you said
we handle them using IP revisions, but that we have to look and clean
up those places, if we really intend to do this for other socs.
I agree this is the right approach :).
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.
just my 2 cents.
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of_omap_gate_clk_setup(struct device_node *node);
dont need to export I think if we use strategy mentioned previously.
void of_omap_clk_allow_autoidle_all(void);
void of_omap_clk_deny_autoidle_all(void);
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;
}
+ if (of_property_read_bool(node, ti,dpll-no-gate))
+ ops = dpll_no_gate_ck_ops;
+
of_omap_dpll_setup(node, ops);
}
EXPORT_SYMBOL_GPL(of_omap4_dpll_setup);
squash this to dpll patch?
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0x4;
+ bit-mask = 0x1;
+};
[...]
+
+ocp2scp_usb_phy_phy_48m: ocp2scp_usb_phy_phy_48m@4a0093e0 {
_ck?
[...]
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ensure that CLK_SET_RATE_PARENT are setup for the clock
nodes defined by dt?
+
+ return 0;
+}
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Nishanth Menon
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of these seem to be an old style carry forward and should instead
be fixes with generic properties IMHO voiding the need for SoC specific
inits.
instead all we should be doing is call of_clk_init(NULL); at appropriate
init sequence.
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the parameters?
OR:
move this as index 3 which is optional and is not defined for am33xx?
dd-mult_div1_reg = of_iomap(node, 3);
dd-idlest_mask = idlest_mask;
we could probably squash this in original dpll.c as a result?
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, 21 insertions(+), 5 deletions(-)
Documentation/devicetree/bindings/clock/ needs update as well.
[...]
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*enable_init_clks[] = {
+ dpll_ddr_m2_ck,
+ dpll_mpu_m2_ck,
+ l3_gclk,
+ l4hs_gclk,
+ l4fw_gclk,
+ l4ls_gclk,
+ /* Required for external peripherals like, Audio codecs */
+ clkout2_ck,
+};
should be a sort of dt property?
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.
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+ clk_hw-ops = clkhwops_wait;
+ }
num_parents = of_clk_get_parent_count(node);
if (num_parents 1) {
but still no usage of ti,omap-gate-clock makes me question the need
for this file.
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;)
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, ti,omap-interface-clock,
+ of_omap_interface_clk_setup);
+#endif
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model
for the same.
[1] http://marc.info/?t=12723240113r=1w=2
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;
clock-frequency = 4800;
+ status = disabled;
};
mmc1: mmc@4809c000 {
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On 07/29/2013 04:57 AM, Keerthy wrote:
Hi Nishanth,
On Wednesday 17 July 2013 10:15 PM, Nishanth Menon wrote:
Due to wrong older revision of documentation used as reference, we
seem to have a bunch of LDOs wrongly configured on OMAP5 uEVM. This
series is based power tree on production board
On 07/29/2013 08:39 AM, Benoit Cousson wrote:
Hi Nishanth,
On 29/07/2013 15:17, Nishanth Menon wrote:
On 07/29/2013 04:57 AM, Keerthy wrote:
Hi Nishanth,
On Wednesday 17 July 2013 10:15 PM, Nishanth Menon wrote:
Due to wrong older revision of documentation used as reference, we
seem to have
On 07/29/2013 09:19 AM, Benoit Cousson wrote:
2013/7/29 Nishanth Menon n...@ti.com mailto:n...@ti.com
Well you're lucky I'm now in an area with Wifi and 3G access... last
week it whould have been impossible to receive it :-)
hehe :)
All the fixes are sharing more than 50% of the changelog
peripheral or connector on the board.
Further, these unused regulators should have been 2.8V for LDO2 and
3.0V for LDO8. Mark these LDOs as disabled in the dts until needed.
Reported-by: Marc Jüttner m-juett...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: J Keerthy j-keer...@ti.com
---
V2
-by: Marc Jüttner m-juett...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: J Keerthy j-keer...@ti.com
---
V2: squash of multiple patches from V1, as suggested in:
http://marc.info/?l=devicetreem=137510852731656w=2
arch/arm/boot/dts/omap5-uevm.dts | 43
:
- squash of patches
- picked up Ack from Keerthy
- based on v3.11-rc3 tag
V1: http://marc.info/?t=13740798018r=1w=2
Nishanth Menon (3):
ARM: dts: omap5-uevm: document regulator signals used on the actual
board
ARM: dts: omap5-uevm: fix regulator configurations mandatory for SoC
ARM: dts
- which is meant to be supported by this dts.
Reported-by: Marc Jüttner m-juett...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
Acked-by: J Keerthy j-keer...@ti.com
---
V2: no change
V1: https://patchwork.kernel.org/patch/2828862/
arch/arm/boot/dts/omap5-uevm.dts | 18 ++
1
=2
[2] http://marc.info/?l=linux-omapm=137335522802144w=2
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,
Nishanth Menon
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On 07/24/2013 11:38 AM, Santosh Shilimkar wrote:
On Wednesday 24 July 2013 12:08 PM, Nishanth Menon wrote:
That said, maybe a intermediate pinctrl approach might be more pragmatic and
less theoretically flexible.
an option might be to statically allocate default number of interrupts
On 07/24/2013 01:43 PM, Sricharan R wrote:
On Wednesday 24 July 2013 10:17 PM, Nishanth Menon wrote:
On 07/24/2013 11:38 AM, Santosh Shilimkar wrote:
On Wednesday 24 July 2013 12:08 PM, Nishanth Menon wrote:
That said, maybe a intermediate pinctrl approach might be more pragmatic and
less
*/
+ ;
+ };
+};
+
+omap4_pmx_core {
+ twl6030_pins: pinmux_twl6030_pins {
+ pinctrl-single,pins =
+ 0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0)
/* sys_nirq1.sys_nirq1 */
+ ;
+ };
+};
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Nishanth Menon
=137335590702349w=2
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+ interrupts = GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH;
we should be able to do the following:
uart1: serial@4806a000 {
snip
+ interrupts = TI_IRQ_CROSSBAR 192 IRQ_TYPE_LEVEL_HIGH;
and not worry about the GIC interrupt number used
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Nishanth Menon
;
+ };
+
counter32k: counter@4ae04000 {
compatible = ti,omap-counter32k;
reg = 0x4ae04000 0x40;
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