Re: [PATCH 1/6 v2] omap: musb: Adding hwmod data for ti81xx
On Wed, Sep 7, 2011 at 10:32 PM, Ajay Kumar Gupta ajay.gu...@ti.com wrote:
From: Ravi Babu ravib...@ti.com
The usb subsystem (usbss) in ti81xx has two musb interfaces. There are three
irqs and three address spaces for usbss, musb0 and musb1 respectively. Created
one hwmod with three irq and memory resources.
Cc: Benoit Cousson b-cous...@ti.com
Cc: Keshava Munegowda keshava_mgo...@ti.com
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
Signed-off-by: Ravi Babu ravib...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_81xx_data.c | 74
1 files changed, 74 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
index e73a4c6..e960d70 100644
--- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
@@ -194,6 +194,7 @@ static struct omap_hwmod ti81xx_timer4_hwmod;
static struct omap_hwmod ti81xx_timer5_hwmod;
static struct omap_hwmod ti81xx_timer6_hwmod;
static struct omap_hwmod ti81xx_timer7_hwmod;
+static struct omap_hwmod ti81xx_usbss_hwmod;
/* L4 SLOW - TIMER1 interface */
static struct omap_hwmod_addr_space ti81xx_timer1_addr_space[] = {
@@ -650,6 +651,78 @@ static struct omap_hwmod ti81xx_timer7_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X)
};
+/* L3 SLOW - USBSS interface */
+static struct omap_hwmod_addr_space ti81xx_usbss_addr_space[] = {
+ {
+ .name = usbss,
+ .pa_start = 0x4740,
+ .pa_end = 0x4740 + SZ_4K - 1,
+ .flags = ADDR_TYPE_RT
+ },
+ {
+ .name = musb0,
+ .pa_start = 0x47401000,
+ .pa_end = 0x47401000 + SZ_2K - 1,
+ .flags = ADDR_TYPE_RT
+ },
+ {
+ .name = musb1,
+ .pa_start = 0x47401800,
+ .pa_end = 0x47401800 + SZ_2K - 1,
+ .flags = ADDR_TYPE_RT
+ },
+ {
+ },
+};
+
+static struct omap_hwmod_class_sysconfig ti81xx_usbhsotg_sysc = {
+ .rev_offs = 0x0,
+ .sysc_offs = 0x10,
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields = omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class ti81xx_usbotg_class = {
+ .name = usbotg,
+ .sysc = ti81xx_usbhsotg_sysc,
+};
+
+static struct omap_hwmod_irq_info ti81xx_usbss_mpu_irqs[] = {
+ { .name = usbss-irq, .irq = 17, },
+ { .name = musb0-irq, .irq = 18, },
+ { .name = musb1-irq, .irq = 19, },
+ { .irq = -1, },
+};
+
+static struct omap_hwmod_ocp_if ti81xx_l3_slow__usbss = {
+ .master = ti81xx_l3_slow_hwmod,
+ .slave = ti81xx_usbss_hwmod,
+ .clk = usbotg_ick,
+ .addr = ti81xx_usbss_addr_space,
+ .user = OCP_USER_MPU,
+ .flags = OCPIF_SWSUP_IDLE,
+};
+
+static struct omap_hwmod_ocp_if *ti81xx_usbss_slaves[] = {
+ ti81xx_l3_slow__usbss,
+};
+
+static struct omap_hwmod ti81xx_usbss_hwmod = {
+ .name = usb_otg_hs,
+ .mpu_irqs = ti81xx_usbss_mpu_irqs,
+ .main_clk = usbotg_ick,
+ .clkdm_name = default_usb_clkdm,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = TI816X_CM_DEFAULT_USB_CLKCTRL_OFFSET,
+ },
+ },
+ .slaves = ti81xx_usbss_slaves,
+ .slaves_cnt = ARRAY_SIZE(ti81xx_usbss_slaves),
+ .class = ti81xx_usbotg_class,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X)
+};
static __initdata struct omap_hwmod *ti81xx_hwmods[] = {
ti81xx_l3_fast_hwmod,
@@ -668,6 +741,7 @@ static __initdata struct omap_hwmod *ti81xx_hwmods[] = {
ti81xx_timer5_hwmod,
ti81xx_timer6_hwmod,
ti81xx_timer7_hwmod,
+ ti81xx_usbss_hwmod,
NULL,
};
--
1.6.2.4
looks good to me.
keshava
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Re: Tasks schedule/migration issue with CPU hotplug?
Resend with linux-kernel mail list included. On Wed, Sep 7, 2011 at 10:22 PM, TAO HU tgh...@motorola.com wrote: Hi, All We seems got a schedule/migration issue in a OMAP4430 dual-core system. The kernel base is 2.6.35.7 and we're using CFS. In a stress testing, we created a huge amount of processes/threads and forced the 2nd CPU plug/unplug back and forth. Looks like a few tasks such as below ones didn't get scheduled in 8 seconds! omap2_mcspi (pid 21, exec-runtime 2223062.886210) hackbench (pid 3445, exec-runtime 2223114.709956) We believe the two tasks were migrated to the primary CPU. Somehow, they were no selected to run any more. The two tasks have a high exec_runtime value. Can it be a scheduler's bug for tasks migration? Do we need kind of normalization for vruntime when migrating tasks from one CPU to another one? Here is the part of ftrace logs: 0[ 6953.595642] hackbenc-3425 1...2. 2630440327us : 3425:120:S == [001] 3445:120:R ... 0[ 6953.595672] ...-3445 1d..5. 2630440358us : 3445:120:R + [001] 3426:120:R hackbench 0[ 6953.595703] ...-3445 1...2. 2630440388us : 3445:120:R == [001] 3426:120:R hackbench 0[ 6953.595733] hackbenc-3426 1...2. 2630440388us : 3426:120:S == [001] 3445:120:R ... 0[ 6953.595764] ...-3445 1d..5. 2630440419us : 3445:120:R + [001] 3427:120:R hackbench 0[ 6953.595825] ...-3445 1...2. 2630440449us : 3445:120:R == [001] 3427:120:R hackbench ... 0[ 6955.049468] ...-3396 1d..5. 2630462666us : 3396:120:R + [001] 3376:120:R hackbench 0[ 6955.049499] ...-3396 1...2. 2630462697us : 3396:120:R == [001] 2683: 0:R ... 0[ 6955.049560] ...-2683 1...2. 2630463093us : 2683: 0:S == [001] 0: 0:R idle 0[ 6955.049591] idle-0 1d..5. 2630463154us : 0: 0:R + [000] 1642:120:D ... (the 2nd CPU down here) ... ... ... 0[ 6958.913970] hackbenc-3226 0...2. 2638767048us : 3226:120:R == [000] 3223:120:R hackbench 0[ 6958.914001] hackbenc-3223 0d.s7. 2638767110us : 3223:120:S + [000] 2345:120:R crashspi 0[ 6958.914031] hackbenc-3223 0...2. 2638767110us : 3223:120:S == [000] 3226:120:R hackbench 0[ 6958.914062] hackbenc-3226 0...2. 2638767140us : 3226:120:R == [000] 2345:120:R crashspi 0[ 6958.914093] - Here is the threads/process info dump: 4[ 6950.135192] now at 6950549.376887 msecs 4[ 6950.135223] .jiffies : 850755 4[ 6950.135223] .sysctl_sched_latency : 10.00 4[ 6950.135253] .sysctl_sched_min_granularity : 4.00 4[ 6950.135253] .sysctl_sched_wakeup_granularity : 2.00 4[ 6950.135284] .sysctl_sched_child_runs_first : 0.00 4[ 6950.135284] .sysctl_sched_features : 15471 4[ 6950.135284] .sysctl_sched_tunable_scaling : 1 (logaritmic) 4[ 6950.135314] 4[ 6950.135314] cpu#0 4[ 6950.135314] .nr_running : 212 4[ 6950.135345] .load : 217650 4[ 6950.135345] .nr_switches : 144304735 4[ 6950.135375] .nr_load_updates : 847105 4[ 6950.135375] .nr_uninterruptible : 108 4[ 6950.135375] .next_balance : 0.849692 4[ 6950.135406] .curr-pid : 2345 4[ 6950.135406] .clock : 6946109.313964 4[ 6950.135437] .cpu_load[0] : 216626 4[ 6950.135437] .cpu_load[1] : 216865 4[ 6950.135437] .cpu_load[2] : 217114 4[ 6950.135467] .cpu_load[3] : 217240 4[ 6950.135467] .cpu_load[4] : 217318 4[ 6950.135467] .yld_count : 46326 4[ 6950.135498] .sched_switch : 0 4[ 6950.135498] .sched_count : 12385 4[ 6950.135528] .sched_goidle : 2021081 4[ 6950.135528] .avg_idle : 51188 4[ 6950.135528] .ttwu_count : 93102282 4[ 6950.135559] .ttwu_local : 87445098 4[ 6950.135559] .bkl_count : 32006801 4[ 6950.135589] 4[ 6950.135589] cfs_rq[0]:/bg_non_interactive 4[ 6950.135589] .exec_clock : 7934.204110 4[ 6950.135620] .MIN_vruntime : 0.01 4[ 6950.135620] .min_vruntime : 79877.877411 4[ 6950.135650] .max_vruntime : 0.01 4[ 6950.135650] .spread : 0.00 4[ 6950.135650] .spread0 : -2143179.55 4[ 6950.135681] .nr_running : 0 4[ 6950.135681] .load : 0 4[ 6950.135711] .nr_spread_over : 390 4[ 6950.135711] .shares : 0 4[ 6950.135711] .se-exec_start : 6945754.943847 4[ 6950.135742] .se-vruntime
Re: [RFC PATCH 06/10] hwspinlock: OMAP4: Add spinlock support in DT
Hi Ohad,
On 9/7/2011 9:58 PM, Ohad Ben-Cohen wrote:
On Wed, Aug 24, 2011 at 4:09 PM, Benoit Coussonb-cous...@ti.com wrote:
Add a device-tree node for the spinlock.
Remove the static device build code if CONFIG_OF
is set.
Update the hwspinlock driver to use the of_match method.
Add the information in Documentation/devicetree.
Signed-off-by: Benoit Coussonb-cous...@ti.com
Cc: Grant Likelygrant.lik...@secretlab.ca
Cc: Ohad Ben-Coheno...@wizery.com
---
...
+ spinlock {
+ compatible = ti,omap-spinlock;
+ hwmods = spinlock;
+ };
This seem to satisfy the current hwspinlock driver, but I'm wondering
about an issue which was discussed awhile ago by Arnd and Mathieu:
Hwspinlock devices provide system-wide hardware locks that are used by
remote processors that have no other way to achieve synchronization.
For that to work, each physical lock must have a system-wide unique id
number that all processors are familiar with, otherwise they can't
possibly assume they're using the same hardware lock.
Usually SoC have a single hwspinlock device, which provides several
hardware spinlocks, and in this case, the locks can be trivially
numbered 0 to (num-of-locks - 1).
In case boards have several hwspinlocks devices (each of which
providing numerous hardware spinlocks) a different base id should be
used for each hwspinlock device (they can't all use 0 as a starting
id!).
While this is certainly not common, it's just plain wrong for the
hwspinlock driver to silently use 0 as a base id whenever it is probed
with a device (and by that implicitly assume there will always be only
one device).
Hehe, I'm not the one who wrote that driver :-)
This is not wrong for the current HW. The point is do we want to
anticipate potential HW evolution that might never happen on that IP?
So we need to couple an hwspinlock device with a base id (which is
trivially zero when there's only a single hwspinlock device). This can
be easily achieved today using platform data, which boards will use to
set a different base id for each of the hwspinlock devices they have
(i'll send a patch demonstrating this soon), but I'm wondering how to
specify this hwspinlock-specific data with DT: is there an existing
binding we can use for this ? or should we create something like a
baseid one especially for the hwspinlock driver ?
This is no different than the multiple GPIO controllers we have today.
Since we cannot rely on the DT nodes order, I added an explicit id
attribute to provide that information to the driver. And then the baseid
is id * #gpios.
+#if defined(CONFIG_OF)
+static const struct of_device_id spinlock_match[] = {
+ {.compatible = ti,omap-spinlock, },
+ {},
+}
you're missing a semicolon there (yeah I actually tried to build this ;)
That was a test :-)
In fact it looks like this driver is not built with a default
omap2plus_defconfig :-(
I'll fix that.
Thanks for the review,
Benoit
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Re: Tasks schedule/migration issue with CPU hotplug?
On Thu, Sep 08, 2011 at 02:47:08PM +0800, TAO HU wrote:
Resend with linux-kernel mail list included.
Hmm, could you give a try with commit da7a735e?
Thanks,
Yong
---
commit da7a735e51f9622eb3e1672594d4a41da01d7e4f
Author: Peter Zijlstra a.p.zijls...@chello.nl
Date: Mon Jan 17 17:03:27 2011 +0100
sched: Fix switch_from_fair()
When a task is taken out of the fair class we must ensure the vruntime
is properly normalized because when we put it back in it will assume
to be normalized.
The case that goes wrong is when changing away from the fair class
while sleeping. Sleeping tasks have non-normalized vruntime in order
to make sleeper-fairness work. So treat the switch away from fair as a
wakeup and preserve the relative vruntime.
Also update sysrq-n to call the -switch_{to,from} methods.
Reported-by: Onkalo Samu samu.p.onk...@nokia.com
Signed-off-by: Peter Zijlstra a.p.zijls...@chello.nl
LKML-Reference: new-submission
Signed-off-by: Ingo Molnar mi...@elte.hu
On Wed, Sep 7, 2011 at 10:22 PM, TAO HU tgh...@motorola.com wrote:
Hi, All
We seems got a schedule/migration issue in a OMAP4430 dual-core system.
The kernel base is 2.6.35.7 and we're using CFS.
In a stress testing, we created a huge amount of processes/threads and
forced the 2nd CPU plug/unplug back and forth.
Looks like a few tasks such as below ones didn't get scheduled in 8 seconds!
omap2_mcspi ?(pid 21, exec-runtime 2223062.886210)
hackbench (pid 3445, exec-runtime 2223114.709956)
We believe the two tasks were migrated to the primary CPU.
Somehow, they were no selected to run any more.
The two tasks have a high exec_runtime value.
Can it be a scheduler's bug for tasks migration?
Do we need kind of normalization for vruntime when migrating tasks
from one CPU to another one?
Here is the part of ftrace logs:
0[ 6953.595642] hackbenc-3425 ? ?1...2. 2630440327us : ? 3425:120:S
== [001] ?3445:120:R ...
0[ 6953.595672] ? ?...-3445 ? ?1d..5. 2630440358us : ? 3445:120:R
?+ [001] ?3426:120:R hackbench
0[ 6953.595703] ? ?...-3445 ? ?1...2. 2630440388us : ? 3445:120:R
== [001] ?3426:120:R hackbench
0[ 6953.595733] hackbenc-3426 ? ?1...2. 2630440388us : ? 3426:120:S
== [001] ?3445:120:R ...
0[ 6953.595764] ? ?...-3445 ? ?1d..5. 2630440419us : ? 3445:120:R
?+ [001] ?3427:120:R hackbench
0[ 6953.595825] ? ?...-3445 ? ?1...2. 2630440449us : ? 3445:120:R
== [001] ?3427:120:R hackbench
...
0[ 6955.049468] ? ?...-3396 ? ?1d..5. 2630462666us : ? 3396:120:R
?+ [001] ?3376:120:R hackbench
0[ 6955.049499] ? ?...-3396 ? ?1...2. 2630462697us : ? 3396:120:R
== [001] ?2683: ?0:R ...
0[ 6955.049560] ? ?...-2683 ? ?1...2. 2630463093us : ? 2683: ?0:S
== [001] ? ? 0: ?0:R idle
0[ 6955.049591] ? idle-0 ? ? ? 1d..5. 2630463154us : ? ? ?0: ?0:R
?+ [000] ?1642:120:D ... ? (the 2nd CPU down here)
... ...
...
0[ 6958.913970] hackbenc-3226 ? ?0...2. 2638767048us : ? 3226:120:R
== [000] ?3223:120:R hackbench
0[ 6958.914001] hackbenc-3223 ? ?0d.s7. 2638767110us : ? 3223:120:S
?+ [000] ?2345:120:R crashspi
0[ 6958.914031] hackbenc-3223 ? ?0...2. 2638767110us : ? 3223:120:S
== [000] ?3226:120:R hackbench
0[ 6958.914062] hackbenc-3226 ? ?0...2. 2638767140us : ? 3226:120:R
== [000] ?2345:120:R crashspi
0[ 6958.914093] -
Here is the threads/process info dump:
4[ 6950.135192] now at 6950549.376887 msecs
4[ 6950.135223] ? .jiffies ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? : 850755
4[ 6950.135223] ? .sysctl_sched_latency ? ? ? ? ? ? ? ? ? ?: 10.00
4[ 6950.135253] ? .sysctl_sched_min_granularity ? ? ? ? ? ?: 4.00
4[ 6950.135253] ? .sysctl_sched_wakeup_granularity ? ? ? ? : 2.00
4[ 6950.135284] ? .sysctl_sched_child_runs_first ? ? ? ? ? : 0.00
4[ 6950.135284] ? .sysctl_sched_features ? ? ? ? ? ? ? ? ? : 15471
4[ 6950.135284] ? .sysctl_sched_tunable_scaling ? ? ? ? ? ?: 1
(logaritmic)
4[ 6950.135314]
4[ 6950.135314] cpu#0
4[ 6950.135314] ? .nr_running ? ? ? ? ? ? ? ? ? ?: 212
4[ 6950.135345] ? .load ? ? ? ? ? ? ? ? ? ? ? ? ?: 217650
4[ 6950.135345] ? .nr_switches ? ? ? ? ? ? ? ? ? : 144304735
4[ 6950.135375] ? .nr_load_updates ? ? ? ? ? ? ? : 847105
4[ 6950.135375] ? .nr_uninterruptible ? ? ? ? ? ?: 108
4[ 6950.135375] ? .next_balance ? ? ? ? ? ? ? ? ?: 0.849692
4[ 6950.135406] ? .curr-pid ? ? ? ? ? ? ? ? ? ? : 2345
4[ 6950.135406] ? .clock ? ? ? ? ? ? ? ? ? ? ? ? : 6946109.313964
4[ 6950.135437] ? .cpu_load[0] ? ? ? ? ? ? ? ? ? : 216626
4[ 6950.135437] ? .cpu_load[1] ? ? ? ? ? ? ? ? ? : 216865
4[ 6950.135437] ? .cpu_load[2] ? ? ? ? ? ? ? ? ? : 217114
4[ 6950.135467] ? .cpu_load[3] ? ? ? ? ? ? ? ? ? : 217240
4[ 6950.135467] ? .cpu_load[4] ? ? ? ? ? ? ? ? ? : 217318
4[ 6950.135467] ? .yld_count ? ? ? ? ? ? ? ? ? ? : 46326
4[ 6950.135498] ? .sched_switch ? ? ? ? ? ? ? ? ?: 0
4[ 6950.135498] ? .sched_count ? ?
Re: Tasks schedule/migration issue with CPU hotplug?
On Thu, Sep 08, 2011 at 03:28:01PM +0800, Yong Zhang wrote:
On Thu, Sep 08, 2011 at 02:47:08PM +0800, TAO HU wrote:
Resend with linux-kernel mail list included.
Hmm, could you give a try with commit da7a735e?
Thanks,
Yong
---
commit da7a735e51f9622eb3e1672594d4a41da01d7e4f
Author: Peter Zijlstra a.p.zijls...@chello.nl
Date: Mon Jan 17 17:03:27 2011 +0100
sched: Fix switch_from_fair()
When a task is taken out of the fair class we must ensure the vruntime
is properly normalized because when we put it back in it will assume
to be normalized.
The case that goes wrong is when changing away from the fair class
while sleeping. Sleeping tasks have non-normalized vruntime in order
to make sleeper-fairness work. So treat the switch away from fair as a
wakeup and preserve the relative vruntime.
Also update sysrq-n to call the -switch_{to,from} methods.
Reported-by: Onkalo Samu samu.p.onk...@nokia.com
Signed-off-by: Peter Zijlstra a.p.zijls...@chello.nl
LKML-Reference: new-submission
Signed-off-by: Ingo Molnar mi...@elte.hu
On Wed, Sep 7, 2011 at 10:22 PM, TAO HU tgh...@motorola.com wrote:
4[ 6950.136230] cfs_rq[0]:/
4[ 6950.136230] ? .exec_clock ? ? ? ? ? ? ? ? ? ?: 6520265.283900
4[ 6950.136260] ? .MIN_vruntime ? ? ? ? ? ? ? ? ?: 2223057.428522
4[ 6950.136260] ? .min_vruntime ? ? ? ? ? ? ? ? ?: 2223057.428522
4[ 6950.136291] ? .max_vruntime ? ? ? ? ? ? ? ? ?: 2223114.709956
4[ 6950.136291] ? .spread ? ? ? ? ? ? ? ? ? ? ? ?: 57.281434
4[ 6950.136291] ? .spread0 ? ? ? ? ? ? ? ? ? ? ? : 0.00
4[ 6950.136322] ? .nr_running ? ? ? ? ? ? ? ? ? ?: 212
4[ 6950.136322] ? .load ? ? ? ? ? ? ? ? ? ? ? ? ?: 217650
4[ 6950.136352] ? .nr_spread_over ? ? ? ? ? ? ? ?: 125034
4[ 6950.136352] ? .shares ? ? ? ? ? ? ? ? ? ? ? ?: 0
4[ 6950.136352]
4[ 6950.136566] runnable tasks:
4[ 6950.136566] ? ? ? ? ? ? task ? PID ? ? ? ? tree-key ?switches
prio ? ? exec-runtime ? ? ? ? sum-exec ? ? ? ?sum-sleep
4[ 6950.136596]
--
4[ 6950.136627] ? ? ?omap2_mcspi ? ?21 ? 2223062.886210 ?29451523
The tree-key(2223062.886210) almost equals to cfs_rq.min_vruntime,
so maybe you hit the bug which is cured by the mentioned commit.
Thanks,
Yong
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Re: [PATCH 1/8] OMAP: hwmod: Fix the addr spaces count API.
Hi Sricharan,
On 9/8/2011 7:22 AM, Shilimkar, Santosh wrote:
From: sricharanr.sricha...@ti.com
The address space count API returns the number of address space
entries for a hwmod including a additional null value present in the
address space structure introduced recently.
That's a minor nit, but you might give the commit you are referencing here.
The devices which
have multiple hwmods and use device_build_ss are broken with this,
as their address resources are populated with a extra null value,
subsequently the probe fails. So fix the API not to add the null value.
It seems that in every cases, we are adding an extra null resource for
nothing. But it is true that will not crash if the driver is just
expecting an unique entry.
What is happening with multiple hwmods is probably the introduction of
that extra null resource in the middle of the real ones, hence shifting
the resource index?
You might give more details here.
Signed-off-by: sricharanr.sricha...@ti.com
Signed-off-by: Santosh Shilimkarsantosh.shilim...@ti.com
Cc: Benoit Coussonb-cous...@ti.com
Cc: Paul Walmsleyp...@pwsan.com
Cc: Kevin Hilmankhil...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c |8 +---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 84cc0bd..32a0f48a 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -791,9 +791,11 @@ static int _count_ocp_if_addr_spaces(struct
omap_hwmod_ocp_if *os)
if (!os || !os-addr)
return 0;
- do {
- mem =os-addr[i++];
- } while (mem-pa_start != mem-pa_end);
+ mem =os-addr[i];
+
+ while (mem-pa_start != mem-pa_end) {
+ mem =os-addr[++i];
+ };
return i;
Cannot you just do return i - 1?
Regards,
Benoit
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Re: [RFC PATCH 06/10] hwspinlock: OMAP4: Add spinlock support in DT
Hi Benoit, On Thu, Sep 8, 2011 at 10:14 AM, Cousson, Benoit b-cous...@ti.com wrote: Hehe, I'm not the one who wrote that driver :-) This is not wrong for the current HW. The point is do we want to anticipate potential HW evolution that might never happen on that IP? I originally really thought we can ignore those cases (hence the 0 base id ;), and personally I still think the scenario is a bit fictional, and wouldn't even mind just having omap_hwspinlock_probe() return an error if it is unexpectedly probed with a second device. But if fixing this entirely only means doing a small change, then it's surely nicer. This is no different than the multiple GPIO controllers we have today. Since we cannot rely on the DT nodes order, I added an explicit id attribute to provide that information to the driver. And then the baseid is id * #gpios. That would work if #hwspinlock is a fixed number, but a baseid attribute would allow supporting devices with different #hwspinlocks per device. Since I am not aware of any real hardware that does this kind of blasphemy, I can't say if the latter is really necessary :) If you prefer the former, I'm entirely fine with it. Thanks, Ohad. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/6 v2] omap: musb: Adding hwmod data for ti81xx
Hi,
On Thu, Sep 08, 2011 at 11:56:25AM +0530, Munegowda, Keshava wrote:
On Wed, Sep 7, 2011 at 10:32 PM, Ajay Kumar Gupta ajay.gu...@ti.com wrote:
From: Ravi Babu ravib...@ti.com
The usb subsystem (usbss) in ti81xx has two musb interfaces. There are three
irqs and three address spaces for usbss, musb0 and musb1 respectively.
Created
one hwmod with three irq and memory resources.
Cc: Benoit Cousson b-cous...@ti.com
Cc: Keshava Munegowda keshava_mgo...@ti.com
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
Signed-off-by: Ravi Babu ravib...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_81xx_data.c | 74
1 files changed, 74 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
index e73a4c6..e960d70 100644
--- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
@@ -194,6 +194,7 @@ static struct omap_hwmod ti81xx_timer4_hwmod;
static struct omap_hwmod ti81xx_timer5_hwmod;
static struct omap_hwmod ti81xx_timer6_hwmod;
static struct omap_hwmod ti81xx_timer7_hwmod;
+static struct omap_hwmod ti81xx_usbss_hwmod;
/* L4 SLOW - TIMER1 interface */
static struct omap_hwmod_addr_space ti81xx_timer1_addr_space[] = {
@@ -650,6 +651,78 @@ static struct omap_hwmod ti81xx_timer7_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X)
};
+/* L3 SLOW - USBSS interface */
+static struct omap_hwmod_addr_space ti81xx_usbss_addr_space[] = {
+ {
+ .name = usbss,
+ .pa_start = 0x4740,
+ .pa_end = 0x4740 + SZ_4K - 1,
+ .flags = ADDR_TYPE_RT
+ },
+ {
+ .name = musb0,
+ .pa_start = 0x47401000,
+ .pa_end = 0x47401000 + SZ_2K - 1,
+ .flags = ADDR_TYPE_RT
+ },
+ {
+ .name = musb1,
+ .pa_start = 0x47401800,
+ .pa_end = 0x47401800 + SZ_2K - 1,
+ .flags = ADDR_TYPE_RT
+ },
+ {
+ },
+};
+
+static struct omap_hwmod_class_sysconfig ti81xx_usbhsotg_sysc = {
+ .rev_offs = 0x0,
+ .sysc_offs = 0x10,
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields = omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class ti81xx_usbotg_class = {
+ .name = usbotg,
+ .sysc = ti81xx_usbhsotg_sysc,
+};
+
+static struct omap_hwmod_irq_info ti81xx_usbss_mpu_irqs[] = {
+ { .name = usbss-irq, .irq = 17, },
+ { .name = musb0-irq, .irq = 18, },
+ { .name = musb1-irq, .irq = 19, },
+ { .irq = -1, },
+};
+
+static struct omap_hwmod_ocp_if ti81xx_l3_slow__usbss = {
+ .master = ti81xx_l3_slow_hwmod,
+ .slave = ti81xx_usbss_hwmod,
+ .clk = usbotg_ick,
+ .addr = ti81xx_usbss_addr_space,
+ .user = OCP_USER_MPU,
+ .flags = OCPIF_SWSUP_IDLE,
+};
+
+static struct omap_hwmod_ocp_if *ti81xx_usbss_slaves[] = {
+ ti81xx_l3_slow__usbss,
+};
+
+static struct omap_hwmod ti81xx_usbss_hwmod = {
+ .name = usb_otg_hs,
+ .mpu_irqs = ti81xx_usbss_mpu_irqs,
+ .main_clk = usbotg_ick,
+ .clkdm_name = default_usb_clkdm,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs =
TI816X_CM_DEFAULT_USB_CLKCTRL_OFFSET,
+ },
+ },
+ .slaves = ti81xx_usbss_slaves,
+ .slaves_cnt = ARRAY_SIZE(ti81xx_usbss_slaves),
+ .class = ti81xx_usbotg_class,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X)
+};
static __initdata struct omap_hwmod *ti81xx_hwmods[] = {
ti81xx_l3_fast_hwmod,
@@ -668,6 +741,7 @@ static __initdata struct omap_hwmod *ti81xx_hwmods[] = {
ti81xx_timer5_hwmod,
ti81xx_timer6_hwmod,
ti81xx_timer7_hwmod,
+ ti81xx_usbss_hwmod,
NULL,
};
--
1.6.2.4
looks good to me.
how about you reply with your Acked-by then ?
--
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Description: Digital signature
Re: [PATCH 2/2] usb: musb: omap2+: save and restore OTG_INTERFSEL
Hi,
On Wed, Sep 07, 2011 at 02:52:02PM +0400, Sergei Shtylyov wrote:
Hello.
On 07-09-2011 4:49, Vikram Pandita wrote:
From: Hema HK hem...@ti.com
we need to save and restore OTG_INTERFSEL register
else we will be unable to function on resume after
OFF mode.
Change-Id: I6c29c69596d5f47e00cf74ab0e32bb44ef71dda9
Remove this, please.
Reported-by: Devaraj Rangasamyd...@ti.com
Signed-off-by: Hema HKhem...@ti.com
Signed-off-by: Kishon Vijay Abraham Ikis...@ti.com
---
drivers/usb/musb/musb_core.h |1 +
drivers/usb/musb/omap2430.c |6 ++
2 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index b3c065a..3259a6b 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -311,6 +311,7 @@ struct musb_context_registers {
u8 index, testmode;
u8 devctl, busctl, misc;
+u32 otg_interfsel;
Shouldn't this be encosed in #ifdef?
Actually, this is part of the OMAP wrapper, so it would be better if you
would, instead, take care of this in omap2430.c.
--
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Description: Digital signature
Re: [RFC PATCH 06/10] hwspinlock: OMAP4: Add spinlock support in DT
On 9/8/2011 9:56 AM, Ohad Ben-Cohen wrote: Hi Benoit, On Thu, Sep 8, 2011 at 10:14 AM, Cousson, Benoitb-cous...@ti.com wrote: Hehe, I'm not the one who wrote that driver :-) This is not wrong for the current HW. The point is do we want to anticipate potential HW evolution that might never happen on that IP? I originally really thought we can ignore those cases (hence the 0 base id ;), and personally I still think the scenario is a bit fictional, and wouldn't even mind just having omap_hwspinlock_probe() return an error if it is unexpectedly probed with a second device. But if fixing this entirely only means doing a small change, then it's surely nicer. That should not be a big deal to add that kind of support. This is no different than the multiple GPIO controllers we have today. Since we cannot rely on the DT nodes order, I added an explicit id attribute to provide that information to the driver. And then the baseid is id * #gpios. That would work if #hwspinlock is a fixed number, but a baseid attribute would allow supporting devices with different #hwspinlocks per device. Since I am not aware of any real hardware that does this kind of blasphemy, I can't say if the latter is really necessary :) If you prefer the former, I'm entirely fine with it. The (small) issue for my point of view is that the #hwspinlock is already encoded in the IP itself. So adding a baseid directly in DT will look like duplicating indirectly something that is already there in the HW. That being said, since we cannot rely on the order, we will not be able to get the proper baseid until the driver probe every hwspinlock devices :-( So baseid might be a easier choice. Regards, Benoit -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 06/10] hwspinlock: OMAP4: Add spinlock support in DT
On Thu, Sep 8, 2011 at 11:07 AM, Cousson, Benoit b-cous...@ti.com wrote: The (small) issue for my point of view is that the #hwspinlock is already encoded in the IP itself. So adding a baseid directly in DT will look like duplicating indirectly something that is already there in the HW. That being said, since we cannot rely on the order, we will not be able to get the proper baseid until the driver probe every hwspinlock devices :-( So baseid might be a easier choice. Sounds good. Thanks a lot ! -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/6 v2] omap: musb: Adding hwmod data for ti81xx
On Thu, Sep 8, 2011 at 1:30 PM, Felipe Balbi ba...@ti.com wrote:
Hi,
On Thu, Sep 08, 2011 at 11:56:25AM +0530, Munegowda, Keshava wrote:
On Wed, Sep 7, 2011 at 10:32 PM, Ajay Kumar Gupta ajay.gu...@ti.com wrote:
From: Ravi Babu ravib...@ti.com
The usb subsystem (usbss) in ti81xx has two musb interfaces. There are
three
irqs and three address spaces for usbss, musb0 and musb1 respectively.
Created
one hwmod with three irq and memory resources.
Cc: Benoit Cousson b-cous...@ti.com
Cc: Keshava Munegowda keshava_mgo...@ti.com
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
Signed-off-by: Ravi Babu ravib...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_81xx_data.c | 74
1 files changed, 74 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
index e73a4c6..e960d70 100644
--- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
@@ -194,6 +194,7 @@ static struct omap_hwmod ti81xx_timer4_hwmod;
static struct omap_hwmod ti81xx_timer5_hwmod;
static struct omap_hwmod ti81xx_timer6_hwmod;
static struct omap_hwmod ti81xx_timer7_hwmod;
+static struct omap_hwmod ti81xx_usbss_hwmod;
/* L4 SLOW - TIMER1 interface */
static struct omap_hwmod_addr_space ti81xx_timer1_addr_space[] = {
@@ -650,6 +651,78 @@ static struct omap_hwmod ti81xx_timer7_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X)
};
+/* L3 SLOW - USBSS interface */
+static struct omap_hwmod_addr_space ti81xx_usbss_addr_space[] = {
+ {
+ .name = usbss,
+ .pa_start = 0x4740,
+ .pa_end = 0x4740 + SZ_4K - 1,
+ .flags = ADDR_TYPE_RT
+ },
+ {
+ .name = musb0,
+ .pa_start = 0x47401000,
+ .pa_end = 0x47401000 + SZ_2K - 1,
+ .flags = ADDR_TYPE_RT
+ },
+ {
+ .name = musb1,
+ .pa_start = 0x47401800,
+ .pa_end = 0x47401800 + SZ_2K - 1,
+ .flags = ADDR_TYPE_RT
+ },
+ {
+ },
+};
+
+static struct omap_hwmod_class_sysconfig ti81xx_usbhsotg_sysc = {
+ .rev_offs = 0x0,
+ .sysc_offs = 0x10,
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields = omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class ti81xx_usbotg_class = {
+ .name = usbotg,
+ .sysc = ti81xx_usbhsotg_sysc,
+};
+
+static struct omap_hwmod_irq_info ti81xx_usbss_mpu_irqs[] = {
+ { .name = usbss-irq, .irq = 17, },
+ { .name = musb0-irq, .irq = 18, },
+ { .name = musb1-irq, .irq = 19, },
+ { .irq = -1, },
+};
+
+static struct omap_hwmod_ocp_if ti81xx_l3_slow__usbss = {
+ .master = ti81xx_l3_slow_hwmod,
+ .slave = ti81xx_usbss_hwmod,
+ .clk = usbotg_ick,
+ .addr = ti81xx_usbss_addr_space,
+ .user = OCP_USER_MPU,
+ .flags = OCPIF_SWSUP_IDLE,
+};
+
+static struct omap_hwmod_ocp_if *ti81xx_usbss_slaves[] = {
+ ti81xx_l3_slow__usbss,
+};
+
+static struct omap_hwmod ti81xx_usbss_hwmod = {
+ .name = usb_otg_hs,
+ .mpu_irqs = ti81xx_usbss_mpu_irqs,
+ .main_clk = usbotg_ick,
+ .clkdm_name = default_usb_clkdm,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs =
TI816X_CM_DEFAULT_USB_CLKCTRL_OFFSET,
+ },
+ },
+ .slaves = ti81xx_usbss_slaves,
+ .slaves_cnt = ARRAY_SIZE(ti81xx_usbss_slaves),
+ .class = ti81xx_usbotg_class,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_TI816X | CHIP_IS_TI814X)
+};
static __initdata struct omap_hwmod *ti81xx_hwmods[] = {
ti81xx_l3_fast_hwmod,
@@ -668,6 +741,7 @@ static __initdata struct omap_hwmod *ti81xx_hwmods[] =
{
ti81xx_timer5_hwmod,
ti81xx_timer6_hwmod,
ti81xx_timer7_hwmod,
+ ti81xx_usbss_hwmod,
NULL,
};
--
1.6.2.4
looks good to me.
how about you reply with your Acked-by then ?
--
balbi
yes balbi,
here it is
Acked-By: Keshava Munegowda keshava_mgo...@ti.com
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RE: [PATCH 1/8] OMAP: hwmod: Fix the addr spaces count API.
Hi Benoit,
-Original Message-
From: Sricharan R [mailto:r.sricha...@ti.com]
Sent: Thursday, September 08, 2011 2:35 PM
To: Sricharan R
Subject: Re: [PATCH 1/8] OMAP: hwmod: Fix the addr spaces count API.
Hi Sricharan,
On 9/8/2011 7:22 AM, Shilimkar, Santosh wrote:
From: sricharanr.sricha...@ti.com
The address space count API returns the number of address space
entries for a hwmod including a additional null value present in the
address space structure introduced recently.
That's a minor nit, but you might give the commit you are referencing
here.
Ok i will mention the below in detail and resend.
commit 78183f3fdf76f422431a81852468be01b36db325
The devices which
have multiple hwmods and use device_build_ss are broken with this,
as their address resources are populated with a extra null value,
subsequently the probe fails. So fix the API not to add the null value.
It seems that in every cases, we are adding an extra null resource for
nothing. But it is true that will not crash if the driver is just
expecting an unique entry.
What is happening with multiple hwmods is probably the introduction of
that extra null resource in the middle of the real ones, hence shifting
the resource index?
You might give more details here.
That is exactly correct.
So because of the introduction of the null structure in the middle,
the subsequent resource indexes gets shifted by one. So the
original index used by the drivers in those places would return a NULL
resource now, hence the problem.
Signed-off-by: sricharanr.sricha...@ti.com
Signed-off-by: Santosh Shilimkarsantosh.shilim...@ti.com
Cc: Benoit Coussonb-cous...@ti.com
Cc: Paul Walmsleyp...@pwsan.com
Cc: Kevin Hilmankhil...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c |8 +---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c
b/arch/arm/mach-omap2/omap_hwmod.c
index 84cc0bd..32a0f48a 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -791,9 +791,11 @@ static int _count_ocp_if_addr_spaces(struct
omap_hwmod_ocp_if *os)
if (!os || !os-addr)
return 0;
-do {
-mem =os-addr[i++];
-} while (mem-pa_start != mem-pa_end);
+mem =os-addr[i];
+
+while (mem-pa_start != mem-pa_end) {
+mem =os-addr[++i];
+};
return i;
Cannot you just do return i - 1?
Right. That was the first idea.
But after some discussion concluded that
right way is to, not to take in to account, the
null structure itself, rather than incrementing and
decrementing.
Regards,
Benoit
Thanks,
Sricharan
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Re: [PATCH 1/8] OMAP: hwmod: Fix the addr spaces count API.
On Thursday 08 September 2011 02:45 PM, Sricharan R wrote:
Hi Benoit,
-Original Message-
From: Sricharan R [mailto:r.sricha...@ti.com]
Sent: Thursday, September 08, 2011 2:35 PM
To: Sricharan R
Subject: Re: [PATCH 1/8] OMAP: hwmod: Fix the addr spaces count API.
[...]
diff --git a/arch/arm/mach-omap2/omap_hwmod.c
b/arch/arm/mach-omap2/omap_hwmod.c
index 84cc0bd..32a0f48a 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -791,9 +791,11 @@ static int _count_ocp_if_addr_spaces(struct
omap_hwmod_ocp_if *os)
if (!os || !os-addr)
return 0;
- do {
- mem =os-addr[i++];
- } while (mem-pa_start != mem-pa_end);
+ mem =os-addr[i];
+
This extran line isn't needed Sricharan.
+ while (mem-pa_start != mem-pa_end) {
+ mem =os-addr[++i];
+ };
return i;
Cannot you just do return i - 1?
Right. That was the first idea.
But after some discussion concluded that
right way is to, not to take in to account, the
null structure itself, rather than incrementing and
decrementing.
I was the one who objected to the i-1 or i--
change. The count logic itself should
handle all the scenario's.
Regards
Santosh
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[PATCH] OMAP2PLUS: DSS: Ensure DSS works correctly if display is enabled in bootloader
Resetting DISPC when a DISPC output is enabled causes the DSS to go into an
inconsistent state. Thus if the bootloader has enabled a display, the hwmod code
cannot reset the DISPC module just like that, but the outputs need to be
disabled first.
Add function dispc_disable_outputs() which disables all active overlay manager
and ensure all frame transfers are completed.
Modify omap_dss_reset() to call this function and clear DSS_CONTROL,
DSS_SDI_CONTROL and DSS_PLL_CONTROL so that DSS is in a clean state when the
DSS2 driver starts.
Tested-by: R, Sricharan r.sricha...@ti.com
Signed-off-by: Archit Taneja arc...@ti.com
---
Note:
This resolves the hang issue(caused by a L3 errod during boot) seen on the
beagle board C3, which has a factory bootloader that enables display. The issue
is resovled with this patch.
The patch depends on a HWMOD patch series which has been posted by Tomi, it can
be tested by applying over the following branch:
https://gitorious.org/linux-omap-dss2/linux/commits/master
arch/arm/mach-omap2/display.c | 110 +
1 files changed, 110 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 93db7c1..eab81f4 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -30,6 +30,30 @@
#include control.h
+#define DISPC_BASE_OMAP2 0x48050400
+#define DISPC_BASE_OMAP4 0x48041000
+
+#define DISPC_REG(base, offset)(base + offset)
+
+#define DISPC_CONTROL 0x0040
+#define DISPC_CONTROL2 0x0238
+#define DISPC_IRQSTATUS0x0018
+
+#define DSS_SYSCONFIG 0x10
+#define DSS_SYSSTATUS 0x14
+#define DSS_CONTROL0x40
+#define DSS_SDI_CONTROL0x44
+#define DSS_PLL_CONTROL0x48
+
+#define LCD_EN_MASK(0x1 0)
+#define DIGIT_EN_MASK (0x1 1)
+
+#define FRAMEDONE_IRQ_SHIFT0
+#define EVSYNC_EVEN_IRQ_SHIFT 2
+#define EVSYNC_ODD_IRQ_SHIFT 3
+#define FRAMEDONE2_IRQ_SHIFT 22
+#define FRAMEDONETV_IRQ_SHIFT 24
+
static struct platform_device omap_display_device = {
.name = omapdss,
.id= -1,
@@ -182,6 +206,78 @@ int __init omap_display_init(struct omap_dss_board_info
*board_data)
return r;
}
+static void dispc_disable_outputs(void)
+{
+ u32 val, irq_mask, base;
+ bool lcd_en, digit_en, lcd2_en = false;
+ int i, num_mgrs;
+
+ if (cpu_is_omap44xx()) {
+ base = DISPC_BASE_OMAP4;
+ num_mgrs = 3;
+ } else {
+ base = DISPC_BASE_OMAP2;
+ num_mgrs = 2;
+ }
+
+ /* store value of LCDENABLE and DIGITENABLE bits */
+ val = omap_readl(DISPC_REG(base, DISPC_CONTROL));
+ lcd_en = val LCD_EN_MASK;
+ digit_en = val DIGIT_EN_MASK;
+
+ /* store value of LCDENABLE for LCD2 */
+ if (num_mgrs 2) {
+ val = omap_readl(DISPC_REG(base, DISPC_CONTROL2));
+ lcd2_en = val LCD_EN_MASK;
+ }
+
+ /*
+* If any manager was enabled, we need to disable it before DSS clocks
+* are disabled or DISPC module is reset
+*/
+ if (lcd_en || digit_en || lcd2_en) {
+ irq_mask = (lcd_en ? 1 : 0) FRAMEDONE_IRQ_SHIFT;
+
+ if (cpu_is_omap44xx())
+ irq_mask |= (digit_en ? 1 : 0) FRAMEDONETV_IRQ_SHIFT;
+ else
+ irq_mask |= (digit_en ? 1 : 0) EVSYNC_EVEN_IRQ_SHIFT
|
+ (digit_en ? 1 : 0) EVSYNC_ODD_IRQ_SHIFT;
+
+ irq_mask |= (lcd2_en ? 1 : 0) FRAMEDONE2_IRQ_SHIFT;
+
+ /*
+* clear any previous FRAMEDONE, FRAMEDONETV, EVSYNC_EVEN/ODD
+* or FRAMEDONE2 interrupts
+*/
+ omap_writel(irq_mask, DISPC_REG(base, DISPC_IRQSTATUS));
+
+ /* disable LCD and TV managers */
+ val = omap_readl(DISPC_REG(base, DISPC_CONTROL));
+ val = ~(LCD_EN_MASK | DIGIT_EN_MASK);
+ omap_writel(val, DISPC_REG(base, DISPC_CONTROL));
+
+ /* disable LCD2 manager */
+ if (num_mgrs 2) {
+ val = omap_readl(DISPC_REG(base, DISPC_CONTROL2));
+ val = ~LCD_EN_MASK;
+ omap_writel(val, DISPC_REG(base, DISPC_CONTROL2));
+ }
+
+ i = 0;
+ while ((omap_readl(DISPC_REG(base, DISPC_IRQSTATUS))
irq_mask) !=
+ irq_mask) {
+ i++;
+ if (i 100) {
+ printk(KERN_ERR didn't get FRAMEDONE1/2 or TV
+interrupt\n);
+ break;
+ }
+ mdelay(1);
+ }
+ }
+}
+
#define MAX_MODULE_SOFTRESET_WAIT
Re: [PATCH 3/6 v2] omap: musb: ti81xx: Add phy power function
Hello.
On 07-09-2011 21:02, Ajay Kumar Gupta wrote:
Adding ti81xx_musb_phy_power() which will be used by musb driver through
its function pointer in board_data.
Signed-off-by: Ajay Kumar Guptaajay.gu...@ti.com
Signed-off-by: Ravi Baburavib...@ti.com
---
arch/arm/mach-omap2/omap_phy_internal.c | 24 +++
arch/arm/plat-omap/include/plat/usb.h | 32 +++
2 files changed, 56 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c
b/arch/arm/mach-omap2/omap_phy_internal.c
index 58775e3..352b6af 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -260,3 +260,27 @@ void am35x_set_mode(u8 musb_mode)
omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
}
+
+void ti81xx_musb_phy_power(u8 on)
+{
+ u32 usbphycfg = omap_ctrl_readl(USBCTRL0);
+
+ if (on) {
+ if (cpu_is_ti816x()) {
+ usbphycfg |= TI816X_USBPHY0_NORMAL_MODE;
+ usbphycfg = ~TI816X_USBPHY_REFCLK_OSC;
+ } else if (cpu_is_ti814x()) {
+ usbphycfg= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN
+ | USBPHY_DPINPUT | USBPHY_DMINPUT);
+ usbphycfg |= (USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN
+ | USBPHY_DPOPBUFCTL | USBPHY_DPOPBUFCTL);
Same #define repeated twice?
WBR, Sergei
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RE: [PATCH 3/6 v2] omap: musb: ti81xx: Add phy power function
Hi,
On 07-09-2011 21:02, Ajay Kumar Gupta wrote:
Adding ti81xx_musb_phy_power() which will be used by musb driver
through
its function pointer in board_data.
Signed-off-by: Ajay Kumar Guptaajay.gu...@ti.com
Signed-off-by: Ravi Baburavib...@ti.com
---
arch/arm/mach-omap2/omap_phy_internal.c | 24
+++
arch/arm/plat-omap/include/plat/usb.h | 32
+++
2 files changed, 56 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-
omap2/omap_phy_internal.c
index 58775e3..352b6af 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -260,3 +260,27 @@ void am35x_set_mode(u8 musb_mode)
omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
}
+
+void ti81xx_musb_phy_power(u8 on)
+{
+ u32 usbphycfg = omap_ctrl_readl(USBCTRL0);
+
+ if (on) {
+ if (cpu_is_ti816x()) {
+ usbphycfg |= TI816X_USBPHY0_NORMAL_MODE;
+ usbphycfg = ~TI816X_USBPHY_REFCLK_OSC;
+ } else if (cpu_is_ti814x()) {
+ usbphycfg= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN
+ | USBPHY_DPINPUT | USBPHY_DMINPUT);
+ usbphycfg |= (USBPHY_OTGVDET_EN |
USBPHY_OTGSESSEND_EN
+ | USBPHY_DPOPBUFCTL | USBPHY_DPOPBUFCTL);
Same #define repeated twice?
Good catch.. thanks. One of them should be USBPHY_DMOPBUFCTL, will fix in v3.
Ajay
WBR, Sergei
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RE: [PATCH 1/6 v2] omap: musb: Adding hwmod data for ti81xx
Hi, ajay.gu...@ti.com wrote: [...] -- 1.6.2.4 looks good to me. how about you reply with your Acked-by then ? -- balbi yes balbi, here it is Acked-By: Keshava Munegowda keshava_mgo...@ti.com Tony and Benoit, Please review this patch and provide your input on this. Thanks, Ajay -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] OMAP2PLUS: DSS: Ensure DSS works correctly if display is enabled in bootloader
Hi,
I guess this should go through Paul. Paul, this is based on the DSS
HWMOD patches from me, and needed for cases where the bootloader has
enabled the DSS.
On Thu, 2011-09-08 at 15:26 +0530, Archit Taneja wrote:
Resetting DISPC when a DISPC output is enabled causes the DSS to go into an
inconsistent state. Thus if the bootloader has enabled a display, the hwmod
code
cannot reset the DISPC module just like that, but the outputs need to be
disabled first.
Add function dispc_disable_outputs() which disables all active overlay manager
and ensure all frame transfers are completed.
Modify omap_dss_reset() to call this function and clear DSS_CONTROL,
DSS_SDI_CONTROL and DSS_PLL_CONTROL so that DSS is in a clean state when the
DSS2 driver starts.
Tested-by: R, Sricharan r.sricha...@ti.com
Signed-off-by: Archit Taneja arc...@ti.com
---
Note:
This resolves the hang issue(caused by a L3 errod during boot) seen on the
beagle board C3, which has a factory bootloader that enables display. The
issue
is resovled with this patch.
This note would be useful to have in the actual commit desc also. (with
error and resolved typofixed =).
Acked-by: Tomi Valkeinen tomi.valkei...@ti.com
Tomi
The patch depends on a HWMOD patch series which has been posted by Tomi, it
can
be tested by applying over the following branch:
https://gitorious.org/linux-omap-dss2/linux/commits/master
arch/arm/mach-omap2/display.c | 110
+
1 files changed, 110 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 93db7c1..eab81f4 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -30,6 +30,30 @@
#include control.h
+#define DISPC_BASE_OMAP2 0x48050400
+#define DISPC_BASE_OMAP4 0x48041000
+
+#define DISPC_REG(base, offset) (base + offset)
+
+#define DISPC_CONTROL0x0040
+#define DISPC_CONTROL2 0x0238
+#define DISPC_IRQSTATUS 0x0018
+
+#define DSS_SYSCONFIG0x10
+#define DSS_SYSSTATUS0x14
+#define DSS_CONTROL 0x40
+#define DSS_SDI_CONTROL 0x44
+#define DSS_PLL_CONTROL 0x48
+
+#define LCD_EN_MASK (0x1 0)
+#define DIGIT_EN_MASK(0x1 1)
+
+#define FRAMEDONE_IRQ_SHIFT 0
+#define EVSYNC_EVEN_IRQ_SHIFT2
+#define EVSYNC_ODD_IRQ_SHIFT 3
+#define FRAMEDONE2_IRQ_SHIFT 22
+#define FRAMEDONETV_IRQ_SHIFT24
+
static struct platform_device omap_display_device = {
.name = omapdss,
.id= -1,
@@ -182,6 +206,78 @@ int __init omap_display_init(struct omap_dss_board_info
*board_data)
return r;
}
+static void dispc_disable_outputs(void)
+{
+ u32 val, irq_mask, base;
+ bool lcd_en, digit_en, lcd2_en = false;
+ int i, num_mgrs;
+
+ if (cpu_is_omap44xx()) {
+ base = DISPC_BASE_OMAP4;
+ num_mgrs = 3;
+ } else {
+ base = DISPC_BASE_OMAP2;
+ num_mgrs = 2;
+ }
+
+ /* store value of LCDENABLE and DIGITENABLE bits */
+ val = omap_readl(DISPC_REG(base, DISPC_CONTROL));
+ lcd_en = val LCD_EN_MASK;
+ digit_en = val DIGIT_EN_MASK;
+
+ /* store value of LCDENABLE for LCD2 */
+ if (num_mgrs 2) {
+ val = omap_readl(DISPC_REG(base, DISPC_CONTROL2));
+ lcd2_en = val LCD_EN_MASK;
+ }
+
+ /*
+ * If any manager was enabled, we need to disable it before DSS clocks
+ * are disabled or DISPC module is reset
+ */
+ if (lcd_en || digit_en || lcd2_en) {
+ irq_mask = (lcd_en ? 1 : 0) FRAMEDONE_IRQ_SHIFT;
+
+ if (cpu_is_omap44xx())
+ irq_mask |= (digit_en ? 1 : 0) FRAMEDONETV_IRQ_SHIFT;
+ else
+ irq_mask |= (digit_en ? 1 : 0) EVSYNC_EVEN_IRQ_SHIFT
|
+ (digit_en ? 1 : 0) EVSYNC_ODD_IRQ_SHIFT;
+
+ irq_mask |= (lcd2_en ? 1 : 0) FRAMEDONE2_IRQ_SHIFT;
+
+ /*
+ * clear any previous FRAMEDONE, FRAMEDONETV, EVSYNC_EVEN/ODD
+ * or FRAMEDONE2 interrupts
+ */
+ omap_writel(irq_mask, DISPC_REG(base, DISPC_IRQSTATUS));
+
+ /* disable LCD and TV managers */
+ val = omap_readl(DISPC_REG(base, DISPC_CONTROL));
+ val = ~(LCD_EN_MASK | DIGIT_EN_MASK);
+ omap_writel(val, DISPC_REG(base, DISPC_CONTROL));
+
+ /* disable LCD2 manager */
+ if (num_mgrs 2) {
+ val = omap_readl(DISPC_REG(base, DISPC_CONTROL2));
+ val = ~LCD_EN_MASK;
+ omap_writel(val, DISPC_REG(base, DISPC_CONTROL2));
+ }
+
+ i = 0;
+ while ((omap_readl(DISPC_REG(base,
RE: [PATCH 6/6 v2] usb: musb: Add support for ti81xx platform
Hi,
+static int __devinit dsps_probe(struct platform_device *pdev) {
+ const struct platform_device_id *id =
platform_get_device_id(pdev);
+ const struct dsps_musb_wrapper *wrp =
+ (struct dsps_musb_wrapper *)id-driver_data;
+ struct dsps_glue *glue;
+ struct resource *iomem;
+ int ret;
+
+ /* allocate glue */
+ glue = kzalloc(sizeof(*glue), GFP_KERNEL);
+ if (!glue) {
+ dev_err(pdev-dev, unable to allocate glue memory\n);
+ ret = -ENOMEM;
+ goto err0;
+ }
+
+ /* get memory resource */
+ iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!iomem) {
+ dev_err(pdev-dev, failed to get usbss mem resourse\n);
+ ret = -ENODEV;
+ goto err1;
+ }
+
+ glue-dev = pdev-dev;
+ glue-wrp = wrp;
wrp is marked __devinitconst, so I guess you need to copy it here,
instead of just pointing to it.
Will fix in v3.
Thanks,
Ajay
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[PATCH v3 0/2] AM3517: Booting up
This patch-set gets the kernel booting up on a AM3517 EVM. The board is able to boot with ramdisk after this,but the MMC and Ethernet drivers are not up yet. Lots of warnings remain which will be addressed in subsequent patches. The patches are tested on master of tmlind/linux-omap-2.6.git. Kernel version is 3.1-rc3 and last commit on top of which these patches were added is: b148d763841161894ed6629794064065a834aa2b: Linux-omap rebuilt: Updated to use omap_sdrc_init with the folowing commit reverted: f3637a5f2e2eb391ff5757bc83fb5de8f9726464: irq: Always set IRQF_ONESHOT if no primary handler is specified Cc: Sanjeev Premi pr...@ti.com --- Changes in v3: Presence of SR feature is now used to decide if TWL4030 initialisation is to be done or not. Abhilash K V (2): AM35x: Using OMAP3 generic hwmods omap_twl: Prevent SR to enable for am3517/am3505 devices arch/arm/mach-omap2/id.c |2 +- arch/arm/mach-omap2/io.c | 11 +++ arch/arm/mach-omap2/omap_hwmod.c |3 ++- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 18 ++ arch/arm/mach-omap2/pm.c |3 ++- arch/arm/plat-omap/include/plat/cpu.h|2 ++ arch/arm/plat-omap/include/plat/omap_hwmod.h |3 +++ 7 files changed, 39 insertions(+), 3 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 1/2] AM35x: Using OMAP3 generic hwmods
This patch enables AM35x SoCs to use generic OMAP3 hwmods
(i,e. omap3xxx_hwmods) by allowing am35xx_init_early() to
disable the modules which are not present in AM3517.
Reviewed-by: Sanjeev Premi pr...@ti.com
Signed-off-by: Abhilash K V abhilash...@ti.com
---
arch/arm/mach-omap2/io.c | 11 +++
arch/arm/mach-omap2/omap_hwmod.c |3 ++-
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 18 ++
arch/arm/plat-omap/include/plat/omap_hwmod.h |3 +++
4 files changed, 34 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 132724c..135e894 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -239,6 +239,16 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
};
#endif
+static char *am3517_unused_hwmods[] = {
+ iva,
+ sr1_hwmod,
+ sr2_hwmod,
+ mailbox,
+ usb_otg_hs,
+ NULL,
+};
+
+
static void __init _omap2_map_common_io(void)
{
/* Normally devicemaps_init() would flush caches and tlb after
@@ -427,6 +437,7 @@ void __init omap3630_init_early(void)
void __init am35xx_init_early(void)
{
+ omap2_disable_unused_hwmods(am3517_unused_hwmods);
omap2_init_common_infrastructure();
}
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 84cc0bd..bb765b5 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1954,7 +1954,8 @@ int __init omap_hwmod_register(struct omap_hwmod **ohs)
i = 0;
do {
- if (!omap_chip_is(ohs[i]-omap_chip))
+ if (!omap_chip_is(ohs[i]-omap_chip)
+ || (ohs[i]-flags HWMOD_UNUSED))
continue;
r = _register(ohs[i]);
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 25bf43b..5c282bb 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -3281,6 +3281,24 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] =
{
NULL,
};
+void __init omap2_disable_unused_hwmods(char *unused_hwmods[])
+{
+ int index;
+
+ for (index = 0; omap3xxx_hwmods[index]; index++) {
+ char **hwmods = unused_hwmods;
+ while (*hwmods) {
+ if (strcmp(omap3xxx_hwmods[index]-name,
+ *hwmods) == 0) {
+ omap3xxx_hwmods[index]-flags
+ = HWMOD_UNUSED;
+ break;
+ }
+ hwmods++;
+ }
+ }
+}
+
int __init omap3xxx_hwmod_init(void)
{
return omap_hwmod_register(omap3xxx_hwmods);
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 0e329ca..490a95a 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -398,6 +398,7 @@ struct omap_hwmod_omap4_prcm {
* in order to complete the reset. Optional clocks will be disabled
* again after the reset.
* HWMOD_16BIT_REG: Module has 16bit registers
+ * HWMOD_UNUSED: The IP for this module is unused or disabled on current SoC
*/
#define HWMOD_SWSUP_SIDLE (1 0)
#define HWMOD_SWSUP_MSTANDBY (1 1)
@@ -408,6 +409,7 @@ struct omap_hwmod_omap4_prcm {
#define HWMOD_NO_IDLEST(1 6)
#define HWMOD_CONTROL_OPT_CLKS_IN_RESET(1 7)
#define HWMOD_16BIT_REG(1 8)
+#define HWMOD_UNUSED (1 9)
/*
* omap_hwmod._int_flags definitions
@@ -615,5 +617,6 @@ extern int omap2420_hwmod_init(void);
extern int omap2430_hwmod_init(void);
extern int omap3xxx_hwmod_init(void);
extern int omap44xx_hwmod_init(void);
+extern void omap2_disable_unused_hwmods(char *unused_hwmods[]);
#endif
--
1.7.1
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[PATCH v3 2/2] omap_twl: Prevent SR to enable for am3517/am3505 devices
In case of AM3517 AM3505, SmartReflex is not applicable so
we must not enable it. So omap3_twl_init() is now not called
when the processor does not support SR.
This is as per discussion at
http://marc.info/?l=linux-omapm=131417482924928w=2
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Abhilash K V abhilash...@ti.com
---
arch/arm/mach-omap2/id.c |2 +-
arch/arm/mach-omap2/pm.c |3 ++-
arch/arm/plat-omap/include/plat/cpu.h |2 ++
3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 37efb86..da71098 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -202,7 +202,7 @@ static void __init omap3_check_features(void)
if (cpu_is_omap3630())
omap_features |= OMAP3_HAS_192MHZ_CLK;
if (!cpu_is_omap3505() !cpu_is_omap3517())
- omap_features |= OMAP3_HAS_IO_WAKEUP;
+ omap_features |= (OMAP3_HAS_IO_WAKEUP | OMAP3_HAS_SR);
omap_features |= OMAP3_HAS_SDRC;
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 3feb359..8929798 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -254,7 +254,8 @@ postcore_initcall(omap2_common_pm_init);
static int __init omap2_common_pm_late_init(void)
{
/* Init the OMAP TWL parameters */
- omap3_twl_init();
+ if (omap3_has_sr())
+ omap3_twl_init();
omap4_twl_init();
/* Init the voltage layer */
diff --git a/arch/arm/plat-omap/include/plat/cpu.h
b/arch/arm/plat-omap/include/plat/cpu.h
index 67b3d75..294e015 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -491,6 +491,7 @@ extern u32 omap_features;
#define OMAP4_HAS_MPU_1GHZ BIT(8)
#define OMAP4_HAS_MPU_1_2GHZ BIT(9)
#define OMAP4_HAS_MPU_1_5GHZ BIT(10)
+#define OMAP3_HAS_SR BIT(11)
#define OMAP3_HAS_FEATURE(feat,flag) \
@@ -507,6 +508,7 @@ OMAP3_HAS_FEATURE(isp, ISP)
OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
OMAP3_HAS_FEATURE(sdrc, SDRC)
+OMAP3_HAS_FEATURE(sr, SR)
/*
* Runtime detection of OMAP4 features
--
1.7.1
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[PATCH v2 0/3] AM35x: Adding PM init
This patch-set fixes the power and voltage management initialization sequence for AM35x. These patches are dependent on the following patch-set [PATCH v3 0/2] AM3517: Booting up at http://marc.info/?l=linux-kernelm=131548351225196w=2 which gets the AM3517 EVM booting. The patches are tested on master of tmlind/linux-omap-2.6.git. Kernel version is 3.1-rc3 and last commit on top of which these patches were added is: b148d763841161894ed6629794064065a834aa2b: Linux-omap rebuilt: Updated to use omap_sdrc_init with the folowing commit reverted: f3637a5f2e2eb391ff5757bc83fb5de8f9726464: irq: Always set IRQF_ONESHOT if no primary handler is specified Cc: Sanjeev Premi pr...@ti.com --- Changes in v2: * TWL4030 CORE and POWER drivers are no longer built only for ARM and OMAP * changed comments to mark AM35x voltgate-scaling code as ad hoc Abhilash K V (1): OMAP3: Remove auto-selection of PMICs Sanjeev Premi (2): AM35x: voltage: Basic initialization OMAP3: Add support for TPS65023 (AM35x only) arch/arm/configs/omap2plus_defconfig |3 + arch/arm/mach-omap2/Kconfig |3 - arch/arm/mach-omap2/Makefile |3 +- arch/arm/mach-omap2/omap_opp_data.h |1 + arch/arm/mach-omap2/opp3xxx_data.c| 10 +++ arch/arm/mach-omap2/pm.c |4 +- arch/arm/mach-omap2/pm.h |9 +++ arch/arm/mach-omap2/pmic_tps65023.c | 84 + arch/arm/mach-omap2/voltage.c | 18 + arch/arm/mach-omap2/voltagedomains3xxx_data.c | 41 - drivers/mfd/Kconfig |2 +- 11 files changed, 171 insertions(+), 7 deletions(-) create mode 100644 arch/arm/mach-omap2/pmic_tps65023.c -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/3] AM35x: voltage: Basic initialization
From: Sanjeev Premi pr...@ti.com
This patch adds the basic initialization of voltage layer
for AM35x. Since AM35x doesn't support voltage scaling,
Many functions have been defined to plug into existing
voltage layer.
Signed-off-by: Sanjeev Premi pr...@ti.com
Signed-off-by: Abhilash K V abhilash...@ti.com
---
arch/arm/mach-omap2/omap_opp_data.h |1 +
arch/arm/mach-omap2/opp3xxx_data.c| 10 ++
arch/arm/mach-omap2/pm.c |3 +-
arch/arm/mach-omap2/voltage.c | 18 +++
arch/arm/mach-omap2/voltagedomains3xxx_data.c | 41 -
5 files changed, 71 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_opp_data.h
b/arch/arm/mach-omap2/omap_opp_data.h
index c784c12..c7cedf3 100644
--- a/arch/arm/mach-omap2/omap_opp_data.h
+++ b/arch/arm/mach-omap2/omap_opp_data.h
@@ -88,6 +88,7 @@ extern struct omap_volt_data omap34xx_vddmpu_volt_data[];
extern struct omap_volt_data omap34xx_vddcore_volt_data[];
extern struct omap_volt_data omap36xx_vddmpu_volt_data[];
extern struct omap_volt_data omap36xx_vddcore_volt_data[];
+extern struct omap_volt_data am35xx_vdd_volt_data[];
extern struct omap_volt_data omap44xx_vdd_mpu_volt_data[];
extern struct omap_volt_data omap44xx_vdd_iva_volt_data[];
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c
b/arch/arm/mach-omap2/opp3xxx_data.c
index d95f3f9..2337d0f 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -150,6 +150,16 @@ static struct omap_opp_def __initdata
omap36xx_opp_def_list[] = {
OPP_INITIALIZER(iva, false, 8, OMAP3630_VDD_MPU_OPP1G_UV),
};
+/* AM35x
+ *
+ * Fields related to SmartReflex and Voltage Processor are set to 0.
+ */
+struct omap_volt_data am35xx_vdd_volt_data[] = {
+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, 0x0, 0x0, 0x0),
+ VOLT_DATA_DEFINE(0, 0, 0, 0),
+};
+
+
/**
* omap3_opp_init() - initialize omap3 opp table
*/
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 8929798..863b384 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -227,7 +227,8 @@ static void __init omap3_init_voltages(void)
{
if (!cpu_is_omap34xx())
return;
-
+ if (cpu_is_omap3505() || cpu_is_omap3517())
+ return;
omap2_set_init_voltage(mpu, dpll1_ck, mpu_dev);
omap2_set_init_voltage(core, l3_ick, l3_dev);
}
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 9ef3789..3fa0652 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -60,6 +60,12 @@ static struct dentry *voltage_dir;
static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd,
unsigned long target_volt);
+static int volt_scale_nop(struct omap_vdd_info *vdd,
+ unsigned long target_volt)
+{
+ return 0;
+}
+
static u32 omap3_voltage_read_reg(u16 mod, u8 offset)
{
return omap2_prm_read_mod_reg(mod, offset);
@@ -114,6 +120,12 @@ static int __init _config_common_vdd_data(struct
omap_vdd_info *vdd)
sys_clk_speed /= 1000;
/* Generic voltage parameters */
+ if (cpu_is_omap3505() || cpu_is_omap3517()) {
+ vdd-volt_scale = volt_scale_nop;
+ vdd-vp_enabled = false;
+ return 0;
+ }
+
vdd-volt_scale = vp_forceupdate_scale_voltage;
vdd-vp_enabled = false;
@@ -217,6 +229,9 @@ static void __init vp_init(struct omap_vdd_info *vdd)
{
u32 vp_val;
+ if (cpu_is_omap3505() || cpu_is_omap3517())
+ return ;
+
if (!vdd-read_reg || !vdd-write_reg) {
pr_err(%s: No read/write API for accessing vdd_%s regs\n,
__func__, vdd-voltdm.name);
@@ -598,6 +613,9 @@ static void __init omap_vc_init(struct omap_vdd_info *vdd)
{
u32 vc_val;
+ if (cpu_is_omap3505() || cpu_is_omap3517())
+ return ;
+
if (!vdd-pmic_info || !vdd-pmic_info-uv_to_vsel) {
pr_err(%s: PMIC info requried to configure vc for
vdd_%s not populated.Hence cannot initialize vc\n,
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index def230f..7432a1b 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -67,6 +67,39 @@ static struct omap_vdd_info *omap3_vdd_info[] = {
omap3_vdd2_info,
};
+/*
+ * AM35x VDD structures
+ *
+ * In AM35x there neither scalable voltage domain nor any hook-up with
+ * voltage controller/processor. However, when trying to re-use the hwmod
+ * database for OMAP3, definition of core voltage domain is necessary.
+ * Else, changes in hwmod data structures grow spirally.
+ *
+ * As a workaround, core voltage domain is defined below. This is an ad hoc
+ *
[PATCH v2 2/3] OMAP3: Add support for TPS65023 (AM35x only)
From: Sanjeev Premi pr...@ti.com
This patch adds support for TPS65023 used with
OMAP3 devices. The PMIC is currently hooked to
AM35x devices, but can easily be extended for
other OMAP3 devices.
Signed-off-by: Sanjeev Premi pr...@ti.com
Signed-off-by: Abhilash K V abhilash...@ti.com
---
arch/arm/mach-omap2/Makefile|3 +-
arch/arm/mach-omap2/pm.c|1 +
arch/arm/mach-omap2/pm.h|9
arch/arm/mach-omap2/pmic_tps65023.c | 84 +++
4 files changed, 96 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-omap2/pmic_tps65023.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index e43d94b..590e797 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -18,7 +18,8 @@ obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common)
obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
-obj-$(CONFIG_TWL4030_CORE) += omap_twl.o
+obj-$(CONFIG_TWL4030_CORE) += omap_twl.o
+obj-$(CONFIG_REGULATOR_TPS65023) += pmic_tps65023.o
# SMP support ONLY available for OMAP4
obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 863b384..f8338a8 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -258,6 +258,7 @@ static int __init omap2_common_pm_late_init(void)
if (omap3_has_sr())
omap3_twl_init();
omap4_twl_init();
+ omap3_tps65023_init();
/* Init the voltage layer */
omap_voltage_late_init();
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 4e166ad..ce028f6 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -133,5 +133,14 @@ static inline int omap4_twl_init(void)
return -EINVAL;
}
#endif
+#ifdef CONFIG_REGULATOR_TPS65023
+extern int omap3_tps65023_init(void);
+#else
+static inline int omap3_tps65023_init(void)
+{
+ return -EINVAL;
+}
+#endif
+
#endif
diff --git a/arch/arm/mach-omap2/pmic_tps65023.c
b/arch/arm/mach-omap2/pmic_tps65023.c
new file mode 100644
index 000..3245929
--- /dev/null
+++ b/arch/arm/mach-omap2/pmic_tps65023.c
@@ -0,0 +1,84 @@
+/**
+ * Implements support for TPS65023
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/err.h
+#include linux/io.h
+#include linux/kernel.h
+#include linux/i2c/twl.h
+
+#include voltage.h
+
+#include pm.h
+
+#defineTPS65023_VDCDC1_MIN 80 /* 0.8V */
+#defineTPS65023_VDCDC1_STEP25000 /* 0.025V */
+
+
+/*
+ * Get voltage corresponding to specified vsel value using this formula:
+ * Vout = 0.8V + (25mV x Vsel)
+ */
+static unsigned long tps65023_vsel_to_uv(const u8 vsel)
+{
+ return TPS65023_VDCDC1_MIN + (TPS65023_VDCDC1_STEP * vsel);
+}
+
+/*
+ * Get vsel value corresponding to specified voltage using this formula:
+ * Vsel = (Vout - 0.8V)/ 25mV
+ */
+static u8 tps65023_uv_to_vsel(unsigned long uv)
+{
+ return DIV_ROUND_UP(uv - TPS65023_VDCDC1_MIN, TPS65023_VDCDC1_STEP);
+}
+
+/*
+ * TPS65023 is currently supported only for AM35x devices.
+ * Therefore, implementation below is specific to this device pair.
+ */
+
+/**
+ * Voltage information related to the MPU voltage domain of the
+ * AM35x processors - in relation to the TPS65023.
+ */
+static struct omap_volt_pmic_info tps65023_am35xx_mpu_volt_info = {
+ .step_size = 25000,
+ .on_volt= 120,
+ .vsel_to_uv = tps65023_vsel_to_uv,
+ .uv_to_vsel = tps65023_uv_to_vsel,
+};
+
+int __init omap3_tps65023_init(void)
+{
+ struct voltagedomain *voltdm;
+
+ if (!cpu_is_omap34xx())
+ return -ENODEV;
+
+ if (cpu_is_omap3505() || cpu_is_omap3517()) {
+ voltdm = omap_voltage_domain_lookup(mpu);
+ omap_voltage_register_pmic(voltdm,
+ tps65023_am35xx_mpu_volt_info);
+ voltdm = omap_voltage_domain_lookup(core);
+ omap_voltage_register_pmic(voltdm,
+ tps65023_am35xx_mpu_volt_info);
+ } else {
+ /* TODO:
+* Support for other devices that support TPS65023
+*/
+ }
+
+ return 0;
+}
--
1.7.1
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More
[PATCH v2 3/3] OMAP3: Remove auto-selection of PMICs
The current implementation almost assumes that only TWL4030/TWL5030/TWl6030 are (or can be) used with the OMAP processors. This is, however, not true. This patch removes the automatic selection of the PMIC from Kconfig. All currently used PMICs are now added to omap2plus_defconfig; any new PMIC that gets supported in future could now be enabled here rather than by changing Kconfig for ARCH_OMAP2PLUS_TYPICAL TWL4030 CORE and POWER drivers are no longer built only for ARM and OMAP, as per the discussion here: http://marc.info/?l=linux-omapm=131402877315314w=2 Signed-off-by: Sanjeev Premi pr...@ti.com Signed-off-by: Abhilash K V abhilash...@ti.com --- arch/arm/configs/omap2plus_defconfig |3 +++ arch/arm/mach-omap2/Kconfig |3 --- drivers/mfd/Kconfig |2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index d5f00d7..076b131 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -130,6 +130,9 @@ CONFIG_POWER_SUPPLY=y CONFIG_WATCHDOG=y CONFIG_OMAP_WATCHDOG=y CONFIG_TWL4030_WATCHDOG=y +CONFIG_MENELAUS=y +CONFIG_TWL4030_CORE=y +CONFIG_TWL4030_POWER=y CONFIG_REGULATOR_TWL4030=y CONFIG_REGULATOR_TPS65023=y CONFIG_REGULATOR_TPS6507X=y diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 7edf802..d40f6d2 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -15,9 +15,6 @@ config ARCH_OMAP2PLUS_TYPICAL select I2C select I2C_OMAP select MFD_SUPPORT - select MENELAUS if ARCH_OMAP2 - select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 - select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 help Compile a kernel suitable for booting most boards diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 21574bd..72e15c8 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -238,7 +238,7 @@ config TWL4030_MADC config TWL4030_POWER bool Support power resources on TWL4030 family chips - depends on TWL4030_CORE ARM + depends on TWL4030_CORE help Say yes here if you want to use the power resources on the TWL4030 family chips. Most of these resources are regulators, -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC 7/7] iommu/core: split mapping to page sizes as supported by the hardware
Hi Ohad, On Wed, Sep 7, 2011 at 6:16 PM, Ohad Ben-Cohen o...@wizery.com wrote: Hmm this sounds a bit like a red herring to me; optimization of the :) I agree. sorry. map function is not the main subject here. Especially not when we're discussing mapping of large physically contiguous memory regions which do not happen too often. I've got your point but I thought that it is really needed. Another advantage for migrating s5p_iommu_map() over to the subject patch, is that s5p_iommu_map() doesn't support super sections yet. To support it, you'd need to add more code (duplicate another while loop). But if you migrated to the subject patch, then you would only need to flip the 16MB bit when you advertise page size capabilities and then that's it; you're done. I did not implement that. 16MB page is less practical in Linux because Linux kernel is unable to allocated larger physically contiguous memory than 4MB by default. But I also think that it is needed to support 16MB mapping for IO virtualization someday and it is just trivial job. And you pointed correctly that s5p_iommu_map() has duplicate similar codes. Actually, I think your idea is good and does not cause performance degradation. But I wondered if it is really useful. The caller of iommu_map() doesn't say anything about alignments. It just gives it a memory region to map, and expect things to just work. The caller of iommu_map() gives gfp_order that is the size of the physical memory to map. I thought that it also means alignment of the physical memory. Isn't it? Regards, KyongHo -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Tasks schedule/migration issue with CPU hotplug?
On Thu, 2011-09-08 at 14:47 +0800, TAO HU wrote: We seems got a schedule/migration issue in a OMAP4430 dual-core system. The kernel base is 2.6.35.7 and we're using CFS. step 1, try with a kernel that isn't quite as fossilized (3.0 or even better 3.1-rc) step 2, if no luck, report that step 3, when sending email, 3a, don't wrap machine output 3b, include .config like things -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ti816x: add support for nand on ti8168 evm
Add partition table for NAND device on TI8168 EVM
and initialise the NAND module.
Signed-off-by: Saxena, Parth parth.sax...@ti.com
Signed-off-by: Basheer, Mansoor Ahamed mansoor.aha...@ti.com
---
This patch is tested on top of linux-omap/master and
Hemant's patches submitted recently.
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg53457.html
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg54296.html
arch/arm/mach-omap2/board-ti8168evm.c | 39 +
1 files changed, 39 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c
b/arch/arm/mach-omap2/board-ti8168evm.c
index e516a04..87953bb 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -14,6 +14,7 @@
*/
#include linux/kernel.h
#include linux/init.h
+#include linux/mtd/nand.h
#include mach/hardware.h
#include asm/mach-types.h
@@ -23,6 +24,42 @@
#include plat/irqs.h
#include plat/board.h
#include plat/common.h
+#include plat/gpmc.h
+#include plat/nand.h
+
+#include board-flash.h
+
+#define NAND_BLOCK_SIZESZ_128K
+
+static struct mtd_partition ti816x_nand_partitions[] = {
+/* All the partition sizes are listed in terms of NAND block size */
+ {
+ .name = U-Boot,
+ .offset = 0,/* Offset = 0x0 */
+ .size = 18 * NAND_BLOCK_SIZE,
+ .mask_flags = MTD_WRITEABLE,/* force read-only */
+ },
+ {
+ .name = U-Boot Env,
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x24 */
+ .size = 2 * NAND_BLOCK_SIZE,
+ },
+ {
+ .name = Kernel,
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x28 */
+ .size = 34 * NAND_BLOCK_SIZE,
+ },
+ {
+ .name = File System,
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x6C */
+ .size = 1601 * NAND_BLOCK_SIZE,
+ },
+ {
+ .name = Reserved,
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0xCEE */
+ .size = MTDPART_SIZ_FULL,
+ },
+};
static struct omap_board_config_kernel ti8168_evm_config[] __initdata = {
};
@@ -35,6 +72,8 @@ static void __init ti8168_init_early(void)
static void __init ti8168_evm_init(void)
{
+ board_nand_init(ti816x_nand_partitions,
+ ARRAY_SIZE(ti816x_nand_partitions), 0, NAND_BUSWIDTH_16);
omap_serial_init();
omap_board_config = ti8168_evm_config;
omap_board_config_size = ARRAY_SIZE(ti8168_evm_config);
--
1.6.2.4
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RE: [PATCH 1/8] OMAP: hwmod: Fix the addr spaces count API.
[...]
-Original Message-
From: Sricharan R [mailto:r.sricha...@ti.com]
Sent: Thursday, September 08, 2011 2:35 PM
To: Sricharan R
Subject: Re: [PATCH 1/8] OMAP: hwmod: Fix the addr spaces count API.
[...]
diff --git a/arch/arm/mach-omap2/omap_hwmod.c
b/arch/arm/mach-omap2/omap_hwmod.c
index 84cc0bd..32a0f48a 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -791,9 +791,11 @@ static int _count_ocp_if_addr_spaces(struct
omap_hwmod_ocp_if *os)
if (!os || !os-addr)
return 0;
- do {
- mem =os-addr[i++];
- } while (mem-pa_start != mem-pa_end);
+ mem =os-addr[i];
+
This extran line isn't needed Sricharan.
Will correct this, along with benoit's commmets.
Thanks,
Sricharan
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[PATCH 0/8] OMAP3EVM: Add tvp514x video decoder support
This patchset -add support for tvp514x video decoder on omap3evm and also migrate the decoder driver to media controller framework. -add support for BT656 interface. -enable multimedia driver and tvp514x decoder support in omap2plus_defconfig. It is dependent on the following patch https://patchwork.kernel.org/patch/1062042/ which moves platform data definitions from isp.h to media/omap3isp.h Cc: Vaibhav Hiremath hvaib...@ti.com --- Deepthy Ravi (1): omap2plus_defconfig: Enable tvp514x video decoder support Vaibhav Hiremath (7): omap3evm: Enable regulators for camera interface omap3evm: Add Camera board init/hookup file tvp514x: Migrate to media-controller framework ispvideo: Add support for G/S/ENUM_STD ioctl ispccdc: Configure CCDC registers ispccdc: Add support for BT656 interface omap3evm: camera: Configure BT656 interface arch/arm/configs/omap2plus_defconfig| 10 + arch/arm/mach-omap2/Makefile|5 + arch/arm/mach-omap2/board-omap3evm-camera.c | 258 +++ arch/arm/mach-omap2/board-omap3evm.c| 44 + drivers/media/video/omap3isp/ispccdc.c | 185 +++- drivers/media/video/omap3isp/ispreg.h |1 + drivers/media/video/omap3isp/ispvideo.c | 106 +++- drivers/media/video/omap3isp/ispvideo.h |5 +- drivers/media/video/tvp514x.c | 241 ++--- include/media/omap3isp.h|7 + include/media/tvp514x.h |3 + include/media/v4l2-subdev.h |7 +- 12 files changed, 797 insertions(+), 75 deletions(-) create mode 100644 arch/arm/mach-omap2/board-omap3evm-camera.c -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/8] omap3evm: Enable regulators for camera interface
From: Vaibhav Hiremath hvaib...@ti.com
Enabled 1v8 and 2v8 regulator output, which is being used by
camera module.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Deepthy Ravi deepthy.r...@ti.com
---
arch/arm/mach-omap2/board-omap3evm.c | 40 ++
1 files changed, 40 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c
b/arch/arm/mach-omap2/board-omap3evm.c
index a1184b3..8333ee4 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -273,6 +273,44 @@ static struct omap_dss_board_info omap3_evm_dss_data = {
.default_device = omap3_evm_lcd_device,
};
+static struct regulator_consumer_supply omap3evm_vaux3_supply = {
+ .supply = cam_1v8,
+};
+
+static struct regulator_consumer_supply omap3evm_vaux4_supply = {
+ .supply = cam_2v8,
+};
+
+/* VAUX3 for CAM_1V8 */
+static struct regulator_init_data omap3evm_vaux3 = {
+ .constraints = {
+ .min_uV = 180,
+ .max_uV = 180,
+ .apply_uV = true,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
+ | REGULATOR_MODE_STANDBY,
+ .valid_ops_mask = REGULATOR_CHANGE_MODE
+ | REGULATOR_CHANGE_STATUS,
+ },
+ .num_consumer_supplies = 1,
+ .consumer_supplies = omap3evm_vaux3_supply,
+};
+
+/* VAUX4 for CAM_2V8 */
+static struct regulator_init_data omap3evm_vaux4 = {
+ .constraints = {
+ .min_uV = 180,
+ .max_uV = 180,
+ .apply_uV = true,
+ .valid_modes_mask = REGULATOR_MODE_NORMAL
+ | REGULATOR_MODE_STANDBY,
+ .valid_ops_mask = REGULATOR_CHANGE_MODE
+ | REGULATOR_CHANGE_STATUS,
+ },
+ .num_consumer_supplies = 1,
+ .consumer_supplies = omap3evm_vaux4_supply,
+};
+
static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = {
REGULATOR_SUPPLY(vmmc, omap_hsmmc.0),
};
@@ -499,6 +537,8 @@ static struct twl4030_platform_data omap3evm_twldata = {
.vio= omap3evm_vio,
.vmmc1 = omap3evm_vmmc1,
.vsim = omap3evm_vsim,
+ .vaux3 = omap3evm_vaux3,
+ .vaux4 = omap3evm_vaux4,
};
static int __init omap3_evm_i2c_init(void)
--
1.7.0.4
--
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[PATCH 2/8] omap3evm: Add Camera board init/hookup file
From: Vaibhav Hiremath hvaib...@ti.com
In OMAP3EVM Rev G, TVP5146 video decoder is populated on the
main board. This decoder is registered as a subdevice to the
media-controller/omap3isp.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Deepthy Ravi deepthy.r...@ti.com
---
arch/arm/mach-omap2/Makefile|5 +
arch/arm/mach-omap2/board-omap3evm-camera.c | 253 +++
arch/arm/mach-omap2/board-omap3evm.c|4 +
include/media/tvp514x.h |3 +
4 files changed, 265 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/board-omap3evm-camera.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index e43d94b..66ac9fe 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -272,3 +272,8 @@ disp-$(CONFIG_OMAP2_DSS):= display.o
obj-y += $(disp-m) $(disp-y)
obj-y += common-board-devices.o twl-common.o
+
+ifeq ($(CONFIG_MACH_OMAP3EVM),y)
+evm-camera-$(CONFIG_VIDEO_OMAP3) := board-omap3evm-camera.o
+obj-y += $(evm-camera-m) $(evm-camera-y)
+endif
diff --git a/arch/arm/mach-omap2/board-omap3evm-camera.c
b/arch/arm/mach-omap2/board-omap3evm-camera.c
new file mode 100644
index 000..718dd6d
--- /dev/null
+++ b/arch/arm/mach-omap2/board-omap3evm-camera.c
@@ -0,0 +1,253 @@
+/*
+ * arch/arm/mach-omap2/board-omap3evm-camera.c
+ *
+ * OMAP3EVM: Driver for TVP5146 module
+ *
+ * Copyright (C) 2011 Texas Instruments Inc
+ * Author: Vaibhav Hiremath hvaib...@ti.com
+ *
+ * This package is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include linux/io.h
+#include linux/i2c.h
+#include linux/delay.h
+#include linux/err.h
+#include linux/platform_device.h
+#include linux/regulator/consumer.h
+#include mach/gpio.h
+#include media/tvp514x.h
+#include media/omap3isp.h
+#include devices.h
+
+#define CAM_USE_XCLKA 0
+
+#define TVP5146_DEC_RST98
+#define T2_GPIO_2 194
+#define nCAM_VD_SEL157
+#define nCAM_VD_EN 200
+
+static struct regulator *omap3evm_1v8;
+static struct regulator *omap3evm_2v8;
+
+
+/* mux id to enable/disable signal routing to different peripherals */
+enum omap3evm_cam_mux {
+ MUX_EN_TVP5146 = 0,
+ MUX_EN_CAMERA_SENSOR,
+ MUX_EN_EXP_CAMERA_SENSOR,
+ MUX_INVALID,
+};
+
+static int omap3evm_regulator_ctrl(u32 on)
+{
+ if (!omap3evm_1v8 || !omap3evm_2v8) {
+ printk(KERN_ERR No regulator available\n);
+ return -ENODEV;
+ }
+ if (on) {
+ regulator_enable(omap3evm_1v8);
+ mdelay(1);
+ regulator_enable(omap3evm_2v8);
+mdelay(50);
+} else {
+ if (regulator_is_enabled(omap3evm_1v8))
+ regulator_disable(omap3evm_1v8);
+ if (regulator_is_enabled(omap3evm_2v8))
+ regulator_disable(omap3evm_2v8);
+ }
+ return 0;
+}
+/**
+ * @brief omap3evm_set_mux - Sets mux to enable/disable signal routing to
+ * different peripherals present on new EVM board
+ *
+ * @param mux_id - enum, mux id to enable/disable
+ * @param value - enum, ENABLE_MUX for enabling and DISABLE_MUX for disabling
+ *
+ */
+static void omap3evm_set_mux(enum omap3evm_cam_mux mux_id)
+{
+ switch (mux_id) {
+ /*
+ * JP1 jumper need to configure to choose between on-board
+ * camera sensor conn and on-board LI-3MC02 camera sensor.
+ */
+ case MUX_EN_CAMERA_SENSOR:
+ /* Set nCAM_VD_EN (T2_GPIO8) = 0 */
+ gpio_set_value_cansleep(nCAM_VD_EN, 0);
+ /* Set nCAM_VD_SEL (GPIO157) = 0 */
+ gpio_set_value(nCAM_VD_SEL, 0);
+ break;
+ case MUX_EN_EXP_CAMERA_SENSOR:
+ /* Set nCAM_VD_EN (T2_GPIO8) = 1 */
+ gpio_set_value_cansleep(nCAM_VD_EN, 1);
+ break;
+ case MUX_EN_TVP5146:
+ default:
+ /* Set nCAM_VD_EN (T2_GPIO8) = 0 */
+ gpio_set_value_cansleep(nCAM_VD_EN, 0);
+ /* Set nCAM_VD_SEL (GPIO157) = 1 */
+ gpio_set_value(nCAM_VD_SEL, 1);
+ break;
+
[PATCH 3/8] tvp514x: Migrate to media-controller framework
From: Vaibhav Hiremath hvaib...@ti.com
Migrate tvp5146 driver to media controller framework. The
driver registers as a sub-device entity to MC framwork
and sub-device to V4L2 layer. The default format code was
V4L2_MBUS_FMT_YUYV10_2X10. Changed it to V4L2_MBUS_FMT_UYVY8_2X8
and hence added the new format code to ccdc and isp format
arrays.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Deepthy Ravi deepthy.r...@ti.com
---
drivers/media/video/omap3isp/ispccdc.c |1 +
drivers/media/video/omap3isp/ispvideo.c |3 +
drivers/media/video/tvp514x.c | 241 ---
include/media/v4l2-subdev.h |7 +-
4 files changed, 222 insertions(+), 30 deletions(-)
diff --git a/drivers/media/video/omap3isp/ispccdc.c
b/drivers/media/video/omap3isp/ispccdc.c
index 9d3459d..d58fe45 100644
--- a/drivers/media/video/omap3isp/ispccdc.c
+++ b/drivers/media/video/omap3isp/ispccdc.c
@@ -57,6 +57,7 @@ static const unsigned int ccdc_fmts[] = {
V4L2_MBUS_FMT_SRGGB12_1X12,
V4L2_MBUS_FMT_SBGGR12_1X12,
V4L2_MBUS_FMT_SGBRG12_1X12,
+ V4L2_MBUS_FMT_UYVY8_2X8,
};
/*
diff --git a/drivers/media/video/omap3isp/ispvideo.c
b/drivers/media/video/omap3isp/ispvideo.c
index fd965ad..d5b8236 100644
--- a/drivers/media/video/omap3isp/ispvideo.c
+++ b/drivers/media/video/omap3isp/ispvideo.c
@@ -100,6 +100,9 @@ static struct isp_format_info formats[] = {
{ V4L2_MBUS_FMT_YUYV8_1X16, V4L2_MBUS_FMT_YUYV8_1X16,
V4L2_MBUS_FMT_YUYV8_1X16, 0,
V4L2_PIX_FMT_YUYV, 16, },
+ { V4L2_MBUS_FMT_UYVY8_2X8, V4L2_MBUS_FMT_UYVY8_2X8,
+ V4L2_MBUS_FMT_UYVY8_2X8, 0,
+ V4L2_PIX_FMT_UYVY, 16, },
};
const struct isp_format_info *
diff --git a/drivers/media/video/tvp514x.c b/drivers/media/video/tvp514x.c
index 9b3e828..10f3e87 100644
--- a/drivers/media/video/tvp514x.c
+++ b/drivers/media/video/tvp514x.c
@@ -32,11 +32,14 @@
#include linux/slab.h
#include linux/delay.h
#include linux/videodev2.h
+#include linux/v4l2-mediabus.h
#include media/v4l2-device.h
#include media/v4l2-common.h
-#include media/v4l2-mediabus.h
#include media/v4l2-chip-ident.h
+#include media/v4l2-subdev.h
+#include media/v4l2-ctrls.h
+
#include media/v4l2-ctrls.h
#include media/tvp514x.h
@@ -78,6 +81,8 @@ struct tvp514x_std_info {
unsigned long height;
u8 video_std;
struct v4l2_standard standard;
+ unsigned int mbus_code;
+ struct v4l2_mbus_framefmt format;
};
static struct tvp514x_reg tvp514x_reg_list_default[0x40];
@@ -101,6 +106,7 @@ struct tvp514x_decoder {
struct v4l2_ctrl_handler hdl;
struct tvp514x_reg tvp514x_regs[ARRAY_SIZE(tvp514x_reg_list_default)];
const struct tvp514x_platform_data *pdata;
+ struct media_pad pad;
int ver;
int streaming;
@@ -207,29 +213,46 @@ static struct tvp514x_reg tvp514x_reg_list_default[] = {
static const struct tvp514x_std_info tvp514x_std_list[] = {
/* Standard: STD_NTSC_MJ */
[STD_NTSC_MJ] = {
-.width = NTSC_NUM_ACTIVE_PIXELS,
-.height = NTSC_NUM_ACTIVE_LINES,
-.video_std = VIDEO_STD_NTSC_MJ_BIT,
-.standard = {
- .index = 0,
- .id = V4L2_STD_NTSC,
- .name = NTSC,
- .frameperiod = {1001, 3},
- .framelines = 525
-},
- /* Standard: STD_PAL_BDGHIN */
+ .width = NTSC_NUM_ACTIVE_PIXELS,
+ .height = NTSC_NUM_ACTIVE_LINES,
+ .video_std = VIDEO_STD_NTSC_MJ_BIT,
+ .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8,
+ .standard = {
+ .index = 0,
+ .id = V4L2_STD_NTSC,
+ .name = NTSC,
+ .frameperiod = {1001, 3},
+ .framelines = 525
+ },
+ .format = {
+ .width = NTSC_NUM_ACTIVE_PIXELS,
+ .height = NTSC_NUM_ACTIVE_LINES,
+ .code = V4L2_MBUS_FMT_UYVY8_2X8,
+ .field = V4L2_FIELD_INTERLACED,
+ .colorspace = V4L2_COLORSPACE_SMPTE170M,
+ }
+
},
+ /* Standard: STD_PAL_BDGHIN */
[STD_PAL_BDGHIN] = {
-.width = PAL_NUM_ACTIVE_PIXELS,
-.height = PAL_NUM_ACTIVE_LINES,
-.video_std = VIDEO_STD_PAL_BDGHIN_BIT,
-.standard = {
- .index = 1,
- .id = V4L2_STD_PAL,
- .name = PAL,
- .frameperiod = {1, 25},
- .framelines = 625
-},
+ .width = PAL_NUM_ACTIVE_PIXELS,
+ .height = PAL_NUM_ACTIVE_LINES,
+ .video_std = VIDEO_STD_PAL_BDGHIN_BIT,
+ .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8,
+ .standard = {
+
[PATCH 4/8] ispvideo: Add support for G/S/ENUM_STD ioctl
From: Vaibhav Hiremath hvaib...@ti.com
In order to support TVP5146 (for that matter any video decoder),
it is important to support G/S/ENUM_STD ioctl on /dev/videoX
device node.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Deepthy Ravi deepthy.r...@ti.com
---
drivers/media/video/omap3isp/ispvideo.c | 98 ++-
drivers/media/video/omap3isp/ispvideo.h |1 +
2 files changed, 98 insertions(+), 1 deletions(-)
diff --git a/drivers/media/video/omap3isp/ispvideo.c
b/drivers/media/video/omap3isp/ispvideo.c
index d5b8236..ff0ffed 100644
--- a/drivers/media/video/omap3isp/ispvideo.c
+++ b/drivers/media/video/omap3isp/ispvideo.c
@@ -37,6 +37,7 @@
#include plat/iovmm.h
#include plat/omap-pm.h
+#include media/tvp514x.h
#include ispvideo.h
#include isp.h
@@ -1136,7 +1137,97 @@ isp_video_g_input(struct file *file, void *fh, unsigned
int *input)
static int
isp_video_s_input(struct file *file, void *fh, unsigned int input)
{
- return input == 0 ? 0 : -EINVAL;
+ struct isp_video *video = video_drvdata(file);
+ struct media_entity *entity = video-video.entity;
+ struct media_entity_graph graph;
+ struct v4l2_subdev *subdev;
+ struct v4l2_routing route;
+ int ret = 0;
+
+ media_entity_graph_walk_start(graph, entity);
+ while ((entity = media_entity_graph_walk_next(graph))) {
+ if (media_entity_type(entity) ==
+ MEDIA_ENT_T_V4L2_SUBDEV) {
+ subdev = media_entity_to_v4l2_subdev(entity);
+ if (subdev != NULL) {
+ if (input == 0)
+ route.input = INPUT_CVBS_VI4A;
+ else
+ route.input = INPUT_SVIDEO_VI2C_VI1C;
+ route.output = 0;
+ ret = v4l2_subdev_call(subdev, video, s_routing,
+ route.input, route.output, 0);
+ if (ret 0 ret != -ENOIOCTLCMD)
+ return ret;
+ }
+ }
+ }
+
+ return 0;
+}
+
+static int isp_video_querystd(struct file *file, void *fh, v4l2_std_id *a)
+{
+ struct isp_video_fh *vfh = to_isp_video_fh(fh);
+ struct isp_video *video = video_drvdata(file);
+ struct media_entity *entity = video-video.entity;
+ struct media_entity_graph graph;
+ struct v4l2_subdev *subdev;
+ int ret = 0;
+
+ media_entity_graph_walk_start(graph, entity);
+ while ((entity = media_entity_graph_walk_next(graph))) {
+ if (media_entity_type(entity) ==
+ MEDIA_ENT_T_V4L2_SUBDEV) {
+ subdev = media_entity_to_v4l2_subdev(entity);
+ if (subdev != NULL) {
+ ret = v4l2_subdev_call(subdev, video, querystd,
+ a);
+ if (ret 0 ret != -ENOIOCTLCMD)
+ return ret;
+ }
+ }
+ }
+
+ vfh-standard.id = *a;
+ return 0;
+}
+
+static int isp_video_g_std(struct file *file, void *fh, v4l2_std_id *norm)
+{
+ struct isp_video_fh *vfh = to_isp_video_fh(fh);
+ struct isp_video *video = video_drvdata(file);
+
+ mutex_lock(video-mutex);
+ *norm = vfh-standard.id;
+ mutex_unlock(video-mutex);
+
+ return 0;
+}
+
+static int isp_video_s_std(struct file *file, void *fh, v4l2_std_id *norm)
+{
+ struct isp_video *video = video_drvdata(file);
+ struct media_entity *entity = video-video.entity;
+ struct media_entity_graph graph;
+ struct v4l2_subdev *subdev;
+ int ret = 0;
+
+ media_entity_graph_walk_start(graph, entity);
+ while ((entity = media_entity_graph_walk_next(graph))) {
+ if (media_entity_type(entity) ==
+ MEDIA_ENT_T_V4L2_SUBDEV) {
+ subdev = media_entity_to_v4l2_subdev(entity);
+ if (subdev != NULL) {
+ ret = v4l2_subdev_call(subdev, core, s_std,
+ *norm);
+ if (ret 0 ret != -ENOIOCTLCMD)
+ return ret;
+ }
+ }
+ }
+
+ return 0;
}
static const struct v4l2_ioctl_ops isp_video_ioctl_ops = {
@@ -1161,6 +1252,9 @@ static const struct v4l2_ioctl_ops isp_video_ioctl_ops = {
.vidioc_enum_input = isp_video_enum_input,
.vidioc_g_input = isp_video_g_input,
.vidioc_s_input = isp_video_s_input,
+ .vidioc_querystd= isp_video_querystd,
+
[PATCH 5/8] ispccdc: Configure CCDC registers
From: Vaibhav Hiremath hvaib...@ti.com
Configure the CCDC registers for YUV and non YUV
data. Also some code clean-up for making it compact.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Deepthy Ravi deepthy.r...@ti.com
---
drivers/media/video/omap3isp/ispccdc.c | 65 +--
drivers/media/video/omap3isp/ispreg.h |1 +
drivers/media/video/omap3isp/ispvideo.c |3 +
3 files changed, 48 insertions(+), 21 deletions(-)
diff --git a/drivers/media/video/omap3isp/ispccdc.c
b/drivers/media/video/omap3isp/ispccdc.c
index d58fe45..c583384 100644
--- a/drivers/media/video/omap3isp/ispccdc.c
+++ b/drivers/media/video/omap3isp/ispccdc.c
@@ -58,6 +58,7 @@ static const unsigned int ccdc_fmts[] = {
V4L2_MBUS_FMT_SBGGR12_1X12,
V4L2_MBUS_FMT_SGBRG12_1X12,
V4L2_MBUS_FMT_UYVY8_2X8,
+ V4L2_MBUS_FMT_YUYV8_2X8,
};
/*
@@ -788,11 +789,16 @@ static void ccdc_apply_controls(struct isp_ccdc_device
*ccdc)
void omap3isp_ccdc_restore_context(struct isp_device *isp)
{
struct isp_ccdc_device *ccdc = isp-isp_ccdc;
+ struct v4l2_mbus_framefmt *format;
isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
- ccdc-update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
-| OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
+ /* CCDC_PAD_SINK */
+ format = ccdc-formats[CCDC_PAD_SINK];
+ if ((format-code != V4L2_MBUS_FMT_UYVY8_2X8)
+ (format-code != V4L2_MBUS_FMT_UYVY8_2X8))
+ ccdc-update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
+ | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
ccdc_apply_controls(ccdc);
ccdc_configure_fpc(ccdc);
}
@@ -966,14 +972,22 @@ static void ccdc_config_sync_if(struct isp_ccdc_device
*ccdc,
u32 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC,
ISPCCDC_SYN_MODE);
+ syn_mode = ~(ISPCCDC_SYN_MODE_VDHDOUT |
+ ISPCCDC_SYN_MODE_FLDOUT |
+ ISPCCDC_SYN_MODE_VDPOL |
+ ISPCCDC_SYN_MODE_HDPOL |
+ ISPCCDC_SYN_MODE_FLDPOL |
+ ISPCCDC_SYN_MODE_FLDMODE |
+ ISPCCDC_SYN_MODE_DATAPOL |
+ ISPCCDC_SYN_MODE_DATSIZ_MASK |
+ ISPCCDC_SYN_MODE_PACK8 |
+ ISPCCDC_SYN_MODE_INPMOD_MASK);
+
syn_mode |= ISPCCDC_SYN_MODE_VDHDEN;
if (syncif-fldstat)
syn_mode |= ISPCCDC_SYN_MODE_FLDSTAT;
- else
- syn_mode = ~ISPCCDC_SYN_MODE_FLDSTAT;
- syn_mode = ~ISPCCDC_SYN_MODE_DATSIZ_MASK;
switch (syncif-datsz) {
case 8:
syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
@@ -991,28 +1005,18 @@ static void ccdc_config_sync_if(struct isp_ccdc_device
*ccdc,
if (syncif-fldmode)
syn_mode |= ISPCCDC_SYN_MODE_FLDMODE;
- else
- syn_mode = ~ISPCCDC_SYN_MODE_FLDMODE;
if (syncif-datapol)
syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
- else
- syn_mode = ~ISPCCDC_SYN_MODE_DATAPOL;
if (syncif-fldpol)
syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
- else
- syn_mode = ~ISPCCDC_SYN_MODE_FLDPOL;
if (syncif-hdpol)
syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
- else
- syn_mode = ~ISPCCDC_SYN_MODE_HDPOL;
if (syncif-vdpol)
syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
- else
- syn_mode = ~ISPCCDC_SYN_MODE_VDPOL;
if (syncif-ccdc_mastermode) {
syn_mode |= ISPCCDC_SYN_MODE_FLDOUT | ISPCCDC_SYN_MODE_VDHDOUT;
@@ -1027,9 +1031,7 @@ static void ccdc_config_sync_if(struct isp_ccdc_device
*ccdc,
| syncif-hlprf ISPCCDC_PIX_LINES_HLPRF_SHIFT,
OMAP3_ISP_IOMEM_CCDC,
ISPCCDC_PIX_LINES);
- } else
- syn_mode = ~(ISPCCDC_SYN_MODE_FLDOUT |
- ISPCCDC_SYN_MODE_VDHDOUT);
+ }
isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
@@ -1181,6 +1183,9 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc)
isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
+ if (format-code == V4L2_MBUS_FMT_UYVY8_2X8)
+ isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
+ ISPCCDC_CFG_Y8POS);
/* Mosaic filter */
switch (format-code) {
case V4L2_MBUS_FMT_SRGGB10_1X10:
@@ -1200,7 +1205,10 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc)
ccdc_pattern = ccdc_sgrbg_pattern;
break;
}
- ccdc_config_imgattr(ccdc, ccdc_pattern);
+
+ if ((format-code != V4L2_MBUS_FMT_YUYV8_2X8)
+
[PATCH 8/8] omap2plus_defconfig: Enable tvp514x video decoder support
Enables multimedia driver, media controller api, v4l2-subdev-api, and tvp514x video decoder support in omap2plus_defconfig. Signed-off-by: Deepthy Ravi deepthy.r...@ti.com --- arch/arm/configs/omap2plus_defconfig | 10 ++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index d5f00d7..10474d4 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -133,6 +133,16 @@ CONFIG_TWL4030_WATCHDOG=y CONFIG_REGULATOR_TWL4030=y CONFIG_REGULATOR_TPS65023=y CONFIG_REGULATOR_TPS6507X=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_COMMON=y +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_VIDEO_MEDIA=y +CONFIG_VIDEO_TVP514X=y +CONFIG_VIDEO_OMAP3=y CONFIG_FB=y CONFIG_FIRMWARE_EDID=y CONFIG_FB_MODE_HELPERS=y -- 1.7.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 6/8] ispccdc: Add support for BT656 interface
From: Vaibhav Hiremath hvaib...@ti.com
Add support for BT656 interface in omap3isp ccdc driver.
In addition, this corrects some build errors associated
with isp_video_mbus_to_pix(). The function was declared
as static. Made it extern.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Deepthy Ravi deepthy.r...@ti.com
---
drivers/media/video/omap3isp/ispccdc.c | 119 +--
drivers/media/video/omap3isp/ispvideo.c |2 +-
drivers/media/video/omap3isp/ispvideo.h |4 +-
include/media/omap3isp.h|7 ++
4 files changed, 109 insertions(+), 23 deletions(-)
diff --git a/drivers/media/video/omap3isp/ispccdc.c
b/drivers/media/video/omap3isp/ispccdc.c
index c583384..e462034 100644
--- a/drivers/media/video/omap3isp/ispccdc.c
+++ b/drivers/media/video/omap3isp/ispccdc.c
@@ -1018,6 +1018,9 @@ static void ccdc_config_sync_if(struct isp_ccdc_device
*ccdc,
if (syncif-vdpol)
syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
+ if (syncif-bt_r656_en)
+ syn_mode |= ISPCCDC_SYN_MODE_PACK8;
+
if (syncif-ccdc_mastermode) {
syn_mode |= ISPCCDC_SYN_MODE_FLDOUT | ISPCCDC_SYN_MODE_VDHDOUT;
isp_reg_writel(isp,
@@ -1035,9 +1038,12 @@ static void ccdc_config_sync_if(struct isp_ccdc_device
*ccdc,
isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
- if (!syncif-bt_r656_en)
+ if (syncif-bt_r656_en)
+ isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
+ ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH);
+ else
isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
- ISPCCDC_REC656IF_R656ON);
+ ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH);
}
/* CCDC formats descriptions */
@@ -1119,6 +1125,7 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc)
struct isp_parallel_platform_data *pdata = NULL;
struct v4l2_subdev *sensor;
struct v4l2_mbus_framefmt *format;
+ struct v4l2_pix_format pix;
const struct isp_format_info *fmt_info;
struct v4l2_subdev_format fmt_src;
unsigned int depth_out;
@@ -1150,9 +1157,18 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc)
shift = depth_in - depth_out;
omap3isp_configure_bridge(isp, ccdc-input, pdata, shift);
- ccdc-syncif.datsz = depth_out;
- ccdc-syncif.hdpol = pdata ? pdata-hs_pol : 0;
- ccdc-syncif.vdpol = pdata ? pdata-vs_pol : 0;
+ if (pdata) {
+ ccdc-syncif.datsz = pdata-width;
+ ccdc-syncif.fldmode = pdata-fldmode;
+ ccdc-syncif.hdpol = pdata-hs_pol;
+ ccdc-syncif.vdpol = pdata-vs_pol;
+ ccdc-syncif.bt_r656_en = pdata-is_bt656;
+ } else {
+ ccdc-syncif.datsz = depth_out;
+ ccdc-syncif.hdpol = 0;
+ ccdc-syncif.vdpol = 0;
+ }
+
ccdc_config_sync_if(ccdc, ccdc-syncif);
/* CCDC_PAD_SINK */
@@ -1178,8 +1194,14 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc)
/* Use PACK8 mode for 1byte per pixel formats. */
if (omap3isp_video_format_info(format-code)-bpp = 8)
syn_mode |= ISPCCDC_SYN_MODE_PACK8;
- else
- syn_mode = ~ISPCCDC_SYN_MODE_PACK8;
+
+ if ((format-code == V4L2_MBUS_FMT_YUYV8_2X8) ||
+ (format-code == V4L2_MBUS_FMT_UYVY8_2X8)) {
+ if (pdata-is_bt656)
+ syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR8;
+ else
+ syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
+ }
isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
@@ -1210,22 +1232,42 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc)
(format-code != V4L2_MBUS_FMT_UYVY8_2X8))
ccdc_config_imgattr(ccdc, ccdc_pattern);
- /* Generate VD0 on the last line of the image and VD1 on the
-* 2/3 height line.
-*/
- isp_reg_writel(isp, ((format-height - 2) ISPCCDC_VDINT_0_SHIFT) |
- ((format-height * 2 / 3) ISPCCDC_VDINT_1_SHIFT),
- OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
+ /* BT656: Generate VD0 on the last line of each field, and we
+ * don't use VD1.
+ * Non BT656: Generate VD0 on the last line of the image and VD1 on the
+ * 2/3 height line.
+ */
+ if (pdata-is_bt656)
+ isp_reg_writel(isp,
+ (format-height/2 - 2) ISPCCDC_VDINT_0_SHIFT,
+ OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
+ else
+ isp_reg_writel(isp,
+ ((format-height - 2) ISPCCDC_VDINT_0_SHIFT) |
+ ((format-height * 2 / 3) ISPCCDC_VDINT_1_SHIFT),
+OMAP3_ISP_IOMEM_CCDC,
[PATCH 7/8] omap3evm: camera: Configure BT656 interface
From: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Deepthy Ravi deepthy.r...@ti.com
---
arch/arm/mach-omap2/board-omap3evm-camera.c | 11 ---
1 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3evm-camera.c
b/arch/arm/mach-omap2/board-omap3evm-camera.c
index 718dd6d..e92fb13 100644
--- a/arch/arm/mach-omap2/board-omap3evm-camera.c
+++ b/arch/arm/mach-omap2/board-omap3evm-camera.c
@@ -141,9 +141,14 @@ static struct isp_v4l2_subdevs_group
omap3evm_camera_subdevs[] = {
.interface = ISP_INTERFACE_PARALLEL,
.bus= {
.parallel = {
- .data_lane_shift= 1,
- .clk_pol= 0,
- .bridge = 0,
+ .width = 8,
+ .data_lane_shift= 1,
+ .clk_pol= 0,
+ .hs_pol = 0,
+ .vs_pol = 1,
+ .fldmode= 1,
+ .bridge = 0,
+ .is_bt656 = 1,
},
}
},
--
1.7.0.4
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Re: [PATCH v4 00/11] HDMI: Split hdmi.c in DSS to seperate OMAP dependent
Hi, On Wed, Sep 7, 2011 at 5:25 PM, Tomi Valkeinen tomi.valkei...@ti.com wrote: Hi, On Tue, 2011-09-06 at 17:28 +0530, mythr...@ti.com wrote: From: Mythri P K mythr...@ti.com HDMI IP block is common between TI OMAP4 Procerssor and Netra processor although the Display subsytem is different.Also the IP block in future OMAP may differ from the one existing in OMAP4. Thus to reuse the code between these two processors , and maintain the multi omap build functionality in DSS. HDMI IP dependant code is seperated out from hdmi.c and moved to new library file hdmi_ti_4xxx_ip.c.From the DSS dependent HDMI code only the function pointer to functionality/features offered by HDMI is called. This patch series does the split and also renames hdmi_omap4_panel.c to hdmi_panel.c as that file has nothing specific to OMAP4 and can be reused for other OMAP family of processors as well. This patch series is based on Tomi's LO-DSS2 master branch. changes since v3:Handle the sparse error for set_pll_pwr function Move audio functions out of hdmi.c to ip file. rename hdmi_data to ip_data V2: Rename certain files/function to have standard format and handle scenario when hdmi is disabled. V1: Function pointer approach to call the HDMI IP functions from DSS HDMI I think there's still lots of cleanups/restructuring needed for HDMI, but I'm willing to merge this patch set as it'll gives as a good baseline to continue the work, and trying to do too much in one go would just be difficult. However, there are a couple of changes I wish you can do first: - Remove refsel. You still have an enum and a field for it, even if it's not used. Instead fixed the bug in the same patch to use refsel to be set in the PLL_CFG2. - Instead of creating include/video/ti_hdmi.h, create the file into drivers/video/omap2/dss/. Let's keep this totally inside DSS2 for the time being. Sure done. - You still haven't changed copy_hdmi_to_dss_timings() to take a pointer instead of a value. It's been commented at least three times already. As similar things seem to happen quite often for you, if you have trouble remembering all the required changes, please write the received comments down to, say, a piece of paper, and cross them over when you've actually made the change. It's a waste of reviewers time to review and comment the same problems again and again. Point taken. Thanks for your review. Fixed this. - Go though the commit subjects and descriptions. I see the same typoes that I've also already commented about, and I see new ones also. Description on patch 10 is almost gibberish. Added more details to most of patches in series. Posting the patch. Mythri. Tomi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/10] OMAP4: DSS2: HDMI: Split hdmi.c in DSS to seperate
From: Mythri P K mythr...@ti.com
HDMI IP block is common between TI OMAP4 Procerssor and Netra processor although
the Display subsytem is different. Also the IP block in future OMAP's may differ
from the one existing in OMAP4. Thus to reuse the code between these two
processors , and maintain the multi omap build functionality in DSS,
HDMI IP dependant code is seperated out from hdmi.c and moved to
new library file ti_hdmi_4xxx_ip.c. From the DSS dependent HDMI code only the
function pointer to functionality/features offered by HDMI is called.
This patch series does the split and also renames hdmi_omap4_panel.c to
hdmi_panel.c as that file has nothing specific to OMAP4 and can be reused for
other OMAP family of processors as well.
This patch series is based on Tomi's LO-DSS2 master branch.
changes since
V4: Change the description of patch.
Fix the bug to use refsel in the PLL_CFG2.
Pass parameters to copy_hdmi_to_dss_timings by pointer.
V3: Handle the sparse error for set_pll_pwr function
Move audio functions out of hdmi.c to ip file.
Rename hdmi_data to ip_data
V2: Rename certain files/function to have standard format.H
Handle scenario when hdmi is disabled.
V1: Add Function pointer approach to call the HDMI IP functions
from DSS HDMI
Mythri P K (10):
OMAP4: DSS: HDMI: HDMI clean up to pass base_address dynamically to
IP dependant functions of HDMI
OMAP4: DSS: HDMI: Move pll and video configuration info to
ip_data structure
OMAP4: DSS: HDMI: Use specific HDMI timings structure instead of
OMAP DSS timings
OMAP4: DSS: HDMI: Move IP independent common header file definition
to generic header file
OMAP4 : DSS : HDMI : Move the EDID portion from HDMI IP header
OMAP4: DSS2: HDMI: Split the HDMI driver to DSS and IP
specific portion.
OMAP4: DSS2: HDMI: Move the HDMI IP dependent audio functions to IP
library
OMAP4: DSS: HDMI: Rename the functions in HDMI IP library to IP
specific name
OMAP4: DSS2: HDMI: Function pointer approach to call HDMI IP
driver function from DSS
OMAP4: DSS: Rename hdmi_omap4_panel.c to hdmi_panel.c
drivers/video/omap2/dss/Makefile |2 +-
drivers/video/omap2/dss/dss.h | 10 -
drivers/video/omap2/dss/dss_features.c | 20 +
drivers/video/omap2/dss/dss_features.h |7 +
drivers/video/omap2/dss/hdmi.c | 1027 ++--
drivers/video/omap2/dss/hdmi.h | 631
.../omap2/dss/{hdmi_omap4_panel.c = hdmi_panel.c} |2 +-
drivers/video/omap2/dss/ti_hdmi.h | 123 +++
drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c | 1033
drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h | 597 +++
10 files changed, 1853 insertions(+), 1599 deletions(-)
delete mode 100644 drivers/video/omap2/dss/hdmi.h
rename drivers/video/omap2/dss/{hdmi_omap4_panel.c = hdmi_panel.c} (99%)
create mode 100644 drivers/video/omap2/dss/ti_hdmi.h
create mode 100644 drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
create mode 100644 drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h
--
1.7.5.4
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[PATCH 01/10] OMAP4: DSS: HDMI: HDMI clean up to pass base_address
From: Mythri P K mythr...@ti.com
As the base_address of the HDMI might differ across SoC's, offset of the HDMI
logical blocks(PHY, PLL and Core) and base address procured from the platform
data are passed dynamically to the functions that modify HDMI IP registers.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/hdmi.c | 501 +++-
drivers/video/omap2/dss/hdmi.h | 292
2 files changed, 435 insertions(+), 358 deletions(-)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index b8e02e4..bfd113c 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -43,11 +43,17 @@
#include hdmi.h
#include dss_features.h
+#define HDMI_WP0x0
+#define HDMI_CORE_SYS 0x400
+#define HDMI_CORE_AV 0x900
+#define HDMI_PLLCTRL 0x200
+#define HDMI_PHY 0x300
+
static struct {
struct mutex lock;
struct omap_display_platform_data *pdata;
struct platform_device *pdev;
- void __iomem *base_wp; /* HDMI wrapper */
+ struct hdmi_ip_data ip_data;
int code;
int mode;
u8 edid[HDMI_EDID_MAX_LENGTH];
@@ -145,21 +151,49 @@ static const int code_vesa[85] = {
static const u8 edid_header[8] = {0x0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0x0};
-static inline void hdmi_write_reg(const struct hdmi_reg idx, u32 val)
+static inline void hdmi_write_reg(void __iomem *base_addr,
+ const struct hdmi_reg idx, u32 val)
+{
+ __raw_writel(val, base_addr + idx.idx);
+}
+
+static inline u32 hdmi_read_reg(void __iomem *base_addr,
+ const struct hdmi_reg idx)
+{
+ return __raw_readl(base_addr + idx.idx);
+}
+
+static inline void __iomem *hdmi_wp_base(struct hdmi_ip_data *ip_data)
+{
+ return ip_data-base_wp;
+}
+
+static inline void __iomem *hdmi_phy_base(struct hdmi_ip_data *ip_data)
{
- __raw_writel(val, hdmi.base_wp + idx.idx);
+ return ip_data-base_wp + ip_data-phy_offset;
}
-static inline u32 hdmi_read_reg(const struct hdmi_reg idx)
+static inline void __iomem *hdmi_pll_base(struct hdmi_ip_data *ip_data)
{
- return __raw_readl(hdmi.base_wp + idx.idx);
+ return ip_data-base_wp + ip_data-pll_offset;
}
-static inline int hdmi_wait_for_bit_change(const struct hdmi_reg idx,
+static inline void __iomem *hdmi_av_base(struct hdmi_ip_data *ip_data)
+{
+ return ip_data-base_wp + ip_data-core_av_offset;
+}
+
+static inline void __iomem *hdmi_core_sys_base(struct hdmi_ip_data *ip_data)
+{
+ return ip_data-base_wp + ip_data-core_sys_offset;
+}
+
+static inline int hdmi_wait_for_bit_change(void __iomem *base_addr,
+ const struct hdmi_reg idx,
int b2, int b1, u32 val)
{
u32 t = 0;
- while (val != REG_GET(idx, b2, b1)) {
+ while (val != REG_GET(base_addr, idx, b2, b1)) {
udelay(1);
if (t++ 1)
return !val;
@@ -195,21 +229,23 @@ int hdmi_init_display(struct omap_dss_device *dssdev)
return 0;
}
-static int hdmi_pll_init(enum hdmi_clk_refsel refsel, int dcofreq,
+static int hdmi_pll_init(struct hdmi_ip_data *ip_data,
+ enum hdmi_clk_refsel refsel, int dcofreq,
struct hdmi_pll_info *fmt, u16 sd)
{
u32 r;
+ void __iomem *pll_base = hdmi_pll_base(ip_data);
/* PLL start always use manual mode */
- REG_FLD_MOD(PLLCTRL_PLL_CONTROL, 0x0, 0, 0);
+ REG_FLD_MOD(pll_base, PLLCTRL_PLL_CONTROL, 0x0, 0, 0);
- r = hdmi_read_reg(PLLCTRL_CFG1);
+ r = hdmi_read_reg(pll_base, PLLCTRL_CFG1);
r = FLD_MOD(r, fmt-regm, 20, 9); /* CFG1_PLL_REGM */
r = FLD_MOD(r, fmt-regn, 8, 1); /* CFG1_PLL_REGN */
- hdmi_write_reg(PLLCTRL_CFG1, r);
+ hdmi_write_reg(pll_base, PLLCTRL_CFG1, r);
- r = hdmi_read_reg(PLLCTRL_CFG2);
+ r = hdmi_read_reg(pll_base, PLLCTRL_CFG2);
r = FLD_MOD(r, 0x0, 12, 12); /* PLL_HIGHFREQ divide by 2 */
r = FLD_MOD(r, 0x1, 13, 13); /* PLL_REFEN */
@@ -217,38 +253,40 @@ static int hdmi_pll_init(enum hdmi_clk_refsel refsel, int
dcofreq,
if (dcofreq) {
/* divider programming for frequency beyond 1000Mhz */
- REG_FLD_MOD(PLLCTRL_CFG3, sd, 17, 10);
+ REG_FLD_MOD(pll_base, PLLCTRL_CFG3, sd, 17, 10);
r = FLD_MOD(r, 0x4, 3, 1); /* 1000MHz and 2000MHz */
} else {
r = FLD_MOD(r, 0x2, 3, 1); /* 500MHz and 1000MHz */
}
- hdmi_write_reg(PLLCTRL_CFG2, r);
+ hdmi_write_reg(pll_base, PLLCTRL_CFG2, r);
- r = hdmi_read_reg(PLLCTRL_CFG4);
+ r = hdmi_read_reg(pll_base, PLLCTRL_CFG4);
r = FLD_MOD(r, fmt-regm2, 24, 18);
r = FLD_MOD(r, fmt-regmf, 17, 0);
-
[PATCH 02/10] OMAP4: DSS: HDMI: Move pll and video configuration
From: Mythri P K mythr...@ti.com
As the pll and the video configuration info are part of the ip_data, pll
and video structures are moved to the ip_data structure. Also the pll and
video configuration functions are modified accordingly to take care of the
structure movement.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/dss.h |8 +++
drivers/video/omap2/dss/hdmi.c | 42 ++-
drivers/video/omap2/dss/hdmi.h | 25 +--
3 files changed, 37 insertions(+), 38 deletions(-)
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index a095a62..4cb264e 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -150,6 +150,13 @@ struct dsi_clock_info {
bool use_sys_clk;
};
+enum hdmi_clk_refsel {
+ HDMI_REFSEL_PCLK = 0,
+ HDMI_REFSEL_REF1 = 1,
+ HDMI_REFSEL_REF2 = 2,
+ HDMI_REFSEL_SYSCLK = 3
+};
+
/* HDMI PLL structure */
struct hdmi_pll_info {
u16 regn;
@@ -158,6 +165,7 @@ struct hdmi_pll_info {
u16 regm2;
u16 regsd;
u16 dcofreq;
+ enum hdmi_clk_refsel refsel;
};
struct seq_file;
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index bfd113c..47e9f4a 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -59,7 +59,6 @@ static struct {
u8 edid[HDMI_EDID_MAX_LENGTH];
u8 edid_set;
bool custom_set;
- struct hdmi_config cfg;
struct clk *sys_clk;
} hdmi;
@@ -229,12 +228,11 @@ int hdmi_init_display(struct omap_dss_device *dssdev)
return 0;
}
-static int hdmi_pll_init(struct hdmi_ip_data *ip_data,
- enum hdmi_clk_refsel refsel, int dcofreq,
- struct hdmi_pll_info *fmt, u16 sd)
+static int hdmi_pll_init(struct hdmi_ip_data *ip_data)
{
u32 r;
void __iomem *pll_base = hdmi_pll_base(ip_data);
+ struct hdmi_pll_info *fmt = ip_data-pll_data;
/* PLL start always use manual mode */
REG_FLD_MOD(pll_base, PLLCTRL_PLL_CONTROL, 0x0, 0, 0);
@@ -250,10 +248,11 @@ static int hdmi_pll_init(struct hdmi_ip_data *ip_data,
r = FLD_MOD(r, 0x0, 12, 12); /* PLL_HIGHFREQ divide by 2 */
r = FLD_MOD(r, 0x1, 13, 13); /* PLL_REFEN */
r = FLD_MOD(r, 0x0, 14, 14); /* PHY_CLKINEN de-assert during locking */
+ r = FLD_MOD(r, fmt-refsel, 22, 21); /* REFSEL */
- if (dcofreq) {
+ if (fmt-dcofreq) {
/* divider programming for frequency beyond 1000Mhz */
- REG_FLD_MOD(pll_base, PLLCTRL_CFG3, sd, 17, 10);
+ REG_FLD_MOD(pll_base, PLLCTRL_CFG3, fmt-regsd, 17, 10);
r = FLD_MOD(r, 0x4, 3, 1); /* 1000MHz and 2000MHz */
} else {
r = FLD_MOD(r, 0x2, 3, 1); /* 500MHz and 1000MHz */
@@ -379,11 +378,9 @@ static int hdmi_phy_init(struct hdmi_ip_data *ip_data)
return 0;
}
-static int hdmi_pll_program(struct hdmi_ip_data *ip_data,
- struct hdmi_pll_info *fmt)
+static int hdmi_pll_program(struct hdmi_ip_data *ip_data)
{
u16 r = 0;
- enum hdmi_clk_refsel refsel;
r = hdmi_set_pll_pwr(ip_data, HDMI_PLLPWRCMD_ALLOFF);
if (r)
@@ -397,9 +394,7 @@ static int hdmi_pll_program(struct hdmi_ip_data *ip_data,
if (r)
return r;
- refsel = HDMI_REFSEL_SYSCLK;
-
- r = hdmi_pll_init(ip_data, refsel, fmt-dcofreq, fmt, fmt-regsd);
+ r = hdmi_pll_init(ip_data);
if (r)
return r;
@@ -1015,8 +1010,7 @@ static void hdmi_wp_video_config_timing(struct
hdmi_ip_data *ip_data,
hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_TIMING_V, timing_v);
}
-static void hdmi_basic_configure(struct hdmi_ip_data *ip_data,
- struct hdmi_config *cfg)
+static void hdmi_basic_configure(struct hdmi_ip_data *ip_data)
{
/* HDMI */
struct omap_video_timings video_timing;
@@ -1026,6 +1020,7 @@ static void hdmi_basic_configure(struct hdmi_ip_data
*ip_data,
struct hdmi_core_infoframe_avi avi_cfg;
struct hdmi_core_video_config v_core_cfg;
struct hdmi_core_packet_enable_repeat repeat_cfg;
+ struct hdmi_config *cfg = ip_data-cfg;
hdmi_wp_init(video_timing, video_format,
video_interface);
@@ -1034,8 +1029,7 @@ static void hdmi_basic_configure(struct hdmi_ip_data
*ip_data,
avi_cfg,
repeat_cfg);
- hdmi_wp_video_init_format(video_format,
- video_timing, cfg);
+ hdmi_wp_video_init_format(video_format, video_timing, cfg);
hdmi_wp_video_config_timing(ip_data, video_timing);
@@ -1154,6 +1148,9 @@ static void hdmi_compute_pll(struct omap_dss_device
*dssdev, int phy,
pi-dcofreq = phy 1000 * 100;
pi-regsd = ((pi-regm * clkin / 10) / ((pi-regn + 1) * 250) + 5) / 10;
+ /*
[PATCH 03/10] OMAP4: DSS: HDMI: Use specific HDMI timings structure
From: Mythri P K mythr...@ti.com
As hdmi has few additional parameters such as vsync and hsync
polarity which is missing in DSS timing structure, define HDMI timings
structure for hdmi to use instead of OMAP DSS timing structure.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/hdmi.c | 23 ---
drivers/video/omap2/dss/hdmi.h | 15 ++-
2 files changed, 34 insertions(+), 4 deletions(-)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 47e9f4a..c387bf4 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -534,6 +534,21 @@ static int read_edid(struct hdmi_ip_data *ip_data, u8
*pedid, u16 max_length)
return 0;
}
+static void copy_hdmi_to_dss_timings(
+ const struct hdmi_video_timings *hdmi_timings,
+ struct omap_video_timings *timings)
+{
+ timings-x_res = hdmi_timings-x_res;
+ timings-y_res = hdmi_timings-y_res;
+ timings-pixel_clock = hdmi_timings-pixel_clock;
+ timings-hbp = hdmi_timings-hbp;
+ timings-hfp = hdmi_timings-hfp;
+ timings-hsw = hdmi_timings-hsw;
+ timings-vbp = hdmi_timings-vbp;
+ timings-vfp = hdmi_timings-vfp;
+ timings-vsw = hdmi_timings-vsw;
+}
+
static int get_timings_index(void)
{
int code;
@@ -558,7 +573,7 @@ static struct hdmi_cm hdmi_get_code(struct
omap_video_timings *timing)
{
int i = 0, code = -1, temp_vsync = 0, temp_hsync = 0;
int timing_vsync = 0, timing_hsync = 0;
- struct omap_video_timings temp;
+ struct hdmi_video_timings temp;
struct hdmi_cm cm = {-1};
DSSDBG(hdmi_get_code\n);
@@ -716,7 +731,8 @@ static void hdmi_read_edid(struct omap_video_timings *dp)
code = get_timings_index();
- *dp = cea_vesa_timings[code].timings;
+ copy_hdmi_to_dss_timings(cea_vesa_timings[code].timings, dp);
+
}
static void hdmi_core_init(struct hdmi_core_video_config *video_cfg,
@@ -1178,7 +1194,8 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
hdmi_read_edid(p);
}
code = get_timings_index();
- dssdev-panel.timings = cea_vesa_timings[code].timings;
+ copy_hdmi_to_dss_timings(cea_vesa_timings[code].timings,
+ dssdev-panel.timings);
update_hdmi_timings(hdmi.ip_data.cfg, p, code);
phy = p-pixel_clock;
diff --git a/drivers/video/omap2/dss/hdmi.h b/drivers/video/omap2/dss/hdmi.h
index d2913f8..02342f6 100644
--- a/drivers/video/omap2/dss/hdmi.h
+++ b/drivers/video/omap2/dss/hdmi.h
@@ -198,9 +198,22 @@ struct hdmi_reg { u16 idx; };
#define REG_GET(base, idx, start, end) \
FLD_GET(hdmi_read_reg(base, idx), start, end)
+struct hdmi_video_timings {
+ u16 x_res;
+ u16 y_res;
+ /* Unit: KHz */
+ u32 pixel_clock;
+ u16 hsw;
+ u16 hfp;
+ u16 hbp;
+ u16 vsw;
+ u16 vfp;
+ u16 vbp;
+};
+
/* HDMI timing structure */
struct hdmi_timings {
- struct omap_video_timings timings;
+ struct hdmi_video_timings timings;
int vsync_pol;
int hsync_pol;
};
--
1.7.5.4
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[PATCH 10/10] OMAP4: DSS: Rename hdmi_omap4_panel.c to hdmi_panel.c
From: Mythri P K mythr...@ti.com
As the panel driver will remain generic across OMAP's renaming it to
hdmi_panel.c
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/Makefile |2 +-
.../omap2/dss/{hdmi_omap4_panel.c = hdmi_panel.c} |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
rename drivers/video/omap2/dss/{hdmi_omap4_panel.c = hdmi_panel.c} (99%)
diff --git a/drivers/video/omap2/dss/Makefile b/drivers/video/omap2/dss/Makefile
index 9627829..bd34ac5 100644
--- a/drivers/video/omap2/dss/Makefile
+++ b/drivers/video/omap2/dss/Makefile
@@ -6,4 +6,4 @@ omapdss-$(CONFIG_OMAP2_DSS_VENC) += venc.o
omapdss-$(CONFIG_OMAP2_DSS_SDI) += sdi.o
omapdss-$(CONFIG_OMAP2_DSS_DSI) += dsi.o
omapdss-$(CONFIG_OMAP4_DSS_HDMI) += hdmi.o \
- hdmi_omap4_panel.o ti_hdmi_4xxx_ip.o
+ hdmi_panel.o ti_hdmi_4xxx_ip.o
diff --git a/drivers/video/omap2/dss/hdmi_omap4_panel.c
b/drivers/video/omap2/dss/hdmi_panel.c
similarity index 99%
rename from drivers/video/omap2/dss/hdmi_omap4_panel.c
rename to drivers/video/omap2/dss/hdmi_panel.c
index 7d4f2bd..e30182f 100644
--- a/drivers/video/omap2/dss/hdmi_omap4_panel.c
+++ b/drivers/video/omap2/dss/hdmi_panel.c
@@ -1,5 +1,5 @@
/*
- * hdmi_omap4_panel.c
+ * hdmi_panel.c
*
* HDMI library support functions for TI OMAP4 processors.
*
--
1.7.5.4
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[PATCH 09/10] OMAP4: DSS2: HDMI: Function pointer approach to call
From: Mythri P K mythr...@ti.com
HDMI IP fundamentally has replaceable core PHY and PLL blocks.
These blocks might vary across OMAP's but the end functionality such as to
enable or disable PLL, PHY, function to read EDID would remain the same.
Thus to make the current hdmi DSS driver compatible with different OMAP's having
different IP blocks( A combination of different core, PHY, PLL blocks), function
pointer approach is introduced.
With function pointer, relevant IP dependent functions are mapped to the generic
functions used by DSS during the initialization based on the OMAP compiled.
Thus making hdmi DSS driver IP agnostic.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/dss_features.c | 20
drivers/video/omap2/dss/dss_features.h |7 +++
drivers/video/omap2/dss/hdmi.c | 19 ++-
drivers/video/omap2/dss/ti_hdmi.h | 21 +
4 files changed, 58 insertions(+), 9 deletions(-)
diff --git a/drivers/video/omap2/dss/dss_features.c
b/drivers/video/omap2/dss/dss_features.c
index b63c5f8..8670612 100644
--- a/drivers/video/omap2/dss/dss_features.c
+++ b/drivers/video/omap2/dss/dss_features.c
@@ -429,6 +429,26 @@ static const struct omap_dss_features omap4_dss_features =
{
.burst_size_unit = 16,
};
+#if defined(CONFIG_OMAP4_DSS_HDMI)
+/* HDMI OMAP4 Functions*/
+static const struct ti_hdmi_ip_ops omap4_hdmi_functions = {
+
+ .video_configure= ti_hdmi_4xxx_basic_configure,
+ .phy_enable = ti_hdmi_4xxx_phy_enable,
+ .phy_disable= ti_hdmi_4xxx_phy_disable,
+ .read_edid = ti_hdmi_4xxx_read_edid,
+ .pll_enable = ti_hdmi_4xxx_pll_enable,
+ .pll_disable= ti_hdmi_4xxx_pll_disable,
+ .video_enable = ti_hdmi_4xxx_wp_video_start,
+};
+
+void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data)
+{
+ if (cpu_is_omap44xx())
+ ip_data-ops = omap4_hdmi_functions;
+}
+#endif
+
/* Functions returning values related to a DSS feature */
int dss_feat_get_num_mgrs(void)
{
diff --git a/drivers/video/omap2/dss/dss_features.h
b/drivers/video/omap2/dss/dss_features.h
index 4271e96..e89ae5f 100644
--- a/drivers/video/omap2/dss/dss_features.h
+++ b/drivers/video/omap2/dss/dss_features.h
@@ -20,6 +20,10 @@
#ifndef __OMAP2_DSS_FEATURES_H
#define __OMAP2_DSS_FEATURES_H
+#if defined(CONFIG_OMAP4_DSS_HDMI)
+#include ti_hdmi.h
+#endif
+
#define MAX_DSS_MANAGERS 3
#define MAX_DSS_OVERLAYS 3
#define MAX_DSS_LCD_MANAGERS 2
@@ -99,4 +103,7 @@ u32 dss_feat_get_burst_size_unit(void); /* in
bytes */
bool dss_has_feature(enum dss_feat_id id);
void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end);
void dss_features_init(void);
+#if defined(CONFIG_OMAP4_DSS_HDMI)
+void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data);
+#endif
#endif
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 5afc51b..8cef940 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -186,6 +186,7 @@ int hdmi_init_display(struct omap_dss_device *dssdev)
{
DSSDBG(init_display\n);
+ dss_init_hdmi_ip_ops(hdmi.ip_data);
return 0;
}
@@ -366,7 +367,7 @@ static void hdmi_read_edid(struct omap_video_timings *dp)
memset(hdmi.edid, 0, HDMI_EDID_MAX_LENGTH);
if (!hdmi.edid_set)
- ret = ti_hdmi_4xxx_read_edid(hdmi.ip_data, hdmi.edid,
+ ret = hdmi.ip_data.ops-read_edid(hdmi.ip_data, hdmi.edid,
HDMI_EDID_MAX_LENGTH);
if (!ret) {
if (!memcmp(hdmi.edid, edid_header, sizeof(edid_header))) {
@@ -480,16 +481,16 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
hdmi_compute_pll(dssdev, phy, hdmi.ip_data.pll_data);
- ti_hdmi_4xxx_wp_video_start(hdmi.ip_data, 0);
+ hdmi.ip_data.ops-video_enable(hdmi.ip_data, 0);
/* config the PLL and PHY hdmi_set_pll_pwrfirst */
- r = ti_hdmi_4xxx_pll_enable(hdmi.ip_data);
+ r = hdmi.ip_data.ops-pll_enable(hdmi.ip_data);
if (r) {
DSSDBG(Failed to lock PLL\n);
goto err;
}
- r = ti_hdmi_4xxx_phy_enable(hdmi.ip_data);
+ r = hdmi.ip_data.ops-phy_enable(hdmi.ip_data);
if (r) {
DSSDBG(Failed to start PHY\n);
goto err;
@@ -497,7 +498,7 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
hdmi.ip_data.cfg.cm.mode = hdmi.mode;
hdmi.ip_data.cfg.cm.code = hdmi.code;
- ti_hdmi_4xxx_basic_configure(hdmi.ip_data);
+ hdmi.ip_data.ops-video_configure(hdmi.ip_data);
/* Make selection of HDMI in DSS */
dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
@@ -519,7 +520,7 @@ static int hdmi_power_on(struct omap_dss_device
[PATCH 06/10] OMAP4: DSS2: HDMI: Split the current HDMI driver to move
From: Mythri P K mythr...@ti.com
Split the current HDMI driver to move the HDMI IP dependent ( PLL/PHY/Core
configuration code) to a new IP file (ti_hdmi_4xxx_ip.c.
This is to separate IP dependent OMAP agnostic code from OMAP specific DSS
dependent code.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/Makefile |2 +-
drivers/video/omap2/dss/hdmi.c | 734 ---
drivers/video/omap2/dss/ti_hdmi.h |7 +
drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c | 767
.../video/omap2/dss/{hdmi.h = ti_hdmi_4xxx_ip.h} |9 +-
5 files changed, 780 insertions(+), 739 deletions(-)
create mode 100644 drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
rename drivers/video/omap2/dss/{hdmi.h = ti_hdmi_4xxx_ip.h} (99%)
diff --git a/drivers/video/omap2/dss/Makefile b/drivers/video/omap2/dss/Makefile
index 10d9d3b..9627829 100644
--- a/drivers/video/omap2/dss/Makefile
+++ b/drivers/video/omap2/dss/Makefile
@@ -6,4 +6,4 @@ omapdss-$(CONFIG_OMAP2_DSS_VENC) += venc.o
omapdss-$(CONFIG_OMAP2_DSS_SDI) += sdi.o
omapdss-$(CONFIG_OMAP2_DSS_DSI) += dsi.o
omapdss-$(CONFIG_OMAP4_DSS_HDMI) += hdmi.o \
- hdmi_omap4_panel.o
+ hdmi_omap4_panel.o ti_hdmi_4xxx_ip.o
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 96a0ac9..b6d63c6 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -41,7 +41,6 @@
#include ti_hdmi.h
#include dss.h
-#include hdmi.h
#include dss_features.h
#define HDMI_WP0x0
@@ -161,56 +160,6 @@ static const int code_vesa[85] = {
static const u8 edid_header[8] = {0x0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0x0};
-static inline void hdmi_write_reg(void __iomem *base_addr,
- const struct hdmi_reg idx, u32 val)
-{
- __raw_writel(val, base_addr + idx.idx);
-}
-
-static inline u32 hdmi_read_reg(void __iomem *base_addr,
- const struct hdmi_reg idx)
-{
- return __raw_readl(base_addr + idx.idx);
-}
-
-static inline void __iomem *hdmi_wp_base(struct hdmi_ip_data *ip_data)
-{
- return ip_data-base_wp;
-}
-
-static inline void __iomem *hdmi_phy_base(struct hdmi_ip_data *ip_data)
-{
- return ip_data-base_wp + ip_data-phy_offset;
-}
-
-static inline void __iomem *hdmi_pll_base(struct hdmi_ip_data *ip_data)
-{
- return ip_data-base_wp + ip_data-pll_offset;
-}
-
-static inline void __iomem *hdmi_av_base(struct hdmi_ip_data *ip_data)
-{
- return ip_data-base_wp + ip_data-core_av_offset;
-}
-
-static inline void __iomem *hdmi_core_sys_base(struct hdmi_ip_data *ip_data)
-{
- return ip_data-base_wp + ip_data-core_sys_offset;
-}
-
-static inline int hdmi_wait_for_bit_change(void __iomem *base_addr,
- const struct hdmi_reg idx,
- int b2, int b1, u32 val)
-{
- u32 t = 0;
- while (val != REG_GET(base_addr, idx, b2, b1)) {
- udelay(1);
- if (t++ 1)
- return !val;
- }
- return val;
-}
-
static int hdmi_runtime_get(void)
{
int r;
@@ -239,312 +188,6 @@ int hdmi_init_display(struct omap_dss_device *dssdev)
return 0;
}
-static int hdmi_pll_init(struct hdmi_ip_data *ip_data)
-{
- u32 r;
- void __iomem *pll_base = hdmi_pll_base(ip_data);
- struct hdmi_pll_info *fmt = ip_data-pll_data;
-
- /* PLL start always use manual mode */
- REG_FLD_MOD(pll_base, PLLCTRL_PLL_CONTROL, 0x0, 0, 0);
-
- r = hdmi_read_reg(pll_base, PLLCTRL_CFG1);
- r = FLD_MOD(r, fmt-regm, 20, 9); /* CFG1_PLL_REGM */
- r = FLD_MOD(r, fmt-regn, 8, 1); /* CFG1_PLL_REGN */
-
- hdmi_write_reg(pll_base, PLLCTRL_CFG1, r);
-
- r = hdmi_read_reg(pll_base, PLLCTRL_CFG2);
-
- r = FLD_MOD(r, 0x0, 12, 12); /* PLL_HIGHFREQ divide by 2 */
- r = FLD_MOD(r, 0x1, 13, 13); /* PLL_REFEN */
- r = FLD_MOD(r, 0x0, 14, 14); /* PHY_CLKINEN de-assert during locking */
- r = FLD_MOD(r, fmt-refsel, 22, 21); /* REFSEL */
-
- if (fmt-dcofreq) {
- /* divider programming for frequency beyond 1000Mhz */
- REG_FLD_MOD(pll_base, PLLCTRL_CFG3, fmt-regsd, 17, 10);
- r = FLD_MOD(r, 0x4, 3, 1); /* 1000MHz and 2000MHz */
- } else {
- r = FLD_MOD(r, 0x2, 3, 1); /* 500MHz and 1000MHz */
- }
-
- hdmi_write_reg(pll_base, PLLCTRL_CFG2, r);
-
- r = hdmi_read_reg(pll_base, PLLCTRL_CFG4);
- r = FLD_MOD(r, fmt-regm2, 24, 18);
- r = FLD_MOD(r, fmt-regmf, 17, 0);
-
- hdmi_write_reg(pll_base, PLLCTRL_CFG4, r);
-
- /* go now */
- REG_FLD_MOD(pll_base, PLLCTRL_PLL_GO, 0x1, 0, 0);
-
- /* wait for bit change */
- if (hdmi_wait_for_bit_change(pll_base, PLLCTRL_PLL_GO,
-
[PATCH 08/10] OMAP4: DSS: HDMI: Rename the functions in HDMI IP library
From: Mythri P K mythr...@ti.com
Functions that are included in HDMI IP driver is renamed to have
IP specific names so that it will not conflict with similar functions
from other IP.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/hdmi.c| 18 +-
drivers/video/omap2/dss/ti_hdmi.h | 15 ---
drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c | 20 +---
3 files changed, 30 insertions(+), 23 deletions(-)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 2a8a55d..5afc51b 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -366,7 +366,7 @@ static void hdmi_read_edid(struct omap_video_timings *dp)
memset(hdmi.edid, 0, HDMI_EDID_MAX_LENGTH);
if (!hdmi.edid_set)
- ret = read_edid(hdmi.ip_data, hdmi.edid,
+ ret = ti_hdmi_4xxx_read_edid(hdmi.ip_data, hdmi.edid,
HDMI_EDID_MAX_LENGTH);
if (!ret) {
if (!memcmp(hdmi.edid, edid_header, sizeof(edid_header))) {
@@ -480,16 +480,16 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
hdmi_compute_pll(dssdev, phy, hdmi.ip_data.pll_data);
- hdmi_wp_video_start(hdmi.ip_data, 0);
+ ti_hdmi_4xxx_wp_video_start(hdmi.ip_data, 0);
/* config the PLL and PHY hdmi_set_pll_pwrfirst */
- r = hdmi_pll_program(hdmi.ip_data);
+ r = ti_hdmi_4xxx_pll_enable(hdmi.ip_data);
if (r) {
DSSDBG(Failed to lock PLL\n);
goto err;
}
- r = hdmi_phy_init(hdmi.ip_data);
+ r = ti_hdmi_4xxx_phy_enable(hdmi.ip_data);
if (r) {
DSSDBG(Failed to start PHY\n);
goto err;
@@ -497,7 +497,7 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
hdmi.ip_data.cfg.cm.mode = hdmi.mode;
hdmi.ip_data.cfg.cm.code = hdmi.code;
- hdmi_basic_configure(hdmi.ip_data);
+ ti_hdmi_4xxx_basic_configure(hdmi.ip_data);
/* Make selection of HDMI in DSS */
dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
@@ -519,7 +519,7 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
dispc_mgr_enable(OMAP_DSS_CHANNEL_DIGIT, 1);
- hdmi_wp_video_start(hdmi.ip_data, 1);
+ ti_hdmi_4xxx_wp_video_start(hdmi.ip_data, 1);
return 0;
err:
@@ -531,9 +531,9 @@ static void hdmi_power_off(struct omap_dss_device *dssdev)
{
dispc_mgr_enable(OMAP_DSS_CHANNEL_DIGIT, 0);
- hdmi_wp_video_start(hdmi.ip_data, 0);
- hdmi_phy_off(hdmi.ip_data);
- hdmi_set_pll_pwr(hdmi.ip_data, HDMI_PLLPWRCMD_ALLOFF);
+ ti_hdmi_4xxx_wp_video_start(hdmi.ip_data, 0);
+ ti_hdmi_4xxx_phy_disable(hdmi.ip_data);
+ ti_hdmi_4xxx_pll_disable(hdmi.ip_data);
hdmi_runtime_put();
hdmi.edid_set = 0;
diff --git a/drivers/video/omap2/dss/ti_hdmi.h
b/drivers/video/omap2/dss/ti_hdmi.h
index 7c63098..823fbe6 100644
--- a/drivers/video/omap2/dss/ti_hdmi.h
+++ b/drivers/video/omap2/dss/ti_hdmi.h
@@ -91,11 +91,12 @@ struct hdmi_ip_data {
struct hdmi_config cfg;
struct hdmi_pll_info pll_data;
};
-int hdmi_phy_init(struct hdmi_ip_data *ip_data);
-void hdmi_phy_off(struct hdmi_ip_data *ip_data);
-int read_edid(struct hdmi_ip_data *ip_data, u8 *pedid, u16 max_length);
-void hdmi_wp_video_start(struct hdmi_ip_data *ip_data, bool start);
-int hdmi_pll_program(struct hdmi_ip_data *ip_data);
-int hdmi_set_pll_pwr(struct hdmi_ip_data *ip_data, enum hdmi_pll_pwr val);
-void hdmi_basic_configure(struct hdmi_ip_data *ip_data);
+int ti_hdmi_4xxx_phy_enable(struct hdmi_ip_data *ip_data);
+void ti_hdmi_4xxx_phy_disable(struct hdmi_ip_data *ip_data);
+int ti_hdmi_4xxx_read_edid(struct hdmi_ip_data *ip_data,
+ u8 *pedid, u16 max_length);
+void ti_hdmi_4xxx_wp_video_start(struct hdmi_ip_data *ip_data, bool start);
+int ti_hdmi_4xxx_pll_enable(struct hdmi_ip_data *ip_data);
+void ti_hdmi_4xxx_pll_disable(struct hdmi_ip_data *ip_data);
+void ti_hdmi_4xxx_basic_configure(struct hdmi_ip_data *ip_data);
#endif
diff --git a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
index c2a98f8..cb3a2d6 100644
--- a/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
+++ b/drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c
@@ -164,7 +164,7 @@ static int hdmi_set_phy_pwr(struct hdmi_ip_data *ip_data,
enum hdmi_phy_pwr val)
}
/* PLL_PWR_CMD */
-int hdmi_set_pll_pwr(struct hdmi_ip_data *ip_data, enum hdmi_pll_pwr val)
+static int hdmi_set_pll_pwr(struct hdmi_ip_data *ip_data, enum hdmi_pll_pwr
val)
{
/* Command for power control of HDMI PLL */
REG_FLD_MOD(hdmi_wp_base(ip_data), HDMI_WP_PWR_CTRL, val, 3, 2);
@@ -194,7 +194,7 @@ static int hdmi_pll_reset(struct hdmi_ip_data *ip_data)
return 0;
}
-int hdmi_pll_program(struct hdmi_ip_data *ip_data)
+int
[PATCH 05/10] OMAP4 : DSS : HDMI : Move the EDID definition from HDMI
From: Mythri P K mythr...@ti.com
Clean up to move the EDID definition from the IP dependent header file to
hdmi.c
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/hdmi.c | 10 ++
drivers/video/omap2/dss/hdmi.h | 10 --
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index bf76c87..96a0ac9 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -50,6 +50,16 @@
#define HDMI_PLLCTRL 0x200
#define HDMI_PHY 0x300
+/* HDMI EDID Length move this */
+#define HDMI_EDID_MAX_LENGTH 256
+#define EDID_TIMING_DESCRIPTOR_SIZE0x12
+#define EDID_DESCRIPTOR_BLOCK0_ADDRESS 0x36
+#define EDID_DESCRIPTOR_BLOCK1_ADDRESS 0x80
+#define EDID_SIZE_BLOCK0_TIMING_DESCRIPTOR 4
+#define EDID_SIZE_BLOCK1_TIMING_DESCRIPTOR 4
+
+#define OMAP_HDMI_TIMINGS_NB 34
+
static struct {
struct mutex lock;
struct omap_display_platform_data *pdata;
diff --git a/drivers/video/omap2/dss/hdmi.h b/drivers/video/omap2/dss/hdmi.h
index cb50f6a..2d4a22e 100644
--- a/drivers/video/omap2/dss/hdmi.h
+++ b/drivers/video/omap2/dss/hdmi.h
@@ -182,16 +182,6 @@ struct hdmi_reg { u16 idx; };
#define HDMI_TXPHY_POWER_CTRL HDMI_REG(0x8)
#define HDMI_TXPHY_PAD_CFG_CTRLHDMI_REG(0xC)
-/* HDMI EDID Length */
-#define HDMI_EDID_MAX_LENGTH 256
-#define EDID_TIMING_DESCRIPTOR_SIZE0x12
-#define EDID_DESCRIPTOR_BLOCK0_ADDRESS 0x36
-#define EDID_DESCRIPTOR_BLOCK1_ADDRESS 0x80
-#define EDID_SIZE_BLOCK0_TIMING_DESCRIPTOR 4
-#define EDID_SIZE_BLOCK1_TIMING_DESCRIPTOR 4
-
-#define OMAP_HDMI_TIMINGS_NB 34
-
#define REG_FLD_MOD(base, idx, val, start, end) \
hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\
val, start, end))
--
1.7.5.4
--
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[PATCH 04/10] OMAP4: DSS: HDMI: Move HDMI IP independent generic header
From: Mythri P K mythr...@ti.com
Some of the header file definitions that are there in the hdmi.h are generic
and can be used across OMAP's, Thus moving generic definition to new file.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/dss.h | 18 ---
drivers/video/omap2/dss/hdmi.c|1 +
drivers/video/omap2/dss/hdmi.h| 53 -
drivers/video/omap2/dss/ti_hdmi.h | 94 +
4 files changed, 95 insertions(+), 71 deletions(-)
create mode 100644 drivers/video/omap2/dss/ti_hdmi.h
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index 4cb264e..7c9565f 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -150,24 +150,6 @@ struct dsi_clock_info {
bool use_sys_clk;
};
-enum hdmi_clk_refsel {
- HDMI_REFSEL_PCLK = 0,
- HDMI_REFSEL_REF1 = 1,
- HDMI_REFSEL_REF2 = 2,
- HDMI_REFSEL_SYSCLK = 3
-};
-
-/* HDMI PLL structure */
-struct hdmi_pll_info {
- u16 regn;
- u16 regm;
- u32 regmf;
- u16 regm2;
- u16 regsd;
- u16 dcofreq;
- enum hdmi_clk_refsel refsel;
-};
-
struct seq_file;
struct platform_device;
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index c387bf4..bf76c87 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -39,6 +39,7 @@
#include sound/pcm_params.h
#endif
+#include ti_hdmi.h
#include dss.h
#include hdmi.h
#include dss_features.h
diff --git a/drivers/video/omap2/dss/hdmi.h b/drivers/video/omap2/dss/hdmi.h
index 02342f6..cb50f6a 100644
--- a/drivers/video/omap2/dss/hdmi.h
+++ b/drivers/video/omap2/dss/hdmi.h
@@ -198,39 +198,12 @@ struct hdmi_reg { u16 idx; };
#define REG_GET(base, idx, start, end) \
FLD_GET(hdmi_read_reg(base, idx), start, end)
-struct hdmi_video_timings {
- u16 x_res;
- u16 y_res;
- /* Unit: KHz */
- u32 pixel_clock;
- u16 hsw;
- u16 hfp;
- u16 hbp;
- u16 vsw;
- u16 vfp;
- u16 vbp;
-};
-
-/* HDMI timing structure */
-struct hdmi_timings {
- struct hdmi_video_timings timings;
- int vsync_pol;
- int hsync_pol;
-};
-
enum hdmi_phy_pwr {
HDMI_PHYPWRCMD_OFF = 0,
HDMI_PHYPWRCMD_LDOON = 1,
HDMI_PHYPWRCMD_TXON = 2
};
-enum hdmi_pll_pwr {
- HDMI_PLLPWRCMD_ALLOFF = 0,
- HDMI_PLLPWRCMD_PLLONLY = 1,
- HDMI_PLLPWRCMD_BOTHON_ALLCLKS = 2,
- HDMI_PLLPWRCMD_BOTHON_NOPHYCLK = 3
-};
-
enum hdmi_core_inputbus_width {
HDMI_INPUT_8BIT = 0,
HDMI_INPUT_10BIT = 1,
@@ -259,11 +232,6 @@ enum hdmi_core_packet_mode {
HDMI_PACKETMODE48BITPERPIXEL = 7
};
-enum hdmi_core_hdmi_dvi {
- HDMI_DVI = 0,
- HDMI_HDMI = 1
-};
-
enum hdmi_core_tclkselclkmult {
HDMI_FPLL05IDCK = 0,
HDMI_FPLL10IDCK = 1,
@@ -564,27 +532,6 @@ struct hdmi_video_interface {
int tm; /* Timing mode */
};
-struct hdmi_cm {
- int code;
- int mode;
-};
-
-struct hdmi_config {
- struct hdmi_timings timings;
- u16 interlace;
- struct hdmi_cm cm;
-};
-
-struct hdmi_ip_data {
- void __iomem*base_wp; /* HDMI wrapper */
- unsigned long core_sys_offset;
- unsigned long core_av_offset;
- unsigned long pll_offset;
- unsigned long phy_offset;
- struct hdmi_config cfg;
- struct hdmi_pll_info pll_data;
-};
-
struct hdmi_audio_format {
enum hdmi_stereo_channels stereo_channels;
u8 active_chnnls_msk;
diff --git a/drivers/video/omap2/dss/ti_hdmi.h
b/drivers/video/omap2/dss/ti_hdmi.h
new file mode 100644
index 000..f0e508e
--- /dev/null
+++ b/drivers/video/omap2/dss/ti_hdmi.h
@@ -0,0 +1,94 @@
+/*
+ * ti_hdmi.h
+ *
+ * HDMI driver definition for TI OMAP4, DM81xx, DM38xx Processor.
+ *
+ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see http://www.gnu.org/licenses/.
+ */
+
+#ifndef _TI_HDMI_H
+#define _TI_HDMI_H
+
+enum hdmi_pll_pwr {
+ HDMI_PLLPWRCMD_ALLOFF = 0,
+ HDMI_PLLPWRCMD_PLLONLY = 1,
+ HDMI_PLLPWRCMD_BOTHON_ALLCLKS = 2,
+ HDMI_PLLPWRCMD_BOTHON_NOPHYCLK = 3
+};
+
+enum hdmi_core_hdmi_dvi {
+ HDMI_DVI = 0,
+ HDMI_HDMI = 1
+};
+
+enum hdmi_clk_refsel {
+
[PATCH 07/10]OMAP4: DSS2: HDMI: Move the HDMI IP dependent audio
From: Mythri P K mythr...@ti.com
Move HDMI IP dependent audio functions from HDMI DSS file to IP library.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/hdmi.c| 257 +
drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c | 260 +
drivers/video/omap2/dss/ti_hdmi_4xxx_ip.h | 22 +++
3 files changed, 283 insertions(+), 256 deletions(-)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index b6d63c6..2a8a55d 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -37,6 +37,7 @@
defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI_MODULE)
#include sound/soc.h
#include sound/pcm_params.h
+#include ti_hdmi_4xxx_ip.h
#endif
#include ti_hdmi.h
@@ -630,229 +631,6 @@ void omapdss_hdmi_display_disable(struct omap_dss_device
*dssdev)
#if defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI) || \
defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI_MODULE)
-static void hdmi_wp_audio_config_format(struct hdmi_ip_data *ip_data,
- struct hdmi_audio_format *aud_fmt)
-{
- u32 r;
-
- DSSDBG(Enter hdmi_wp_audio_config_format\n);
-
- r = hdmi_read_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CFG);
- r = FLD_MOD(r, aud_fmt-stereo_channels, 26, 24);
- r = FLD_MOD(r, aud_fmt-active_chnnls_msk, 23, 16);
- r = FLD_MOD(r, aud_fmt-en_sig_blk_strt_end, 5, 5);
- r = FLD_MOD(r, aud_fmt-type, 4, 4);
- r = FLD_MOD(r, aud_fmt-justification, 3, 3);
- r = FLD_MOD(r, aud_fmt-sample_order, 2, 2);
- r = FLD_MOD(r, aud_fmt-samples_per_word, 1, 1);
- r = FLD_MOD(r, aud_fmt-sample_size, 0, 0);
- hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CFG, r);
-}
-
-static void hdmi_wp_audio_config_dma(struct hdmi_ip_data *ip_data,
- struct hdmi_audio_dma *aud_dma)
-{
- u32 r;
-
- DSSDBG(Enter hdmi_wp_audio_config_dma\n);
-
- r = hdmi_read_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CFG2);
- r = FLD_MOD(r, aud_dma-transfer_size, 15, 8);
- r = FLD_MOD(r, aud_dma-block_size, 7, 0);
- hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CFG2, r);
-
- r = hdmi_read_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CTRL);
- r = FLD_MOD(r, aud_dma-mode, 9, 9);
- r = FLD_MOD(r, aud_dma-fifo_threshold, 8, 0);
- hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_AUDIO_CTRL, r);
-}
-
-static void hdmi_core_audio_config(struct hdmi_ip_data *ip_data,
- struct hdmi_core_audio_config *cfg)
-{
- u32 r;
- void __iomem *av_base = hdmi_av_base(ip_data);
-
- /* audio clock recovery parameters */
- r = hdmi_read_reg(av_base, HDMI_CORE_AV_ACR_CTRL);
- r = FLD_MOD(r, cfg-use_mclk, 2, 2);
- r = FLD_MOD(r, cfg-en_acr_pkt, 1, 1);
- r = FLD_MOD(r, cfg-cts_mode, 0, 0);
- hdmi_write_reg(av_base, HDMI_CORE_AV_ACR_CTRL, r);
-
- REG_FLD_MOD(av_base, HDMI_CORE_AV_N_SVAL1, cfg-n, 7, 0);
- REG_FLD_MOD(av_base, HDMI_CORE_AV_N_SVAL2, cfg-n 8, 7, 0);
- REG_FLD_MOD(av_base, HDMI_CORE_AV_N_SVAL3, cfg-n 16, 7, 0);
-
- if (cfg-cts_mode == HDMI_AUDIO_CTS_MODE_SW) {
- REG_FLD_MOD(av_base, HDMI_CORE_AV_CTS_SVAL1, cfg-cts, 7, 0);
- REG_FLD_MOD(av_base,
- HDMI_CORE_AV_CTS_SVAL2, cfg-cts 8, 7, 0);
- REG_FLD_MOD(av_base,
- HDMI_CORE_AV_CTS_SVAL3, cfg-cts 16, 7, 0);
- } else {
- /*
-* HDMI IP uses this configuration to divide the MCLK to
-* update CTS value.
-*/
- REG_FLD_MOD(av_base,
- HDMI_CORE_AV_FREQ_SVAL, cfg-mclk_mode, 2, 0);
-
- /* Configure clock for audio packets */
- REG_FLD_MOD(av_base, HDMI_CORE_AV_AUD_PAR_BUSCLK_1,
- cfg-aud_par_busclk, 7, 0);
- REG_FLD_MOD(av_base, HDMI_CORE_AV_AUD_PAR_BUSCLK_2,
- (cfg-aud_par_busclk 8), 7, 0);
- REG_FLD_MOD(av_base, HDMI_CORE_AV_AUD_PAR_BUSCLK_3,
- (cfg-aud_par_busclk 16), 7, 0);
- }
-
- /* Override of SPDIF sample frequency with value in I2S_CHST4 */
- REG_FLD_MOD(av_base, HDMI_CORE_AV_SPDIF_CTRL,
- cfg-fs_override, 1, 1);
-
- /* I2S parameters */
- REG_FLD_MOD(av_base, HDMI_CORE_AV_I2S_CHST4,
- cfg-freq_sample, 3, 0);
-
- r = hdmi_read_reg(av_base, HDMI_CORE_AV_I2S_IN_CTRL);
- r = FLD_MOD(r, cfg-i2s_cfg.en_high_bitrate_aud, 7, 7);
- r = FLD_MOD(r, cfg-i2s_cfg.sck_edge_mode, 6, 6);
- r = FLD_MOD(r, cfg-i2s_cfg.cbit_order, 5, 5);
- r = FLD_MOD(r, cfg-i2s_cfg.vbit, 4, 4);
- r = FLD_MOD(r, cfg-i2s_cfg.ws_polarity, 3, 3);
-
Re: [linux-pm] Issue: Runtime API usage in wake-up device irq_handler during wakeup from system-wide-suspend.
Hi Tero, Tero Kristo t-kri...@ti.com writes: On Wed, 2011-09-07 at 19:59 +0200, Hilman, Kevin wrote: Tero Kristo t-kri...@ti.com writes: [...] After thinking about this problem and looking at possible ways to fix it, I am planning to change the PRCM chain handler to be a driver, which gets suspended along with the rest of the system. This means the PRCM interrupt would get disabled also during this time, and it would be enabled in the driver-complete() call, which should happen after rest of the drivers have been able to enable their PM runtime in the driver-resume() call chain. Do you see any problems with this approach? How will the system wakeup from retention or off-mode if the PRCM IRQ is disabled? This is actually some sort of an issue with retention if we disable PRCM irq completely, off works purely with wakeup signals as we come out of reset. Anyway, I did some experimentation with this, and OMAP3 is able to wake up if we leave WKUP irq up, but disable IO chain irq. IO chain events seem to trigger a WKUP event also always, we just postpone the processing of IO chain until later. I had to also split the wakeup clearing for OMAP3 into 2 parts, one part handles wakeups and another IO chain. Currently both IO chain and WKUP are acked by the same handler. Here's another option, which is kind of a hybrid of what's been discussed so far. The PRCM driver would leave the IRQs enabled during suspend, but would just delay delivering them to the drivers. IOW, handle/clear the PRCM IRQ normally, but delay delivery of the *device* IRQ until the -complete callback of the PRCM driver. Doing this ensures all the drivers are resumed before any device IRQ is delivered, and doesn't require any additional queuing of events in the drivers. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC 7/7] iommu/core: split mapping to page sizes as supported by the hardware
Hi KyongHo, On Thu, Sep 8, 2011 at 3:51 PM, KyongHo Cho pullip@samsung.com wrote: 16MB page is less practical in Linux because Linux kernel is unable to allocated larger physically contiguous memory than 4MB by default. But I also think that it is needed to support 16MB mapping for IO virtualization someday Actually we need physically contiguous memory regions that are much bigger (in the tens of megs), so we do utilize 16MB pages. Today we reserve that memory on boot, but the plan is to move to CMA. Actually, I think your idea is good and does not cause performance degradation. But I wondered if it is really useful. Well, the alternative is to duplicate this logic in every IOMMU driver. Go ahead and try to rebase your driver on my recent patch set and see if you like it; the result should significantly simplify your map/unmap functions. You only need to add this line: static unsigned long s5p_iommu_pgsizes = SZ_4K | SZ_64K | SZ_1M | SZ_16M; and then advertise it with iommu_register, and you're done. The IOMMU core will only ask you to handle a single page from now on, and will take care of the rest. The caller of iommu_map() gives gfp_order that is the size of the physical memory to map. I've changed it in the patch :) This way users are not bound to rigid mapping sizes (this allows us to better utilize the physically-contiguous memory region we reserve on boot). Thanks, Ohad. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 06/10] hwspinlock: OMAP4: Add spinlock support in DT
On Thursday 08 September 2011, Ohad Ben-Cohen wrote:
On Thu, Sep 8, 2011 at 11:07 AM, Cousson, Benoit b-cous...@ti.com wrote:
The (small) issue for my point of view is that the #hwspinlock is already
encoded in the IP itself. So adding a baseid directly in DT will look like
duplicating indirectly something that is already there in the HW.
That being said, since we cannot rely on the order, we will not be able to
get the proper baseid until the driver probe every hwspinlock devices :-(
So baseid might be a easier choice.
Sounds good. Thanks a lot !
I think a number would work here but is not optimal for the device tree
representation. I think a better binding would be to encode it like
interrupt numbers, where every device that uses a hwspinlock will describe
that as a combination of phandle to the hwspinlock controller and
identifier to be used by that controller, e.g.
spinlock1 {
compatible = ti,omap-spinlock;
regs = ...
interrupts = 42;
interrupt-parent = irq-controller;
};
dsp {
compatible = ...
regs = ...
spinlocks = 23; // local number withing spinlock1;
spinlock-controller = spinlock1;
};
or possibly shorter
spinlocks = spinlock1 23;
Arnd
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Re: [PATCH 1/8] OMAP: hwmod: Fix the addr spaces count API.
On 9/8/2011 11:32 AM, Shilimkar, Santosh wrote:
On Thursday 08 September 2011 02:45 PM, Sricharan R wrote:
Hi Benoit,
-Original Message-
From: Sricharan R [mailto:r.sricha...@ti.com]
Sent: Thursday, September 08, 2011 2:35 PM
To: Sricharan R
Subject: Re: [PATCH 1/8] OMAP: hwmod: Fix the addr spaces count API.
[...]
diff --git a/arch/arm/mach-omap2/omap_hwmod.c
b/arch/arm/mach-omap2/omap_hwmod.c
index 84cc0bd..32a0f48a 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -791,9 +791,11 @@ static int _count_ocp_if_addr_spaces(struct
omap_hwmod_ocp_if *os)
if (!os || !os-addr)
return 0;
- do {
- mem =os-addr[i++];
- } while (mem-pa_start != mem-pa_end);
+ mem =os-addr[i];
+
This extran line isn't needed Sricharan.
+ while (mem-pa_start != mem-pa_end) {
+ mem =os-addr[++i];
+ };
return i;
Cannot you just do return i - 1?
Right. That was the first idea.
But after some discussion concluded that
right way is to, not to take in to account, the
null structure itself, rather than incrementing and
decrementing.
I was the one who objected to the i-1 or i--
change. The count logic itself should
handle all the scenario's.
But this is the case even with the i-1.
That's a details, but it looks to me nicer to do a return i-1 to
highlight the extra empty entry that is added, instead of doing twice
mem =os-addr[i];
The loop is counting the real number of entries, but you return only the
relevant number by removing the terminator.
BTW, don't we have the same issue with _count_sdma_reqs and _count_mpu_irqs?
Regards,
Benoit
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[PATCH] ASoC: omap: convert per-board modules to platform drivers
This converts the per-board modules to platform drivers for a
device created by in main platform setup. These drivers call
snd_soc_register_card() directly instead of going via a soc-audio
device and the corresponding driver in soc-core.
Signed-off-by: Mans Rullgard mans.rullg...@linaro.org
---
Tested on Beagleboard. Other boards only compile-tested.
---
arch/arm/mach-omap2/devices.c |6 +++
sound/soc/omap/am3517evm.c| 55 ---
sound/soc/omap/igep0020.c | 52 +++--
sound/soc/omap/n810.c | 71 ++---
sound/soc/omap/omap3beagle.c | 55 ---
sound/soc/omap/omap3evm.c | 56 +---
sound/soc/omap/omap3pandora.c | 70 +---
sound/soc/omap/overo.c| 56
sound/soc/omap/rx51.c | 55 +--
sound/soc/omap/sdp3430.c | 65 +++--
sound/soc/omap/sdp4430.c | 60 ++-
sound/soc/omap/zoom2.c| 68 ++-
12 files changed, 429 insertions(+), 240 deletions(-)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 5b8ca68..7cb93d9 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -299,6 +299,11 @@ static struct platform_device omap_pcm = {
.id = -1,
};
+static struct platform_device omap_soc_audio = {
+ .name = omap-soc-audio,
+ .id = -1,
+};
+
/*
* OMAP2420 has 2 McBSP ports
* OMAP2430 has 5 McBSP ports
@@ -323,6 +328,7 @@ static void omap_init_audio(void)
platform_device_register(omap_mcbsp5);
platform_device_register(omap_pcm);
+ platform_device_register(omap_soc_audio);
}
#else
diff --git a/sound/soc/omap/am3517evm.c b/sound/soc/omap/am3517evm.c
index 73dde4a..fcd18af 100644
--- a/sound/soc/omap/am3517evm.c
+++ b/sound/soc/omap/am3517evm.c
@@ -151,45 +151,60 @@ static struct snd_soc_card snd_soc_am3517evm = {
.num_links = 1,
};
-static struct platform_device *am3517evm_snd_device;
-
-static int __init am3517evm_soc_init(void)
+static int __devinit am3517evm_soc_probe(struct platform_device *pdev)
{
+ struct snd_soc_card *card = snd_soc_am3517evm;
int ret;
- if (!machine_is_omap3517evm())
- return -ENODEV;
pr_info(OMAP3517 / AM3517 EVM SoC init\n);
- am3517evm_snd_device = platform_device_alloc(soc-audio, -1);
- if (!am3517evm_snd_device) {
- printk(KERN_ERR Platform device allocation failed\n);
- return -ENOMEM;
+ card-dev = pdev-dev;
+
+ ret = snd_soc_register_card(card);
+ if (ret) {
+ dev_err(pdev-dev, snd_soc_register_card() failed: %d\n,
+ ret);
+ return ret;
}
- platform_set_drvdata(am3517evm_snd_device, snd_soc_am3517evm);
+ return 0;
+}
- ret = platform_device_add(am3517evm_snd_device);
- if (ret)
- goto err1;
+static int __devexit am3517evm_soc_remove(struct platform_device *pdev)
+{
+ struct snd_soc_card *card = platform_get_drvdata(pdev);
+
+ snd_soc_unregister_card(card);
return 0;
+}
-err1:
- printk(KERN_ERR Unable to add platform device\n);
- platform_device_put(am3517evm_snd_device);
+static struct platform_driver am3517evm_driver = {
+ .driver = {
+ .name = omap-soc-audio,
+ .owner = THIS_MODULE,
+ },
- return ret;
+ .probe = am3517evm_soc_probe,
+ .remove = __devexit_p(am3517evm_soc_remove),
+};
+
+static int __init am3517evm_soc_init(void)
+{
+ if (!machine_is_omap3517evm())
+ return -ENODEV;
+
+ return platform_driver_register(am3517evm_driver);
}
+module_init(am3517evm_soc_init);
static void __exit am3517evm_soc_exit(void)
{
- platform_device_unregister(am3517evm_snd_device);
+ platform_driver_unregister(am3517evm_driver);
}
-
-module_init(am3517evm_soc_init);
module_exit(am3517evm_soc_exit);
MODULE_AUTHOR(Anuj Aggarwal anuj.aggar...@ti.com);
MODULE_DESCRIPTION(ALSA SoC OMAP3517 / AM3517 EVM);
MODULE_LICENSE(GPL v2);
+MODULE_ALIAS(platform:omap-soc-audio);
diff --git a/sound/soc/omap/igep0020.c b/sound/soc/omap/igep0020.c
index 0ae3470..ce1e58f 100644
--- a/sound/soc/omap/igep0020.c
+++ b/sound/soc/omap/igep0020.c
@@ -94,44 +94,60 @@ static struct snd_soc_card snd_soc_card_igep2 = {
.num_links = 1,
};
-static struct platform_device *igep2_snd_device;
-
-static int __init igep2_soc_init(void)
+static int __devinit igep2_soc_probe(struct platform_device *pdev)
{
+ struct snd_soc_card *card = snd_soc_card_igep2;
int ret;
- if (!machine_is_igep0020())
- return -ENODEV;
Re: [alsa-devel] [PATCH] ASoC: omap: convert per-board modules to platform drivers
On 09/08/2011 05:05 PM, Mans Rullgard wrote:
This converts the per-board modules to platform drivers for a
device created by in main platform setup. These drivers call
snd_soc_register_card() directly instead of going via a soc-audio
device and the corresponding driver in soc-core.
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 5b8ca68..7cb93d9 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -299,6 +299,11 @@ static struct platform_device omap_pcm = {
.id = -1,
};
+static struct platform_device omap_soc_audio = {
+ .name = omap-soc-audio,
+ .id = -1,
+};
+
/*
* OMAP2420 has 2 McBSP ports
* OMAP2430 has 5 McBSP ports
@@ -323,6 +328,7 @@ static void omap_init_audio(void)
platform_device_register(omap_mcbsp5);
platform_device_register(omap_pcm);
+ platform_device_register(omap_soc_audio);
}
#else
diff --git a/sound/soc/omap/am3517evm.c b/sound/soc/omap/am3517evm.c
index 73dde4a..fcd18af 100644
--- a/sound/soc/omap/am3517evm.c
+++ b/sound/soc/omap/am3517evm.c
@@ -151,45 +151,60 @@ static struct snd_soc_card snd_soc_am3517evm = {
.num_links = 1,
};
[...]
+static struct platform_driver am3517evm_driver = {
+ .driver = {
+ .name = omap-soc-audio,
+ .owner = THIS_MODULE,
+ },
- return ret;
+ .probe = am3517evm_soc_probe,
+ .remove = __devexit_p(am3517evm_soc_remove),
+};
+[...]
+
+static struct platform_driver igep2_driver = {
+ .driver = {
+ .name = omap-soc-audio,
+ .owner = THIS_MODULE,
+ },
+
+ .probe = igep2_soc_probe,
+ .remove = __devexit_p(igep2_soc_remove),
+};
[...]
+static struct platform_driver n810_driver = {
+ .driver = {
+ .name = omap-soc-audio,
+ .owner = THIS_MODULE,
+ },
+
+ .probe = n810_soc_probe,
+ .remove = __devexit_p(n810_soc_remove),
+};
[...]
This isn't really any better then using the soc-core device, since all your
drivers are still named the same. udev still wouldn't know which one to load.
Use different device driver names for different drivers.
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Re: [GIT PULL v3] OMAP: clock/powerdomain/clockdomain/hwmod: fixes for 3.1-rc
On Tuesday 06 September 2011, Russell King - ARM Linux wrote: On Tue, Sep 06, 2011 at 04:29:14AM -0700, Tony Lindgren wrote: Arnd, Care to pull the following fixes to the -rc series from Paul? Tony, I don't think that will happen until master.kernel.org is back online as the tree was hosted on that machine. Right. I have a number of pull requests lined up. While I did consider starting a new tree on git.linaro.org to handle the time until then, I'm still hoping for hera to get back online at some point, and linux-next is equally disabled for now. Please remind me about any pull requests that I may have forgotten once hera is back. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv7 0/9] PRCM chain handler
Hello, This is a preliminary review set for the PRCM chain handler driver work. This set is still missing the PRM hwmod interaction, which should replace patches 5 and 6. I am planning to post a new series as soon as this part is done (waiting for a little bit of help from Paul here.) Anyway, couple of highlights about this code here compared to previous set: - PRCM chain handler is now moved to a new PRM driver - Suspend disables IO chain event, and it is enabled at -complete PM callback, triggering IO chain processing at this point - OMAP3 PM code interrupt handler is split to two parts, wkup and io Applies on top of PM branch, so far tested on OMAP3 beagle. -Tero Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv7 3/9] OMAP2+: hwmod: Add API to check IO PAD wakeup status
From: R, Govindraj govindraj.r...@ti.com
Add API to determine IO-PAD wakeup event status for a given
hwmod dynamic_mux pad.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
arch/arm/mach-omap2/mux.c| 30 ++
arch/arm/mach-omap2/mux.h| 13 +++
arch/arm/mach-omap2/omap_hwmod.c |7 ++
arch/arm/plat-omap/include/plat/omap_hwmod.h |1 +
4 files changed, 51 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index c7fb22a..50ee806 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -351,6 +351,36 @@ err1:
return NULL;
}
+/**
+ * omap_hwmod_mux_get_wake_status - omap hwmod check pad wakeup
+ * @hmux: Pads for a hwmod
+ *
+ * Gets the wakeup status of given pad from omap-hwmod.
+ * Returns true if wakeup event is set for pad else false
+ * if wakeup is not occured or pads are not avialable.
+ */
+bool omap_hwmod_mux_get_wake_status(struct omap_hwmod_mux_info *hmux)
+{
+ int i;
+ unsigned int val;
+ u8 ret = false;
+
+ for (i = 0; i hmux-nr_pads; i++) {
+ struct omap_device_pad *pad = hmux-pads[i];
+
+ if (pad-flags OMAP_DEVICE_PAD_WAKEUP) {
+ val = omap_mux_read(pad-partition,
+ pad-mux-reg_offset);
+ if (val OMAP_WAKEUP_EVENT) {
+ ret = true;
+ break;
+ }
+ }
+ }
+
+ return ret;
+}
+
/* Assumes the calling function takes care of locking */
void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state)
{
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index 2132308..8b2150a 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -225,8 +225,21 @@ omap_hwmod_mux_init(struct omap_device_pad *bpads, int
nr_pads);
*/
void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state);
+/**
+ * omap_hwmod_mux_get_wake_status - omap hwmod check pad wakeup
+ * @hmux: Pads for a hwmod
+ *
+ * Called only from omap_hwmod.c, do not use.
+ */
+bool omap_hwmod_mux_get_wake_status(struct omap_hwmod_mux_info *hmux);
#else
+static inline bool
+omap_hwmod_mux_get_wake_status(struct omap_hwmod_mux_info *hmux)
+{
+ return 0;
+}
+
static inline int omap_mux_init_gpio(int gpio, int val)
{
return 0;
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index e751dd9..a8b24d7 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2724,3 +2724,10 @@ int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
return 0;
}
+
+int omap_hwmod_pad_get_wakeup_status(struct omap_hwmod *oh)
+{
+ if (oh oh-mux)
+ return omap_hwmod_mux_get_wake_status(oh-mux);
+ return -EINVAL;
+}
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 38ac4af..9c70cc8 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -606,6 +606,7 @@ u32 omap_hwmod_get_context_loss_count(struct omap_hwmod
*oh);
int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
+int omap_hwmod_pad_get_wakeup_status(struct omap_hwmod *oh);
/*
* Chip variant-specific hwmod init routines - XXX should be converted
* to use initcalls once the initial boot ordering is straightened out
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv7 2/9] OMAP2+: hwmod: Add API to enable IO ring wakeup.
From: R, Govindraj govindraj.r...@ti.com
Add API to enable IO pad wakeup capability based on mux dynamic pad and
wake_up enable flag available from hwmod_mux initialization.
Use the wakeup_enable flag and enable wakeup capability
for the given pads. Wakeup capability will be enabled/disabled
during hwmod idle transition based on whether wakeup_flag is
set or cleared.
Map the enable/disable pad wakeup API's to hwmod_wakeup_enable/disable.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 59 ++
1 files changed, 59 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 84cc0bd..e751dd9 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2062,6 +2062,34 @@ static int __init omap_hwmod_setup_all(void)
core_initcall(omap_hwmod_setup_all);
/**
+ * omap_hwmod_set_ioring_wakeup - enable io pad wakeup flag.
+ * @oh: struct omap_hwmod *
+ * @set: bool value indicating to set or clear wakeup status.
+ *
+ * Set or Clear wakeup flag for the io_pad.
+ */
+static int omap_hwmod_set_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
+{
+ struct omap_device_pad *pad;
+ int ret = -EINVAL, j;
+
+ if (oh-mux oh-mux-enabled) {
+ for (j = 0; j oh-mux-nr_pads_dynamic; j++) {
+ pad = oh-mux-pads_dynamic[j];
+ if (pad-flags OMAP_DEVICE_PAD_WAKEUP) {
+ if (set_wake)
+ pad-idle |= OMAP_WAKEUP_EN;
+ else
+ pad-idle = ~OMAP_WAKEUP_EN;
+ ret = 0;
+ }
+ }
+ }
+
+ return ret;
+}
+
+/**
* omap_hwmod_enable - enable an omap_hwmod
* @oh: struct omap_hwmod *
*
@@ -2393,6 +2421,35 @@ int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
{
return _del_initiator_dep(oh, init_oh);
}
+/**
+ * omap_hwmod_enable_ioring_wakeup - Set wakeup flag for iopad.
+ * @oh: struct omap_hwmod *
+ *
+ * Traverse through dynamic pads, if pad is enabled then
+ * set wakeup enable bit flag for the mux pin. Wakeup pad bit
+ * will be set during hwmod idle transistion.
+ * Return error if pads are not enabled or not available.
+ */
+int omap_hwmod_enable_ioring_wakeup(struct omap_hwmod *oh)
+{
+ /* Enable pad wake-up capability */
+ return omap_hwmod_set_ioring_wakeup(oh, true);
+}
+
+/**
+ * omap_hwmod_disable_ioring_wakeup - Clear wakeup flag for iopad.
+ * @oh: struct omap_hwmod *
+ *
+ * Traverse through dynamic pads, if pad is enabled then
+ * clear wakeup enable bit flag for the mux pin. Wakeup pad bit
+ * will be set during hwmod idle transistion.
+ * Return error if pads are not enabled or not available.
+ */
+int omap_hwmod_disable_ioring_wakeup(struct omap_hwmod *oh)
+{
+ /* Disable pad wakeup capability */
+ return omap_hwmod_set_ioring_wakeup(oh, false);
+}
/**
* omap_hwmod_enable_wakeup - allow device to wake up the system
@@ -2419,6 +2476,7 @@ int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
v = oh-_sysc_cache;
_enable_wakeup(oh, v);
_write_sysconfig(v, oh);
+ omap_hwmod_enable_ioring_wakeup(oh);
spin_unlock_irqrestore(oh-_lock, flags);
return 0;
@@ -2449,6 +2507,7 @@ int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
v = oh-_sysc_cache;
_disable_wakeup(oh, v);
_write_sysconfig(v, oh);
+ omap_hwmod_disable_ioring_wakeup(oh);
spin_unlock_irqrestore(oh-_lock, flags);
return 0;
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv7 5/9] TEMP: power: omap-prm: added prcm events
Added wakeup and io event definitions for the PRCM interrupt handler.
This should eventually be generated from PRM hwmod data.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
drivers/power/omap_prm.c | 34 +++---
1 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/drivers/power/omap_prm.c b/drivers/power/omap_prm.c
index 745a4bc..ce0a872 100644
--- a/drivers/power/omap_prm.c
+++ b/drivers/power/omap_prm.c
@@ -50,6 +50,26 @@ static struct omap_prm_device prm_dev = {
},
};
+struct omap_prcm_irq {
+ const char *name;
+ unsigned int offset;
+ const struct omap_chip_id omap_chip;
+};
+
+#define OMAP_PRCM_IRQ(_name, _offset, _chip) { \
+ .name = _name, \
+ .offset = _offset, \
+ .omap_chip = OMAP_CHIP_INIT(_chip) \
+ }
+
+static struct omap_prcm_irq omap_prcm_irqs[] = {
+ OMAP_PRCM_IRQ(wkup, 0,
+ CHIP_IS_OMAP3430 | CHIP_GE_OMAP3630ES1_1),
+ OMAP_PRCM_IRQ(io, 9,
+ CHIP_IS_OMAP3430 | CHIP_GE_OMAP3630ES1_1 |
+ CHIP_IS_OMAP4430),
+};
+
static void prm_pending_events(unsigned long *events)
{
u32 ena, st;
@@ -167,10 +187,18 @@ static int __init omap_prcm_irq_init(void)
int i;
struct irq_chip_generic *gc;
struct irq_chip_type *ct;
+ u32 mask[OMAP_PRCM_MAX_NR_PENDING_REG];
int offset;
- int max_irq = 64;
+ int max_irq = 0;
- /* XXX: supported irqs should be setup here */
+ memset(mask, 0, sizeof(mask));
+ for (i = 0; i ARRAY_SIZE(omap_prcm_irqs); i++)
+ if (omap_chip_is(omap_prcm_irqs[i].omap_chip)) {
+ offset = omap_prcm_irqs[i].offset;
+ mask[offset 5] |= 1 (offset 0x1f);
+ if (offset max_irq)
+ max_irq = offset;
+ }
irq_set_chained_handler(prm_dev.irq_setup.irq, prcm_irq_handler);
@@ -207,7 +235,7 @@ static int __init omap_prcm_irq_init(void)
ct-regs.ack = prm_dev.irq_setup.ack + (i 2);
ct-regs.mask = prm_dev.irq_setup.mask + (i 2);
- irq_setup_generic_chip(gc, 0x, 0, IRQ_NOREQUEST, 0);
+ irq_setup_generic_chip(gc, mask[i], 0, IRQ_NOREQUEST, 0);
prm_dev.irq_chips[i] = gc;
}
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv7 1/9] power: add omap prm driver skeleton
This driver will eventually support OMAP soc PRM module features, e.g. PRCM
chain interrupts.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
drivers/power/Kconfig|7
drivers/power/Makefile |1 +
drivers/power/omap_prm.c | 83 ++
3 files changed, 91 insertions(+), 0 deletions(-)
create mode 100644 drivers/power/omap_prm.c
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 57de051..e735a95 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -249,4 +249,11 @@ config CHARGER_MAX8998
Say Y to enable support for the battery charger control sysfs and
platform data of MAX8998/LP3974 PMICs.
+config OMAP_PRM
+ bool OMAP Power and Reset Management driver
+ depends on (ARCH_OMAP) PM
+ help
+ Say Y to enable support for the OMAP Power and Reset Management
+ driver.
+
endif # POWER_SUPPLY
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index b4af13d..8df93c2 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_WM831X_BACKUP) += wm831x_backup.o
obj-$(CONFIG_WM831X_POWER) += wm831x_power.o
obj-$(CONFIG_WM8350_POWER) += wm8350_power.o
obj-$(CONFIG_TEST_POWER) += test_power.o
+obj-$(CONFIG_OMAP_PRM) += omap_prm.o
obj-$(CONFIG_BATTERY_DS2760) += ds2760_battery.o
obj-$(CONFIG_BATTERY_DS2780) += ds2780_battery.o
diff --git a/drivers/power/omap_prm.c b/drivers/power/omap_prm.c
new file mode 100644
index 000..dfc0920
--- /dev/null
+++ b/drivers/power/omap_prm.c
@@ -0,0 +1,83 @@
+/*
+ * OMAP Power and Reset Management (PRM) driver
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ *
+ * Author: Tero Kristo t-kri...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include linux/kernel.h
+#include linux/ctype.h
+#include linux/module.h
+#include linux/io.h
+#include linux/slab.h
+#include linux/init.h
+#include linux/err.h
+#include linux/platform_device.h
+
+#define DRIVER_NAME omap-prm
+
+struct omap_prm_device {
+ struct platform_device pdev;
+};
+
+static struct omap_prm_device prm_dev = {
+ .pdev = {
+ .name = DRIVER_NAME,
+ .id = -1,
+ },
+};
+
+static int __init omap_prm_probe(struct platform_device *pdev)
+{
+ return 0;
+}
+
+static int __devexit omap_prm_remove(struct platform_device *pdev)
+{
+ return 0;
+}
+
+static struct platform_driver prm_driver = {
+ .remove = __exit_p(omap_prm_remove),
+ .driver = {
+ .name = DRIVER_NAME,
+ },
+};
+
+static int __init omap_prm_init(void)
+{
+ int ret;
+
+ ret = platform_device_register(prm_dev.pdev);
+
+ if (ret) {
+ printk(KERN_ERR Unable to register PRM device: %d\n, ret);
+ return ret;
+ }
+
+ ret = platform_driver_probe(prm_driver, omap_prm_probe);
+
+ if (ret)
+ printk(KERN_ERR PRM driver probe failed: %d\n, ret);
+
+ return ret;
+}
+subsys_initcall(omap_prm_init);
+
+static void __exit omap_prm_exit(void)
+{
+ platform_device_unregister(prm_dev.pdev);
+ platform_driver_unregister(prm_driver);
+}
+module_exit(omap_prm_exit);
+
+MODULE_ALIAS(platform:DRIVER_NAME);
+MODULE_AUTHOR(Tero Kristo t-kri...@ti.com);
+MODULE_DESCRIPTION(OMAP PRM driver);
+MODULE_LICENSE(GPL);
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv7 4/9] power: omap-prm: added prcm chain interrupt handler
The implementation in this patch still requires the irq_setup to be done
properly, and also lacks the supported interrupts. These will be added
in separate patches.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
drivers/power/omap_prm.c | 214 +++-
include/linux/power/omap_prm.h | 19
2 files changed, 231 insertions(+), 2 deletions(-)
create mode 100644 include/linux/power/omap_prm.h
diff --git a/drivers/power/omap_prm.c b/drivers/power/omap_prm.c
index dfc0920..745a4bc 100644
--- a/drivers/power/omap_prm.c
+++ b/drivers/power/omap_prm.c
@@ -15,15 +15,32 @@
#include linux/ctype.h
#include linux/module.h
#include linux/io.h
+#include linux/irq.h
+#include linux/interrupt.h
#include linux/slab.h
#include linux/init.h
#include linux/err.h
#include linux/platform_device.h
+#include plat/irqs.h
+
#define DRIVER_NAME omap-prm
+#define OMAP_PRCM_MAX_NR_PENDING_REG 2
+
+struct omap_prcm_irq_setup {
+ u32 ack;
+ u32 mask;
+ int irq;
+ int io_irq;
+ int base_irq;
+ int nr_regs;
+ int nr_irqs;
+};
struct omap_prm_device {
struct platform_device pdev;
+ struct omap_prcm_irq_setup irq_setup;
+ struct irq_chip_generic **irq_chips;
};
static struct omap_prm_device prm_dev = {
@@ -33,20 +50,213 @@ static struct omap_prm_device prm_dev = {
},
};
-static int __init omap_prm_probe(struct platform_device *pdev)
+static void prm_pending_events(unsigned long *events)
+{
+ u32 ena, st;
+ int i;
+
+ memset(events, 0, prm_dev.irq_setup.nr_regs * 8);
+
+ for (i = 0; i prm_dev.irq_setup.nr_regs; i++) {
+ ena = readl(prm_dev.irq_setup.mask);
+ st = readl(prm_dev.irq_setup.ack);
+ events[i] = ena st;
+ }
+}
+
+/*
+ * PRCM Interrupt Handler
+ *
+ * The PRM_IRQSTATUS_MPU register indicates if there are any pending
+ * interrupts from the PRCM for the MPU. These bits must be cleared in
+ * order to clear the PRCM interrupt. The PRCM interrupt handler is
+ * implemented to simply clear the PRM_IRQSTATUS_MPU in order to clear
+ * the PRCM interrupt. Please note that bit 0 of the PRM_IRQSTATUS_MPU
+ * register indicates that a wake-up event is pending for the MPU and
+ * this bit can only be cleared if the all the wake-up events latched
+ * in the various PM_WKST_x registers have been cleared. The interrupt
+ * handler is implemented using a do-while loop so that if a wake-up
+ * event occurred during the processing of the prcm interrupt handler
+ * (setting a bit in the corresponding PM_WKST_x register and thus
+ * preventing us from clearing bit 0 of the PRM_IRQSTATUS_MPU register)
+ * this would be handled.
+ */
+static void prcm_irq_handler(unsigned int irq, struct irq_desc *desc)
+{
+ unsigned long pending[OMAP_PRCM_MAX_NR_PENDING_REG];
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ unsigned int virtirq;
+ int nr_irqs = prm_dev.irq_setup.nr_irqs;
+
+ /*
+* Loop until all pending irqs are handled, since
+* generic_handle_irq() can cause new irqs to come
+*/
+ while (1) {
+ chip-irq_ack(desc-irq_data);
+
+ prm_pending_events(pending);
+
+ /* No bit set, then all IRQs are handled */
+ if (find_first_bit(pending, nr_irqs) = nr_irqs) {
+ chip-irq_unmask(desc-irq_data);
+ break;
+ }
+
+ /*
+* Loop on all currently pending irqs so that new irqs
+* cannot starve previously pending irqs
+*/
+ for_each_set_bit(virtirq, pending, nr_irqs)
+ generic_handle_irq(prm_dev.irq_setup.base_irq +
+ virtirq);
+
+ chip-irq_unmask(desc-irq_data);
+ }
+}
+
+/*
+ * Given a PRCM event name, returns the corresponding IRQ on which the
+ * handler should be registered.
+ */
+int omap_prcm_event_to_irq(const char *name)
+{
+ int i;
+
+ for (i = 0; i ARRAY_SIZE(omap_prcm_irqs); i++)
+ if (!strcmp(omap_prcm_irqs[i].name, name))
+ return prm_dev.irq_setup.base_irq +
+ omap_prcm_irqs[i].offset;
+
+ return -ENOENT;
+}
+
+/*
+ * Reverses memory allocated and other setups done by
+ * omap_prcm_irq_init().
+ */
+void omap_prcm_irq_cleanup(void)
{
+ int i;
+
+ if (prm_dev.irq_chips) {
+ for (i = 0; i prm_dev.irq_setup.nr_regs; i++) {
+ if (prm_dev.irq_chips[i])
+ irq_remove_generic_chip(prm_dev.irq_chips[i],
+ 0x, 0, 0);
+ prm_dev.irq_chips[i] = NULL;
+ }
+ kfree(prm_dev.irq_chips);
+ prm_dev.irq_chips = NULL;
+ }
+
+
[PATCHv7 7/9] OMAP2+: mux: add support for PAD wakeup interrupts
OMAP mux now provides a service routine to parse pending wakeup events
and to call registered ISR whenever active wakeups are detected. This
routine is called directly from PRCM interrupt handler.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/mux.c | 37 +
arch/arm/mach-omap2/mux.h |5 +
2 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 50ee806..b6ec5de 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -32,6 +32,9 @@
#include linux/debugfs.h
#include linux/seq_file.h
#include linux/uaccess.h
+#include linux/irq.h
+#include linux/interrupt.h
+#include linux/power/omap_prm.h
#include asm/system.h
@@ -381,6 +384,33 @@ bool omap_hwmod_mux_get_wake_status(struct
omap_hwmod_mux_info *hmux)
return ret;
}
+/**
+ * omap_hwmod_mux_handle_irq - Process wakeup events for a single hwmod
+ *
+ * Checks a single hwmod for every wakeup capable pad to see if there is an
+ * active wakeup event. If this is the case, call the corresponding ISR.
+ */
+static int _omap_hwmod_mux_handle_irq(struct omap_hwmod *oh, void *data)
+{
+ if (!oh-mux || !oh-mux-enabled)
+ return 0;
+ if (omap_hwmod_mux_get_wake_status(oh-mux))
+ generic_handle_irq(oh-mpu_irqs[0].irq);
+ return 0;
+}
+
+/**
+ * omap_hwmod_mux_handle_irq - Process pad wakeup irqs.
+ *
+ * Calls a function for each registered omap_hwmod to check
+ * pad wakeup statuses.
+ */
+static irqreturn_t omap_hwmod_mux_handle_irq(int irq, void *unused)
+{
+ omap_hwmod_for_each(_omap_hwmod_mux_handle_irq, NULL);
+ return IRQ_HANDLED;
+}
+
/* Assumes the calling function takes care of locking */
void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state)
{
@@ -745,6 +775,7 @@ static void __init omap_mux_free_names(struct omap_mux *m)
static int __init omap_mux_late_init(void)
{
struct omap_mux_partition *partition;
+ int ret;
list_for_each_entry(partition, mux_partitions, node) {
struct omap_mux_entry *e, *tmp;
@@ -765,6 +796,12 @@ static int __init omap_mux_late_init(void)
}
}
+ ret = request_irq(omap_prcm_event_to_irq(io),
+ omap_hwmod_mux_handle_irq, 0, hwmod_io, NULL);
+
+ if (ret)
+ printk(KERN_WARNING Failed to setup hwmod io irq %d\n, ret);
+
omap_mux_dbg_init();
return 0;
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index 8b2150a..8014de0 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -232,6 +232,7 @@ void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8
state);
* Called only from omap_hwmod.c, do not use.
*/
bool omap_hwmod_mux_get_wake_status(struct omap_hwmod_mux_info *hmux);
+
#else
static inline bool
@@ -259,6 +260,10 @@ static inline void omap_hwmod_mux(struct
omap_hwmod_mux_info *hmux, u8 state)
{
}
+static inline void omap_hwmod_mux_handle_irq(void)
+{
+}
+
static struct omap_board_mux *board_mux __initdata __maybe_unused;
#endif
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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[PATCHv7 6/9] TEMP: power: omap-prm: added omap3 static init
This is a temporary hack until PRM hwmod data is available.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
drivers/power/omap_prm.c | 10 ++
1 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/power/omap_prm.c b/drivers/power/omap_prm.c
index ce0a872..7d59d92 100644
--- a/drivers/power/omap_prm.c
+++ b/drivers/power/omap_prm.c
@@ -264,14 +264,16 @@ static int __devexit omap_prm_complete(struct
platform_device *pdev)
static int __init omap_prm_probe(struct platform_device *pdev)
{
- /* XXX: prm_dev.irq_setup should be populated here */
+ prm_dev.irq_setup.ack = 0xb200 + 0x48306818;
+ prm_dev.irq_setup.mask = 0xb200 + 0x4830681c;
+ prm_dev.irq_setup.irq = INT_34XX_PRCM_MPU_IRQ;
+ prm_dev.irq_setup.nr_regs = 1;
+ prm_dev.irq_setup.nr_irqs = 32;
- /* XXX: following calls should be enabled once irq_setup is done */
-#if 0
omap_prcm_irq_init();
prm_dev.irq_setup.io_irq = omap_prcm_event_to_irq(io);
-#endif
+
return 0;
}
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
--
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[PATCHv7 8/9] omap3: pm: split prcm and wakeup event handling
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/mux.c|3 +-
arch/arm/mach-omap2/pm34xx.c | 104 +++---
2 files changed, 39 insertions(+), 68 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index b6ec5de..6fd9675 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -797,7 +797,8 @@ static int __init omap_mux_late_init(void)
}
ret = request_irq(omap_prcm_event_to_irq(io),
- omap_hwmod_mux_handle_irq, 0, hwmod_io, NULL);
+ omap_hwmod_mux_handle_irq, IRQF_SHARED, hwmod_io,
+ omap_mux_late_init);
if (ret)
printk(KERN_WARNING Failed to setup hwmod io irq %d\n, ret);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 7255d9b..2789e0a 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -29,6 +29,7 @@
#include linux/delay.h
#include linux/slab.h
#include linux/console.h
+#include linux/power/omap_prm.h
#include trace/events/power.h
#include asm/suspend.h
@@ -198,7 +199,7 @@ static void omap3_save_secure_ram_context(void)
* that any peripheral wake-up events occurring while attempting to
* clear the PM_WKST_x are detected and cleared.
*/
-static int prcm_clear_mod_irqs(s16 module, u8 regs)
+static int prcm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits)
{
u32 wkst, fclk, iclk, clken;
u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1;
@@ -210,6 +211,7 @@ static int prcm_clear_mod_irqs(s16 module, u8 regs)
wkst = omap2_prm_read_mod_reg(module, wkst_off);
wkst = omap2_prm_read_mod_reg(module, grpsel_off);
+ wkst = ~ignore_bits;
if (wkst) {
iclk = omap2_cm_read_mod_reg(module, iclk_off);
fclk = omap2_cm_read_mod_reg(module, fclk_off);
@@ -225,6 +227,7 @@ static int prcm_clear_mod_irqs(s16 module, u8 regs)
omap2_cm_set_mod_reg_bits(clken, module, fclk_off);
omap2_prm_write_mod_reg(wkst, module, wkst_off);
wkst = omap2_prm_read_mod_reg(module, wkst_off);
+ wkst = ~ignore_bits;
c++;
}
omap2_cm_write_mod_reg(iclk, module, iclk_off);
@@ -234,76 +237,35 @@ static int prcm_clear_mod_irqs(s16 module, u8 regs)
return c;
}
-static int _prcm_int_handle_wakeup(void)
+static irqreturn_t _prcm_int_handle_io(int irq, void *unused)
{
int c;
- c = prcm_clear_mod_irqs(WKUP_MOD, 1);
- c += prcm_clear_mod_irqs(CORE_MOD, 1);
- c += prcm_clear_mod_irqs(OMAP3430_PER_MOD, 1);
- if (omap_rev() OMAP3430_REV_ES1_0) {
- c += prcm_clear_mod_irqs(CORE_MOD, 3);
- c += prcm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1);
- }
+ c = prcm_clear_mod_irqs(WKUP_MOD, 1,
+ ~(OMAP3430_ST_IO_MASK | OMAP3430_ST_IO_CHAIN_MASK));
- return c;
+ return c ? IRQ_HANDLED : IRQ_NONE;
}
-/*
- * PRCM Interrupt Handler
- *
- * The PRM_IRQSTATUS_MPU register indicates if there are any pending
- * interrupts from the PRCM for the MPU. These bits must be cleared in
- * order to clear the PRCM interrupt. The PRCM interrupt handler is
- * implemented to simply clear the PRM_IRQSTATUS_MPU in order to clear
- * the PRCM interrupt. Please note that bit 0 of the PRM_IRQSTATUS_MPU
- * register indicates that a wake-up event is pending for the MPU and
- * this bit can only be cleared if the all the wake-up events latched
- * in the various PM_WKST_x registers have been cleared. The interrupt
- * handler is implemented using a do-while loop so that if a wake-up
- * event occurred during the processing of the prcm interrupt handler
- * (setting a bit in the corresponding PM_WKST_x register and thus
- * preventing us from clearing bit 0 of the PRM_IRQSTATUS_MPU register)
- * this would be handled.
- */
-static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id)
+static irqreturn_t _prcm_int_handle_wakeup(int irq, void *unused)
{
- u32 irqenable_mpu, irqstatus_mpu;
- int c = 0;
-
- irqenable_mpu = omap2_prm_read_mod_reg(OCP_MOD,
-OMAP3_PRM_IRQENABLE_MPU_OFFSET);
- irqstatus_mpu = omap2_prm_read_mod_reg(OCP_MOD,
-OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
- irqstatus_mpu = irqenable_mpu;
-
- do {
- if (irqstatus_mpu (OMAP3430_WKUP_ST_MASK |
-OMAP3430_IO_ST_MASK)) {
- c = _prcm_int_handle_wakeup();
-
- /*
-* Is the MPU PRCM interrupt handler racing with the
-* IVA2 PRCM interrupt handler ?
-*/
- WARN(c == 0, prcm: WARNING: PRCM indicated MPU wakeup
-
[PATCHv7 9/9] TEMP: serial: added mux support
Just for PRCM chain handler testing purposes. This should be replaced with
a proper implementation.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/serial.c | 71 -
1 files changed, 69 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 3d1c1d3..432b308 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -862,17 +862,84 @@ void __init omap_serial_init_port(struct omap_board_data
*bdata)
* can call this function when they want to have default behaviour
* for serial ports (e.g initialize them all as serial ports).
*/
+
+struct serial_mux_conf {
+ char *name;
+ int omap3_mux;
+ int omap4_mux;
+};
+
+#define OMAP3_SERIAL_MUX_IN_PU (OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0)
+#define OMAP3_SERIAL_MUX_IN_PD (OMAP_PIN_INPUT_PULLDOWN | OMAP_MUX_MODE0)
+#define OMAP3_SERIAL_MUX_IN (OMAP_PIN_INPUT | OMAP_MUX_MODE0)
+#define OMAP3_SERIAL_MUX_OUT (OMAP_PIN_OUTPUT | OMAP_MUX_MODE0)
+#define OMAP4_SERIAL_MUX_IN_PU (OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0)
+#define OMAP4_SERIAL_MUX_OUT (OMAP_PIN_OUTPUT | OMAP_MUX_MODE0)
+#define OMAP4_SERIAL_MUX_IN (OMAP_PIN_INPUT | OMAP_MUX_MODE0)
+#define SERIAL_DISABLED OMAP_MUX_MODE7
+
+#define OMAP_SERIAL_NUM_PADS_PER_PORT 4
+
+static const struct serial_mux_conf serial_mux_data[] = {
+ { uart1_cts.uart1_cts, OMAP3_SERIAL_MUX_IN, SERIAL_DISABLED, },
+ { uart1_rts.uart1_rts, OMAP3_SERIAL_MUX_OUT, SERIAL_DISABLED, },
+ { uart1_rx.uart1_rx, OMAP3_SERIAL_MUX_IN, SERIAL_DISABLED, },
+ { uart1_tx.uart1_tx, OMAP3_SERIAL_MUX_OUT, SERIAL_DISABLED, },
+ { uart2_cts.uart2_cts, OMAP3_SERIAL_MUX_IN,
+ OMAP4_SERIAL_MUX_IN_PU, },
+ { uart2_rts.uart2_rts, OMAP3_SERIAL_MUX_OUT, OMAP4_SERIAL_MUX_OUT, },
+ { uart2_rx.uart2_rx, OMAP3_SERIAL_MUX_IN, OMAP4_SERIAL_MUX_IN_PU, },
+ { uart2_tx.uart2_tx, OMAP3_SERIAL_MUX_OUT, OMAP4_SERIAL_MUX_OUT },
+ { uart3_cts_rctx.uart3_cts_rctx, OMAP3_SERIAL_MUX_IN_PD,
+ OMAP4_SERIAL_MUX_IN_PU, },
+ { uart3_rts_sd.uart3_rts_sd, OMAP3_SERIAL_MUX_OUT,
+ OMAP4_SERIAL_MUX_OUT, },
+ { uart3_rx_irrx.uart3_rx_irrx, OMAP3_SERIAL_MUX_IN,
+ OMAP4_SERIAL_MUX_IN, },
+ { uart3_tx_irtx.uart3_tx_irtx, OMAP3_SERIAL_MUX_OUT,
+ OMAP4_SERIAL_MUX_OUT, },
+ { uart4_rx.uart4_rx, SERIAL_DISABLED, OMAP4_SERIAL_MUX_IN, },
+ { uart4_tx.uart4_tx, SERIAL_DISABLED, OMAP4_SERIAL_MUX_OUT, },
+ { NULL, 0, 0, },
+ { NULL, 0, 0, },
+};
+
void __init omap_serial_init(void)
{
struct omap_uart_state *uart;
struct omap_board_data bdata;
+ struct omap_device_pad *pads;
+ int idx;
+ int i;
+ pads = kmalloc(sizeof(struct omap_device_pad) * 4, GFP_KERNEL);
list_for_each_entry(uart, uart_list, node) {
bdata.id = uart-num;
bdata.flags = 0;
- bdata.pads = NULL;
bdata.pads_cnt = 0;
+ bdata.pads = pads;
+
+ for (i = 0; i OMAP_SERIAL_NUM_PADS_PER_PORT; i++) {
+ idx = bdata.id * OMAP_SERIAL_NUM_PADS_PER_PORT + i;
+ pads[i].name = serial_mux_data[idx].name;
+ pads[i].enable = 0;
+ pads[i].idle = 0;
+ pads[i].flags = 0;
+ if (cpu_is_omap34xx())
+ pads[i].enable = serial_mux_data[idx].omap3_mux;
+ if (cpu_is_omap44xx())
+ pads[i].enable = serial_mux_data[idx].omap4_mux;
+ if (pads[i].enable != SERIAL_DISABLED)
+ bdata.pads_cnt++;
+ if (pads[i].enable OMAP_PIN_INPUT) {
+ pads[i].flags = OMAP_DEVICE_PAD_REMUX |
+ OMAP_DEVICE_PAD_WAKEUP;
+ }
+ pads[i].idle = pads[i].enable;
+ }
+ if (bdata.pads_cnt == 0)
+ bdata.pads = NULL;
omap_serial_init_port(bdata);
-
}
+ kfree(pads);
}
--
1.7.4.1
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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Re: [PATCH v2] ASoC: omap: convert per-board modules to platform drivers
On Thu, Sep 08, 2011 at 03:29:11PM -0700, Mark Brown wrote: On Thu, 2011-09-08 at 22:28 +0200, Arnd Bergmann wrote: On Thursday 08 September 2011 20:05:48 Mans Rullgard wrote: I had the same thought, but I couldn't find a suitable string anywhere. Are you suggesting an if(machine_is_foo()) cascade in omap_init_audio()? I'll be the first to agree this patch is not particularly pretty. My general feeling is that practically every time someone writes machine_is_*(), they are doing it wrong. There are of course exceptions, but I would strongly recommend to have the initialization calling up from the board file into more general functions instead of having all boards calling the same function which then goes to board specific code again. I have to agree, that seems tasteless. I'd expect something like triggering registration of devices based off walking down a table of machine IDs or something. One other issue to consider here is that we don't want to discourage people from sharing machine drivers while we can so it can't be completely automatic, it This problem has been solved (before DT) for _ages_ through the use of platform devices in the platform support files, registered by the .init_machine callback. Where it went wrong is when ASOC and PCMCIA became rather complicated that you could no longer just pass a platform data structure, but instead needed some complex platform specific code - which started the demand to have mini platform specific chunks of code in drivers/pcmcia/ and sound/. With DT of course, all devices get instantiated from the device tree, so there should not be any more platform specific chunks of code in these locations (ha, it couldn't be solved with platform data so I suspect it will continue to persist, forever unsolved.) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v15 09/12] OMAP: dmtimer: mark clocksource and clockevent timers reserved
In driver probe use sys_timer_reserved to identify which all timers
have already been used for clocksource and clockevent. Mark all those
timers as reserved so that no one else can use them.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/plat-omap/dmtimer.c | 17 +++--
1 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 39751f9..6312dfb 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -531,12 +531,17 @@ static int __devinit omap_dm_timer_probe(struct
platform_device *pdev)
timer-irq = irq-start;
timer-pdev = pdev;
- /* Skip pm_runtime_enable for OMAP1 */
- if (!pdata-needs_manual_reset) {
- pm_runtime_enable(pdev-dev);
- pm_runtime_irq_safe(pdev-dev);
- }
-
+/*
+ * sys_timer_reserved is not defined for OMAP1.
+ * Use the macro to avoid compilation error on OMAP1.
+ */
+#if defined(CONFIG_ARCH_OMAP2PLUS)
+ pm_runtime_enable(pdev-dev);
+ pm_runtime_irq_safe(pdev-dev);
+ /* Mark clocksource and clockevent timers as reserved */
+ if ((sys_timer_reserved (pdev-id - 1)) 0x1)
+ timer-reserved = 1;
+#endif
/* add the timer element to the list */
spin_lock_irqsave(dm_timer_lock, flags);
list_add_tail(timer-node, omap_timer_list);
--
1.7.0.4
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[PATCH v15 05/12] OMAP: dmtimer: platform driver
Add dmtimer platform driver functions which include:
(1) platform driver initialization
(2) driver probe function
(3) driver remove function
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Thara Gopinath th...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
---
arch/arm/plat-omap/dmtimer.c | 143 +++-
arch/arm/plat-omap/include/plat/dmtimer.h | 11 ++
2 files changed, 148 insertions(+), 6 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index c11073d..7cee4fb 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -35,14 +35,9 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include linux/init.h
-#include linux/spinlock.h
-#include linux/errno.h
-#include linux/list.h
-#include linux/clk.h
-#include linux/delay.h
#include linux/io.h
#include linux/module.h
+#include linux/slab.h
#include mach/hardware.h
#include plat/dmtimer.h
#include mach/irqs.h
@@ -149,6 +144,7 @@ static const char **dm_source_names;
static struct clk **dm_source_clocks;
static spinlock_t dm_timer_lock;
+static LIST_HEAD(omap_timer_list);
/*
* Reads timer registers in posted and non-posted mode. The posted mode bit
@@ -544,6 +540,141 @@ int omap_dm_timers_active(void)
}
EXPORT_SYMBOL_GPL(omap_dm_timers_active);
+/**
+ * omap_dm_timer_probe - probe function called for every registered device
+ * @pdev: pointer to current timer platform device
+ *
+ * Called by driver framework at the end of device registration for all
+ * timer devices.
+ */
+static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
+{
+ int ret;
+ unsigned long flags;
+ struct omap_dm_timer *timer;
+ struct resource *mem, *irq, *ioarea;
+ struct dmtimer_platform_data *pdata = pdev-dev.platform_data;
+
+ if (!pdata) {
+ dev_err(pdev-dev, %s: no platform data.\n, __func__);
+ return -ENODEV;
+ }
+
+ irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ if (unlikely(!irq)) {
+ dev_err(pdev-dev, %s: no IRQ resource.\n, __func__);
+ return -ENODEV;
+ }
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (unlikely(!mem)) {
+ dev_err(pdev-dev, %s: no memory resource.\n, __func__);
+ return -ENODEV;
+ }
+
+ ioarea = request_mem_region(mem-start, resource_size(mem),
+ pdev-name);
+ if (!ioarea) {
+ dev_err(pdev-dev, %s: region already claimed.\n, __func__);
+ return -EBUSY;
+ }
+
+ timer = kzalloc(sizeof(struct omap_dm_timer), GFP_KERNEL);
+ if (!timer) {
+ dev_err(pdev-dev, %s: no memory for omap_dm_timer.\n,
+ __func__);
+ ret = -ENOMEM;
+ goto err_free_ioregion;
+ }
+
+ timer-io_base = ioremap(mem-start, resource_size(mem));
+ if (!timer-io_base) {
+ dev_err(pdev-dev, %s: ioremap failed.\n, __func__);
+ ret = -ENOMEM;
+ goto err_free_mem;
+ }
+
+ if (pdata-timer_ip_type == OMAP_TIMER_IP_VERSION_2) {
+ timer-func_offset = VERSION2_TIMER_WAKEUP_EN_REG_OFFSET;
+ timer-intr_offset = VERSION2_TIMER_STAT_REG_OFFSET;
+ }
+
+ timer-id = pdev-id;
+ timer-irq = irq-start;
+ timer-pdev = pdev;
+
+ /* add the timer element to the list */
+ spin_lock_irqsave(dm_timer_lock, flags);
+ list_add_tail(timer-node, omap_timer_list);
+ spin_unlock_irqrestore(dm_timer_lock, flags);
+
+ dev_dbg(pdev-dev, Device Probed.\n);
+
+ return 0;
+
+err_free_mem:
+ kfree(timer);
+
+err_free_ioregion:
+ release_mem_region(mem-start, resource_size(mem));
+
+ return ret;
+}
+
+/**
+ * omap_dm_timer_remove - cleanup a registered timer device
+ * @pdev: pointer to current timer platform device
+ *
+ * Called by driver framework whenever a timer device is unregistered.
+ * In addition to freeing platform resources it also deletes the timer
+ * entry from the local list.
+ */
+static int __devexit omap_dm_timer_remove(struct platform_device *pdev)
+{
+ struct omap_dm_timer *timer;
+ unsigned long flags;
+ int ret = -EINVAL;
+
+ spin_lock_irqsave(dm_timer_lock, flags);
+ list_for_each_entry(timer, omap_timer_list, node)
+ if (timer-pdev-id == pdev-id) {
+ list_del(timer-node);
+ kfree(timer);
+ ret = 0;
+ break;
+ }
+ spin_unlock_irqrestore(dm_timer_lock, flags);
+
+ return ret;
+}
+
+static struct platform_driver omap_dm_timer_driver = {
+ .probe = omap_dm_timer_probe,
+ .remove = omap_dm_timer_remove,
+ .driver = {
+
[PATCH v15 07/12] OMAP: dmtimer: pm_runtime support
Add pm_runtime feature to dmtimer whereby *_runtime_get_sync()
is called within omap_dm_timer_enable(), pm_runtime_put()
is called in omap_dm_timer_disable(). In addition to calling
pm_runtime_enable, we are calling pm_runtime_irq_safe so that
they can be called from interrupt context.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Partha Basak p-bas...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
---
arch/arm/plat-omap/dmtimer.c | 33
arch/arm/plat-omap/include/plat/dmtimer.h |1 -
2 files changed, 10 insertions(+), 24 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 854e735..39751f9 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -38,6 +38,7 @@
#include linux/io.h
#include linux/slab.h
#include linux/err.h
+#include linux/pm_runtime.h
#include plat/dmtimer.h
@@ -209,33 +210,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_free);
void omap_dm_timer_enable(struct omap_dm_timer *timer)
{
- struct dmtimer_platform_data *pdata = timer-pdev-dev.platform_data;
-
- if (timer-enabled)
- return;
-
- if (!pdata-needs_manual_reset) {
- clk_enable(timer-fclk);
- clk_enable(timer-iclk);
- }
-
- timer-enabled = 1;
+ pm_runtime_get_sync(timer-pdev-dev);
}
EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
void omap_dm_timer_disable(struct omap_dm_timer *timer)
{
- struct dmtimer_platform_data *pdata = timer-pdev-dev.platform_data;
-
- if (!timer-enabled)
- return;
-
- if (!pdata-needs_manual_reset) {
- clk_disable(timer-iclk);
- clk_disable(timer-fclk);
- }
-
- timer-enabled = 0;
+ pm_runtime_put(timer-pdev-dev);
}
EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
@@ -475,7 +456,7 @@ int omap_dm_timers_active(void)
struct omap_dm_timer *timer;
list_for_each_entry(timer, omap_timer_list, node) {
- if (!timer-enabled)
+ if (!timer-reserved)
continue;
if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG)
@@ -550,6 +531,12 @@ static int __devinit omap_dm_timer_probe(struct
platform_device *pdev)
timer-irq = irq-start;
timer-pdev = pdev;
+ /* Skip pm_runtime_enable for OMAP1 */
+ if (!pdata-needs_manual_reset) {
+ pm_runtime_enable(pdev-dev);
+ pm_runtime_irq_safe(pdev-dev);
+ }
+
/* add the timer element to the list */
spin_lock_irqsave(dm_timer_lock, flags);
list_add_tail(timer-node, omap_timer_list);
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h
b/arch/arm/plat-omap/include/plat/dmtimer.h
index fc086ce..5368140 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -239,7 +239,6 @@ struct omap_dm_timer {
void __iomem *io_base;
unsigned long rate;
unsigned reserved:1;
- unsigned enabled:1;
unsigned posted:1;
u8 func_offset;
u8 intr_offset;
--
1.7.0.4
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[PATCH v15 08/12] OMAP: dmtimer: add timeout to low-level routines
The low-level read and write access routines wait on write-pending register
in posted mode to make sure that previous write is complete on respective
registers. This waiting is done in an infinite while loop. Now it is being
modified to use timeout instead.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Varadarajan, Charulatha ch...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
---
arch/arm/plat-omap/include/plat/dmtimer.h | 35
1 files changed, 25 insertions(+), 10 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h
b/arch/arm/plat-omap/include/plat/dmtimer.h
index 5368140..41723f4 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -37,6 +37,8 @@
#include linux/io.h
#include linux/platform_device.h
+#include plat/common.h
+
#ifndef __ASM_ARCH_DMTIMER_H
#define __ASM_ARCH_DMTIMER_H
@@ -231,6 +233,9 @@ int omap_dm_timers_active(void);
#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG \
(_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR WPSHIFT))
+/* 10ms timeout delay */
+#define MAX_WRITE_PEND_WAIT1
+
struct omap_dm_timer {
unsigned long phys_base;
int id;
@@ -252,11 +257,16 @@ int omap_dm_timer_prepare(struct omap_dm_timer *timer);
static inline u32 __omap_dm_timer_read(void __iomem *base, u32 reg,
int posted, u8 func_offset)
{
- if (posted)
- while (__raw_readl(base +
- ((OMAP_TIMER_WRITE_PEND_REG + func_offset) 0xff))
-(reg WPSHIFT))
- cpu_relax();
+ int i = 0;
+
+ if (posted) {
+ omap_test_timeout(!(__raw_readl(base +
+ ((OMAP_TIMER_WRITE_PEND_REG + func_offset) 0xff))
+ (reg WPSHIFT)), MAX_WRITE_PEND_WAIT, i);
+
+ if (WARN_ON_ONCE(i == MAX_WRITE_PEND_WAIT))
+ pr_err(read timeout.\n);
+ }
return __raw_readl(base + (reg 0xff));
}
@@ -264,11 +274,16 @@ static inline u32 __omap_dm_timer_read(void __iomem
*base, u32 reg,
static inline void __omap_dm_timer_write(void __iomem *base, u32 reg, u32 val,
int posted, u8 func_offset)
{
- if (posted)
- while (__raw_readl(base +
- ((OMAP_TIMER_WRITE_PEND_REG + func_offset) 0xff))
-(reg WPSHIFT))
- cpu_relax();
+ int i = 0;
+
+ if (posted) {
+ omap_test_timeout(!(__raw_readl(base +
+ ((OMAP_TIMER_WRITE_PEND_REG + func_offset) 0xff))
+ (reg WPSHIFT)), MAX_WRITE_PEND_WAIT, i);
+
+ if (WARN_ON(i == MAX_WRITE_PEND_WAIT))
+ pr_err(write timeout.\n);
+ }
__raw_writel(val, base + (reg 0xff));
}
--
1.7.0.4
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[PATCH v15 01/12] OMAP2+: dmtimer: add device names to flck nodes
Add device name to OMAP2 dmtimer fclk nodes so that the fclk nodes can be
retrieved by doing a clk_get with the corresponding device pointers or
device names.
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Thara Gopinath th...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
---
arch/arm/mach-omap2/clock2420_data.c | 48 ++
arch/arm/mach-omap2/clock2430_data.c | 48 ++
arch/arm/mach-omap2/clock3xxx_data.c | 36 +
arch/arm/mach-omap2/clock44xx_data.c | 33 +++
4 files changed, 165 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock2420_data.c
b/arch/arm/mach-omap2/clock2420_data.c
index debc040..14a6277 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1898,6 +1898,54 @@ static struct omap_clk omap2420_clks[] = {
CLK(NULL, pka_ick, pka_ick, CK_242X),
CLK(NULL, usb_fck, usb_fck, CK_242X),
CLK(musb-hdrc,fck, osc_ck,CK_242X),
+ CLK(omap_timer.1, fck, gpt1_fck, CK_242X),
+ CLK(omap_timer.2, fck, gpt2_fck, CK_242X),
+ CLK(omap_timer.3, fck, gpt3_fck, CK_242X),
+ CLK(omap_timer.4, fck, gpt4_fck, CK_242X),
+ CLK(omap_timer.5, fck, gpt5_fck, CK_242X),
+ CLK(omap_timer.6, fck, gpt6_fck, CK_242X),
+ CLK(omap_timer.7, fck, gpt7_fck, CK_242X),
+ CLK(omap_timer.8, fck, gpt8_fck, CK_242X),
+ CLK(omap_timer.9, fck, gpt9_fck, CK_242X),
+ CLK(omap_timer.10,fck, gpt10_fck, CK_242X),
+ CLK(omap_timer.11,fck, gpt11_fck, CK_242X),
+ CLK(omap_timer.12,fck, gpt12_fck, CK_242X),
+ CLK(omap_timer.1, 32k_ck, func_32k_ck, CK_243X),
+ CLK(omap_timer.2, 32k_ck, func_32k_ck, CK_243X),
+ CLK(omap_timer.3, 32k_ck, func_32k_ck, CK_243X),
+ CLK(omap_timer.4, 32k_ck, func_32k_ck, CK_243X),
+ CLK(omap_timer.5, 32k_ck, func_32k_ck, CK_243X),
+ CLK(omap_timer.6, 32k_ck, func_32k_ck, CK_243X),
+ CLK(omap_timer.7, 32k_ck, func_32k_ck, CK_243X),
+ CLK(omap_timer.8, 32k_ck, func_32k_ck, CK_243X),
+ CLK(omap_timer.9, 32k_ck, func_32k_ck, CK_243X),
+ CLK(omap_timer.10,32k_ck, func_32k_ck, CK_243X),
+ CLK(omap_timer.11,32k_ck, func_32k_ck, CK_243X),
+ CLK(omap_timer.12,32k_ck, func_32k_ck, CK_243X),
+ CLK(omap_timer.1, sys_ck, sys_ck,CK_243X),
+ CLK(omap_timer.2, sys_ck, sys_ck,CK_243X),
+ CLK(omap_timer.3, sys_ck, sys_ck,CK_243X),
+ CLK(omap_timer.4, sys_ck, sys_ck,CK_243X),
+ CLK(omap_timer.5, sys_ck, sys_ck,CK_243X),
+ CLK(omap_timer.6, sys_ck, sys_ck,CK_243X),
+ CLK(omap_timer.7, sys_ck, sys_ck,CK_243X),
+ CLK(omap_timer.8, sys_ck, sys_ck,CK_243X),
+ CLK(omap_timer.9, sys_ck, sys_ck,CK_243X),
+ CLK(omap_timer.10,sys_ck, sys_ck,CK_243X),
+ CLK(omap_timer.11,sys_ck, sys_ck,CK_243X),
+ CLK(omap_timer.12,sys_ck, sys_ck,CK_243X),
+ CLK(omap_timer.1, alt_ck, alt_ck,CK_243X),
+ CLK(omap_timer.2, alt_ck, alt_ck,CK_243X),
+ CLK(omap_timer.3, alt_ck, alt_ck,CK_243X),
+ CLK(omap_timer.4, alt_ck, alt_ck,CK_243X),
+ CLK(omap_timer.5, alt_ck, alt_ck,CK_243X),
+ CLK(omap_timer.6, alt_ck, alt_ck,CK_243X),
+ CLK(omap_timer.7, alt_ck, alt_ck,CK_243X),
+ CLK(omap_timer.8, alt_ck, alt_ck,CK_243X),
+ CLK(omap_timer.9, alt_ck, alt_ck,CK_243X),
+ CLK(omap_timer.10,alt_ck, alt_ck,CK_243X),
+ CLK(omap_timer.11,alt_ck, alt_ck,CK_243X),
+ CLK(omap_timer.12,alt_ck, alt_ck,CK_243X),
};
/*
diff --git a/arch/arm/mach-omap2/clock2430_data.c
b/arch/arm/mach-omap2/clock2430_data.c
index 96a942e..ea6717c 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -1998,6 +1998,54 @@ static struct omap_clk omap2430_clks[] = {
CLK(NULL, mdm_intc_ick, mdm_intc_ick, CK_243X),
CLK(omap_hsmmc.0, mmchsdb_fck, mmchsdb1_fck, CK_243X),
CLK(omap_hsmmc.1, mmchsdb_fck, mmchsdb2_fck, CK_243X),
+ CLK(omap_timer.1, fck, gpt1_fck, CK_243X),
+ CLK(omap_timer.2, fck, gpt2_fck, CK_243X),
+
[PATCH v15 03/12] OMAP1: dmtimer: conversion to platform devices
Convert OMAP1 dmtimers into a platform devices and then registers with
device model framework so that it can be bound to corresponding driver.
Signed-off-by: Thara Gopinath th...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
---
arch/arm/mach-omap1/Makefile |2 +-
arch/arm/mach-omap1/timer.c | 174 +
arch/arm/plat-omap/dmtimer.c | 56 ++---
arch/arm/plat-omap/include/plat/dmtimer.h |8 ++
4 files changed, 195 insertions(+), 45 deletions(-)
create mode 100644 arch/arm/mach-omap1/timer.c
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index 5b114d1..11c85cd 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -4,7 +4,7 @@
# Common support
obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
-obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o
+obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o
obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c
new file mode 100644
index 000..9dbdf20
--- /dev/null
+++ b/arch/arm/mach-omap1/timer.c
@@ -0,0 +1,174 @@
+/**
+ * OMAP1 Dual-Mode Timers - platform device registration
+ *
+ * Contains first level initialization routines which internally
+ * generates timer device information and registers with linux
+ * device model. It also has low level function to chnage the timer
+ * input clock source.
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ * Tarun Kanti DebBarma tarun.ka...@ti.com
+ * Thara Gopinath th...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/clk.h
+#include linux/io.h
+#include linux/err.h
+#include linux/slab.h
+#include linux/platform_device.h
+
+#include mach/irqs.h
+
+#include plat/dmtimer.h
+
+#define OMAP1610_GPTIMER1_BASE 0xfffb1400
+#define OMAP1610_GPTIMER2_BASE 0xfffb1c00
+#define OMAP1610_GPTIMER3_BASE 0xfffb2400
+#define OMAP1610_GPTIMER4_BASE 0xfffb2c00
+#define OMAP1610_GPTIMER5_BASE 0xfffb3400
+#define OMAP1610_GPTIMER6_BASE 0xfffb3c00
+#define OMAP1610_GPTIMER7_BASE 0xfffb7400
+#define OMAP1610_GPTIMER8_BASE 0xfffbd400
+
+#define OMAP1_DM_TIMER_COUNT 8
+
+static int omap1_dm_timer_set_src(struct platform_device *pdev,
+ int source)
+{
+ int n = (pdev-id - 1) 1;
+ u32 l;
+
+ l = __raw_readl(MOD_CONF_CTRL_1) ~(0x03 n);
+ l |= source n;
+ __raw_writel(l, MOD_CONF_CTRL_1);
+
+ return 0;
+}
+
+
+int __init omap1_dm_timer_init(void)
+{
+ int i;
+ int ret;
+ struct dmtimer_platform_data *pdata;
+ struct platform_device *pdev;
+
+ if (!cpu_is_omap16xx())
+ return 0;
+
+ for (i = 1; i = OMAP1_DM_TIMER_COUNT; i++) {
+ struct resource res[2];
+ u32 base, irq;
+
+ switch (i) {
+ case 1:
+ base = OMAP1610_GPTIMER1_BASE;
+ irq = INT_1610_GPTIMER1;
+ break;
+ case 2:
+ base = OMAP1610_GPTIMER2_BASE;
+ irq = INT_1610_GPTIMER2;
+ break;
+ case 3:
+ base = OMAP1610_GPTIMER3_BASE;
+ irq = INT_1610_GPTIMER3;
+ break;
+ case 4:
+ base = OMAP1610_GPTIMER4_BASE;
+ irq = INT_1610_GPTIMER4;
+ break;
+ case 5:
+ base = OMAP1610_GPTIMER5_BASE;
+ irq = INT_1610_GPTIMER5;
+ break;
+ case 6:
+ base = OMAP1610_GPTIMER6_BASE;
+ irq = INT_1610_GPTIMER6;
+ break;
+ case 7:
+ base = OMAP1610_GPTIMER7_BASE;
+ irq = INT_1610_GPTIMER7;
+ break;
+ case 8:
+ base = OMAP1610_GPTIMER8_BASE;
+ irq = INT_1610_GPTIMER8;
+ break;
+ default:
+ /*
+* not supposed to reach here.
+* this is to remove warning.
+
[PATCH v15 10/12] OMAP: dmtimer: low-power mode support
Clock is enabled only when timer is started and disabled when the the timer
is stopped. Therefore before accessing registers in functions clock is enabled
and then disabled back at the end of access. Context save is done dynamically
whenever the registers are modified. Context restore is called when context is
lost.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/timer.c | 10 ++-
arch/arm/plat-omap/dmtimer.c | 128 +++-
arch/arm/plat-omap/include/plat/dmtimer.h | 31 +++
3 files changed, 163 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 4758d3e..984a677 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -44,6 +44,9 @@
#include plat/common.h
#include plat/omap_hwmod.h
#include plat/omap_device.h
+#include plat/omap-pm.h
+
+#include powerdomain.h
/* Parent clocks, eventually these will come from the clock framework */
@@ -444,6 +447,7 @@ static int __init omap_timer_init(struct omap_hwmod *oh,
void *unused)
struct dmtimer_platform_data *pdata;
struct omap_device *od;
struct omap_timer_capability_dev_attr *timer_dev_attr;
+ struct powerdomain *pwrdm;
pr_debug(%s: %s\n, __func__, oh-name);
@@ -473,7 +477,11 @@ static int __init omap_timer_init(struct omap_hwmod *oh,
void *unused)
pdata-set_timer_src = omap2_dm_timer_set_src;
pdata-timer_ip_type = oh-class-rev;
-
+ pwrdm = omap_hwmod_get_pwrdm(oh);
+ pdata-loses_context = pwrdm_can_ever_lose_context(pwrdm);
+#ifdef CONFIG_PM
+ pdata-get_context_loss_count = omap_pm_get_dev_context_loss_count;
+#endif
od = omap_device_build(name, id, oh, pdata, sizeof(*pdata),
omap2_dmtimer_latency,
ARRAY_SIZE(omap2_dmtimer_latency),
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 6312dfb..15fe01a 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -87,6 +87,30 @@ static void omap_dm_timer_write_reg(struct omap_dm_timer
*timer, u32 reg,
timer-func_offset);
}
+static void omap_timer_restore_context(struct omap_dm_timer *timer)
+{
+ omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG,
+ timer-context.tiocp_cfg);
+ omap_dm_timer_write_reg(timer, OMAP_TIMER_SYS_STAT_REG,
+ timer-context.tistat);
+ omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG,
+ timer-context.tisr);
+ omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG,
+ timer-context.twer);
+ omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG,
+ timer-context.tcrr);
+ omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG,
+ timer-context.tldr);
+ omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG,
+ timer-context.tmar);
+ omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG,
+ timer-context.tsicr);
+ omap_dm_timer_write_reg(timer, OMAP_TIMER_INT_EN_REG,
+ timer-context.tier);
+ omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG,
+ timer-context.tclr);
+}
+
static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
{
int c;
@@ -103,12 +127,14 @@ static void omap_dm_timer_wait_for_reset(struct
omap_dm_timer *timer)
static void omap_dm_timer_reset(struct omap_dm_timer *timer)
{
+ omap_dm_timer_enable(timer);
if (timer-pdev-id != 1) {
omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
omap_dm_timer_wait_for_reset(timer);
}
__omap_dm_timer_reset(timer-io_base, 0, 0, timer-func_offset);
+ omap_dm_timer_disable(timer);
timer-posted = 1;
}
@@ -124,8 +150,6 @@ int omap_dm_timer_prepare(struct omap_dm_timer *timer)
return -EINVAL;
}
- omap_dm_timer_enable(timer);
-
if (pdata-needs_manual_reset)
omap_dm_timer_reset(timer);
@@ -200,7 +224,6 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
void omap_dm_timer_free(struct omap_dm_timer *timer)
{
- omap_dm_timer_disable(timer);
clk_put(timer-fclk);
WARN_ON(!timer-reserved);
@@ -282,6 +305,11 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
void omap_dm_timer_trigger(struct omap_dm_timer *timer)
{
+ if (unlikely(pm_runtime_suspended(timer-pdev-dev))) {
+ pr_err(%s: timer%d not enabled.\n, __func__, timer-id);
+ return;
+ }
+
omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
}
[PATCH v15 06/12] OMAP: dmtimer: switch-over to platform device driver
Register timer devices by going through hwmod database using
hwmod API. The driver probes each of the registered devices.
Functionality which are already performed by hwmod framework
are removed from timer code. New set of timers present on
OMAP4 are now supported.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
---
arch/arm/mach-omap2/timer.c | 56 -
arch/arm/plat-omap/dmtimer.c | 374 ++---
arch/arm/plat-omap/include/plat/dmtimer.h | 82 ---
3 files changed, 219 insertions(+), 293 deletions(-)
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index a33916a..4758d3e 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -80,7 +80,8 @@ static irqreturn_t omap2_gp_timer_interrupt(int irq, void
*dev_id)
{
struct clock_event_device *evt = clockevent_gpt;
- __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW);
+ __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW,
+ clkev.intr_offset, clkev.func_offset);
evt-event_handler(evt);
return IRQ_HANDLED;
@@ -96,7 +97,7 @@ static int omap2_gp_timer_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
{
__omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST,
- 0x - cycles, 1);
+ 0x - cycles, 1, clkev.func_offset);
return 0;
}
@@ -106,7 +107,8 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode
mode,
{
u32 period;
- __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate);
+ __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate, true,
+ clkev.intr_offset, clkev.func_offset);
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
@@ -114,10 +116,10 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode
mode,
period -= 1;
/* Looks like we need to first set the load value separately */
__omap_dm_timer_write(clkev.io_base, OMAP_TIMER_LOAD_REG,
- 0x - period, 1);
+ 0x - period, 1, clkev.func_offset);
__omap_dm_timer_load_start(clkev.io_base,
- OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
- 0x - period, 1);
+ OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
+ 0x - period, 1, clkev.func_offset);
break;
case CLOCK_EVT_MODE_ONESHOT:
break;
@@ -173,6 +175,11 @@ static int __init omap_dm_timer_init_one(struct
omap_dm_timer *timer,
return -ENODEV;
}
+ if (oh-class-rev == OMAP_TIMER_IP_VERSION_2) {
+ timer-func_offset = VERSION2_TIMER_WAKEUP_EN_REG_OFFSET;
+ timer-intr_offset = VERSION2_TIMER_STAT_REG_OFFSET;
+ }
+
omap_hwmod_enable(oh);
sys_timer_reserved |= (1 (gptimer_id - 1));
@@ -191,7 +198,7 @@ static int __init omap_dm_timer_init_one(struct
omap_dm_timer *timer,
clk_put(src);
}
}
- __omap_dm_timer_reset(timer-io_base, 1, 1);
+ __omap_dm_timer_reset(timer-io_base, 1, 1, timer-func_offset);
timer-posted = 1;
timer-rate = clk_get_rate(timer-fclk);
@@ -212,7 +219,8 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
omap2_gp_timer_irq.dev_id = (void *)clkev;
setup_irq(clkev.irq, omap2_gp_timer_irq);
- __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW);
+ __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW,
+ clkev.intr_offset, clkev.func_offset);
clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
clockevent_gpt.shift);
@@ -253,7 +261,8 @@ static struct omap_dm_timer clksrc;
static DEFINE_CLOCK_DATA(cd);
static cycle_t clocksource_read_cycles(struct clocksource *cs)
{
- return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1);
+ return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1,
+ clksrc.func_offset);
}
static struct clocksource clocksource_gpt = {
@@ -268,7 +277,8 @@ static void notrace dmtimer_update_sched_clock(void)
{
u32 cyc;
- cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1);
+ cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1,
+ clksrc.func_offset);
update_sched_clock(cd, cyc, (u32)~0);
}
@@ -278,7 +288,8 @@ unsigned long long notrace sched_clock(void)
[PATCH v15 04/12] OMAP2+: dmtimer: convert to platform devices
Add routines to converts dmtimers to platform devices. The device data
is obtained from hwmod database of respective platform and is registered
to device model after successful binding to driver.
In addition, capability attribute of each of the timers is added in
hwmod database.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Thara Gopinath th...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 22 +
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 22 +
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 27 ++
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 21 +
arch/arm/mach-omap2/timer.c| 136
arch/arm/plat-omap/include/plat/dmtimer.h | 10 ++-
6 files changed, 237 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index a015c69..d4da3f6 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -274,6 +274,16 @@ static struct omap_hwmod omap2420_iva_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
};
+/* always-on timers dev attribute */
+static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = {
+ .timer_capability = OMAP_TIMER_ALWON,
+};
+
+/* pwm timers dev attribute */
+static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = {
+ .timer_capability = OMAP_TIMER_HAS_PWM,
+};
+
/* timer1 */
static struct omap_hwmod omap2420_timer1_hwmod;
@@ -314,6 +324,7 @@ static struct omap_hwmod omap2420_timer1_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
},
},
+ .dev_attr = capability_alwon_dev_attr,
.slaves = omap2420_timer1_slaves,
.slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves),
.class = omap2xxx_timer_hwmod_class,
@@ -351,6 +362,7 @@ static struct omap_hwmod omap2420_timer2_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,
},
},
+ .dev_attr = capability_alwon_dev_attr,
.slaves = omap2420_timer2_slaves,
.slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves),
.class = omap2xxx_timer_hwmod_class,
@@ -388,6 +400,7 @@ static struct omap_hwmod omap2420_timer3_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT,
},
},
+ .dev_attr = capability_alwon_dev_attr,
.slaves = omap2420_timer3_slaves,
.slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves),
.class = omap2xxx_timer_hwmod_class,
@@ -425,6 +438,7 @@ static struct omap_hwmod omap2420_timer4_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT,
},
},
+ .dev_attr = capability_alwon_dev_attr,
.slaves = omap2420_timer4_slaves,
.slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves),
.class = omap2xxx_timer_hwmod_class,
@@ -462,6 +476,7 @@ static struct omap_hwmod omap2420_timer5_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT,
},
},
+ .dev_attr = capability_alwon_dev_attr,
.slaves = omap2420_timer5_slaves,
.slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves),
.class = omap2xxx_timer_hwmod_class,
@@ -500,6 +515,7 @@ static struct omap_hwmod omap2420_timer6_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT,
},
},
+ .dev_attr = capability_alwon_dev_attr,
.slaves = omap2420_timer6_slaves,
.slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves),
.class = omap2xxx_timer_hwmod_class,
@@ -537,6 +553,7 @@ static struct omap_hwmod omap2420_timer7_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT,
},
},
+ .dev_attr = capability_alwon_dev_attr,
.slaves = omap2420_timer7_slaves,
.slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves),
.class = omap2xxx_timer_hwmod_class,
@@ -574,6 +591,7 @@ static struct omap_hwmod omap2420_timer8_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT,
},
},
+ .dev_attr = capability_alwon_dev_attr,
.slaves = omap2420_timer8_slaves,
.slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves),
.class = omap2xxx_timer_hwmod_class,
@@ -611,6 +629,7 @@ static struct omap_hwmod omap2420_timer9_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT,
},
},
+ .dev_attr = capability_pwm_dev_attr,
.slaves
Re: [RFC PATCH 01/10] OMAP2+: l3-noc: Add support for device-tree
On 9/8/2011 8:01 PM, Grant Likely wrote:
On Wed, Aug 24, 2011 at 03:09:07PM +0200, Benoit Cousson wrote:
Add device-tree support for the l3-noc driver.
Use platform_driver_register to defer the probing at device init
time.
Signed-off-by: Benoit Coussonb-cous...@ti.com
Cc: Tony Lindgrent...@atomide.com
Cc: Santosh Shilimkarsantosh.shilim...@ti.com
---
arch/arm/mach-omap2/omap_l3_noc.c | 16 ++--
1 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c
b/arch/arm/mach-omap2/omap_l3_noc.c
index 7b9f190..4630703 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -228,16 +228,28 @@ static int __exit omap4_l3_remove(struct platform_device
*pdev)
return 0;
}
+#if defined(CONFIG_OF)
+static const struct of_device_id l3_noc_match[] = {
+ {.compatible = arteris,noc, },
Missing documentation for this compatible property.
As you already figured out... it will come later.
Also, it appears
to be rather on the generic side.
It is indeed a generic IP that will be there on OMAP5 too.
+ {},
+}
+MODULE_DEVICE_TABLE(of, l3_noc_match);
+#else
+#define l3_noc_match NULL
+#endif
+
static struct platform_driver omap4_l3_driver = {
+ .probe = omap4_l3_probe,
.probe needs to be put into the __devinit section.
.remove = __exit_p(omap4_l3_remove),
Similarly, at the same time the remove hook should be changed to
__devexit and __devexit_p() at the same time.
.driver = {
- .name = omap_l3_noc,
+ .name = omap_l3_noc,
+ .of_match_table = l3_noc_match,
Looks like .owner = THIS_MODULE, is missing too.
Well, yeah, that driver was supposed to be started really early to catch
any potential bus violation. So it was clearly not targeted to be a
loadable module.
Anyway, it will not hurt, so I'll fix that.
Thanks for the review,
Benoit
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[PATCH v15 00/12] OMAP: dmtimer: adaptation to platform_driver
Adaptation of dmtimer code to platform driver using omap_device and omap_hwmod abstraction. It also include pm-runtime and off-mode support. Baseline: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git Branch: Master Commit: c6a389f Linux 3.1-rc4 Test Info: - OMAP4430SDP: Functional tests. - OMAP3430SDP: Functional and Off-mode tests. Verified system going to offmode between timer stop and start without reconfiguration in between. - OMAP2430SDP: Functional tests. - OMAP2420SDP: Functional tests. - OMAP1710SDP: Boot test. v15: (1) Use pm_runtime_put() instead of pm_runtime_put_sync_suspend(). (2) Call pm_runtime_irq_safe() so that dmtimer is usable in interrupt context. (3) Dynamic context save whenever registers are modified. This avoids overhead of calling context save routine which saves all registers. (4) Avoid use of omap_readl(), omap_writel() in mach-omap1/timer.c. Instead use __raw_readl() and __raw_writel(). (5) Handle failure of *_dm_timer_prepare() in *_dm_timer_request() and *_dm_timer_request_specific(). (6) In mach-omap2/timer.c make sure that any of the timers can be used as iclocksource/clockevent timer by initializing func_offset and intr_offset correctly. (7) Maintain proper register context restoration order. Specifically, made sure that interrupt enable and control registers are restored at the end. (8) Remove wrapper around omap_pm_get_dev_context_loss_count(). Instead use it directly. (9) Extend protection of exported APIs using spinlock. (10) Remove the patch which uses mutex instead of spinlock because dmtimer can be used in interrupt context. (11) Removed system_timer_reserved variable declaration in mach-omap1/timer.c which was added to remove compilation error while building for OMAP1. v14: (1) Baselined on top of Tony Lindgren's latest timer patch series. (2) Context save/restore routines. (3) Off-mode support (4) Following comments from Todd Poynor toddpoy...@google.com implemented http://www.mail-archive.com/linux-omap@vger.kernel.org/msg52677.html http://www.mail-archive.com/linux-omap@vger.kernel.org/msg52676.html (5) Incorrect balancing of *_runtime_get/put_sync for wakeup domain timers in the off-mode patch corrected. v13: (1) Handling of early timer removed because this is being taken care by Tony's patch series. (2) Timers reserved for clockevent/clocksource during early boot are registered and marked reserved. (3) Platform specific timer code merged to mach-omap2/timer.c. (4) Timer capabilities are added in the hwmod database to each of the omap timers. (5) plat-omap/dmtimer.c plat-omap/include/plat/dmtimer.h are converted to a driver by moving them to drivers/misc/timer-omap.c and include/linux/timer-omap.h v12: (1) Remove registration and initialization of all timers during early boot. Initialize only the system timer which is set by the board file or default value assigned to it. This timer is not considered later during rest of the timers initialization. (2) Use mutex instead of spinlock since there is no interrupt context. (3) Remove hacky code to manage GPTIMER12 in mach-omap2/dmtimer.c. This is now changed to use dev_attr instead to identify if it is a secure timer. In the hwmod database, any secure timer entry can use this dev_attr so that driver avoids registering tha particular timer. (4) Removed reset function from OMAP1 and kept it back to its original place in plat-omap/dmtimer.c, with modification of course. Instead of (is_omap16xx) flag a new variable (needs_manual_reset) added. This flag is set for OMAP1. So, call to reset function is made if this value is set implying that reset is called only for OMAP1. (5) Timer enable and disable functions cleanup with checks for early boot condition removed. Added new interface wrapper function to configure system timer clock source. (6) Move OMAP4 specific register offsets from mach-omap2 to driver code along with other register offset definitions. (7) omap2_dm_timer_early_init() renamed to omap2_system_timer_init(), omap2_dm_timer_normal_init() renamed to omap2_dm_timer_init(). (8) Use dev_err() instead of pr_err() in low level read/write functions. v11: (1) Removed early timer initialization call from omap2_init_common_devices() in io.c. It is now called from omap2_gp_timer_init() in timer-gp.c as part of following call sequence: start_kernel()-time_init()-timer-init()-omap2_gp_timer_init() (2) Basedlined on top of Paul's patch series mentioned above. v10: (1) Update PM runtime for active early timers so that PM runtime userspace info is correct. (2) Include code to configure timers to POSTED mode which got missed in the previous version. (3) Remove pm runtime_enable from OMAP1 specific code since this is not applicable. v9: (1) In OMAP3 hwmod database, added entry for timer12 which was missing. Beagle board uses timer12 as its millisecond timer. (2) In OMAP3 hwmod database, rectified in-correct prcm configurations for timer10
[PATCH v15 11/12] OMAP: dmtimer: extend spinlock to exported APIs
Since the exported APIs can be called from interrupt context
extend spinlock protection to some more relevant APIs to avoid
race condition.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/plat-omap/dmtimer.c | 34 +++---
1 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 15fe01a..8891f80 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -174,7 +174,6 @@ struct omap_dm_timer *omap_dm_timer_request(void)
timer-reserved = 1;
break;
}
- spin_unlock_irqrestore(dm_timer_lock, flags);
if (timer) {
ret = omap_dm_timer_prepare(timer);
@@ -183,6 +182,7 @@ struct omap_dm_timer *omap_dm_timer_request(void)
timer = NULL;
}
}
+ spin_unlock_irqrestore(dm_timer_lock, flags);
if (!timer)
pr_debug(%s: timer request failed!\n, __func__);
@@ -205,7 +205,6 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
break;
}
}
- spin_unlock_irqrestore(dm_timer_lock, flags);
if (timer) {
ret = omap_dm_timer_prepare(timer);
@@ -214,6 +213,7 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
timer = NULL;
}
}
+ spin_unlock_irqrestore(dm_timer_lock, flags);
if (!timer)
pr_debug(%s: timer%d request failed!\n, __func__, id);
@@ -317,9 +317,11 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
void omap_dm_timer_start(struct omap_dm_timer *timer)
{
u32 l;
+ unsigned long flags;
omap_dm_timer_enable(timer);
+ spin_lock_irqsave(dm_timer_lock, flags);
if (timer-loses_context) {
u32 ctx_loss_cnt_after =
timer-get_context_loss_count(timer-pdev-dev);
@@ -335,15 +337,17 @@ void omap_dm_timer_start(struct omap_dm_timer *timer)
/* Save the context */
timer-context.tclr = l;
+ spin_unlock_irqrestore(dm_timer_lock, flags);
}
EXPORT_SYMBOL_GPL(omap_dm_timer_start);
void omap_dm_timer_stop(struct omap_dm_timer *timer)
{
- unsigned long rate = 0;
+ unsigned long rate = 0, flags;
struct dmtimer_platform_data *pdata = timer-pdev-dev.platform_data;
bool is_omap2 = true;
+ spin_lock_irqsave(dm_timer_lock, flags);
if (pdata-needs_manual_reset)
is_omap2 = false;
else
@@ -367,6 +371,7 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer)
omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
timer-context.tisr =
omap_dm_timer_read_reg(timer, OMAP_TIMER_STAT_REG);
+ spin_unlock_irqrestore(dm_timer_lock, flags);
omap_dm_timer_disable(timer);
}
EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
@@ -389,8 +394,10 @@ void omap_dm_timer_set_load(struct omap_dm_timer *timer,
int autoreload,
unsigned int load)
{
u32 l;
+ unsigned long flags;
omap_dm_timer_enable(timer);
+ spin_lock_irqsave(dm_timer_lock, flags);
l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
if (autoreload)
l |= OMAP_TIMER_CTRL_AR;
@@ -403,6 +410,7 @@ void omap_dm_timer_set_load(struct omap_dm_timer *timer,
int autoreload,
/* Save the context */
timer-context.tclr = l;
timer-context.tldr = load;
+ spin_unlock_irqrestore(dm_timer_lock, flags);
omap_dm_timer_disable(timer);
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
@@ -412,9 +420,11 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer
*timer, int autoreload,
unsigned int load)
{
u32 l;
+ unsigned long flags;
omap_dm_timer_enable(timer);
+ spin_lock_irqsave(dm_timer_lock, flags);
if (timer-loses_context) {
u32 ctx_loss_cnt_after =
timer-get_context_loss_count(timer-pdev-dev);
@@ -438,6 +448,7 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer
*timer, int autoreload,
timer-context.tclr = l;
timer-context.tldr = load;
timer-context.tcrr = load;
+ spin_unlock_irqrestore(dm_timer_lock, flags);
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
@@ -445,8 +456,10 @@ void omap_dm_timer_set_match(struct omap_dm_timer *timer,
int enable,
unsigned int match)
{
u32 l;
+ unsigned long flags;
omap_dm_timer_enable(timer);
+ spin_lock_irqsave(dm_timer_lock, flags);
l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
if (enable)
l |= OMAP_TIMER_CTRL_CE;
@@ -458,6 +471,7 @@ void omap_dm_timer_set_match(struct
[PATCH v15 02/12] OMAP4: hwmod data: add dmtimer version information
OMAP4 has two groups of timers: version 1 timers are 1, 2, 10,
while the rest of the timers, 3-9, 11 are version 2 timers.
The version information is required by the driver so that they
could be handled correctly by it.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Cousson, Benoit b-cous...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c |3 +++
arch/arm/plat-omap/include/plat/dmtimer.h |4 +++-
2 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 6201422..2010a7b 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -29,6 +29,7 @@
#include plat/mcbsp.h
#include plat/mmc.h
#include plat/i2c.h
+#include plat/dmtimer.h
#include omap_hwmod_common_data.h
@@ -4248,6 +4249,7 @@ static struct omap_hwmod_class_sysconfig
omap44xx_timer_1ms_sysc = {
static struct omap_hwmod_class omap44xx_timer_1ms_hwmod_class = {
.name = timer,
.sysc = omap44xx_timer_1ms_sysc,
+ .rev= OMAP_TIMER_IP_VERSION_1,
};
static struct omap_hwmod_class_sysconfig omap44xx_timer_sysc = {
@@ -4263,6 +4265,7 @@ static struct omap_hwmod_class_sysconfig
omap44xx_timer_sysc = {
static struct omap_hwmod_class omap44xx_timer_hwmod_class = {
.name = timer,
.sysc = omap44xx_timer_sysc,
+ .rev= OMAP_TIMER_IP_VERSION_2,
};
/* timer1 */
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h
b/arch/arm/plat-omap/include/plat/dmtimer.h
index eb5d16c..37efa15 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -58,7 +58,9 @@
* IP revision identifier so that Highlander IP
* in OMAP4 can be distinguished.
*/
-#define OMAP_TIMER_IP_VERSION_10x1
+#define OMAP_TIMER_IP_VERSION_10x1
+#define OMAP_TIMER_IP_VERSION_20x2
+
struct omap_dm_timer;
struct clk;
--
1.7.0.4
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Re: [RFC PATCH 06/10] hwspinlock: OMAP4: Add spinlock support in DT
On 9/8/2011 4:47 PM, Arnd Bergmann wrote:
On Thursday 08 September 2011, Ohad Ben-Cohen wrote:
On Thu, Sep 8, 2011 at 11:07 AM, Cousson, Benoitb-cous...@ti.com wrote:
The (small) issue for my point of view is that the #hwspinlock is already
encoded in the IP itself. So adding a baseid directly in DT will look like
duplicating indirectly something that is already there in the HW.
That being said, since we cannot rely on the order, we will not be able to
get the proper baseid until the driver probe every hwspinlock devices :-(
So baseid might be a easier choice.
Sounds good. Thanks a lot !
I think a number would work here but is not optimal for the device tree
representation. I think a better binding would be to encode it like
interrupt numbers, where every device that uses a hwspinlock will describe
that as a combination of phandle to the hwspinlock controller and
identifier to be used by that controller, e.g.
spinlock1 {
compatible = ti,omap-spinlock;
regs = ...
interrupts =42;
interrupt-parent =irq-controller;
};
dsp {
compatible = ...
regs = ...
spinlocks =23; // local number withingspinlock1;
spinlock-controller =spinlock1;
};
OK, this is indeed much more aligned with the current practice, and what
DMA should do as well.
Practically speaking, that change will go beyond the original scope of
that patch that was just adding the DT support based on the existing
functionality.
Is it OK to handle that improvement in a further patch / series?
Thanks,
Benoit
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[PATCH v15 12/12] OMAP: dmtimer: add error handling to export APIs
Add error handling code to exported APIs. Currently, the APIs assume they
are operating on valid parameters passed to it.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/plat-omap/dmtimer.c | 101 ++---
arch/arm/plat-omap/include/plat/dmtimer.h | 24
2 files changed, 88 insertions(+), 37 deletions(-)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index a793482..34db29b 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -222,12 +222,16 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int
id)
}
EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
-void omap_dm_timer_free(struct omap_dm_timer *timer)
+int omap_dm_timer_free(struct omap_dm_timer *timer)
{
+ if (unlikely(!timer))
+ return -EINVAL;
+
clk_put(timer-fclk);
WARN_ON(!timer-reserved);
timer-reserved = 0;
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_free);
@@ -245,7 +249,9 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
{
- return timer-irq;
+ if (timer)
+ return timer-irq;
+ return -EINVAL;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
@@ -289,7 +295,9 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
{
- return timer-fclk;
+ if (timer)
+ return timer-fclk;
+ return NULL;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk);
@@ -303,22 +311,26 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
#endif
-void omap_dm_timer_trigger(struct omap_dm_timer *timer)
+int omap_dm_timer_trigger(struct omap_dm_timer *timer)
{
- if (unlikely(pm_runtime_suspended(timer-pdev-dev))) {
- pr_err(%s: timer%d not enabled.\n, __func__, timer-id);
- return;
+ if (unlikely(!timer || pm_runtime_suspended(timer-pdev-dev))) {
+ pr_err(%s: timer not available or enabled.\n, __func__);
+ return -EINVAL;
}
omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
-void omap_dm_timer_start(struct omap_dm_timer *timer)
+int omap_dm_timer_start(struct omap_dm_timer *timer)
{
u32 l;
unsigned long flags;
+ if (unlikely(!timer))
+ return -EINVAL;
+
omap_dm_timer_enable(timer);
spin_lock_irqsave(dm_timer_lock, flags);
@@ -338,15 +350,19 @@ void omap_dm_timer_start(struct omap_dm_timer *timer)
/* Save the context */
timer-context.tclr = l;
spin_unlock_irqrestore(dm_timer_lock, flags);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_start);
-void omap_dm_timer_stop(struct omap_dm_timer *timer)
+int omap_dm_timer_stop(struct omap_dm_timer *timer)
{
unsigned long rate = 0, flags;
struct dmtimer_platform_data *pdata = timer-pdev-dev.platform_data;
bool is_omap2 = true;
+ if (unlikely(!timer))
+ return -EINVAL;
+
spin_lock_irqsave(dm_timer_lock, flags);
if (pdata-needs_manual_reset)
is_omap2 = false;
@@ -373,13 +389,19 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer)
omap_dm_timer_read_reg(timer, OMAP_TIMER_STAT_REG);
spin_unlock_irqrestore(dm_timer_lock, flags);
omap_dm_timer_disable(timer);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
{
int ret;
- struct dmtimer_platform_data *pdata = timer-pdev-dev.platform_data;
+ struct dmtimer_platform_data *pdata;
+
+ if (unlikely(!timer))
+ return -EINVAL;
+
+ pdata = timer-pdev-dev.platform_data;
if (source 0 || source = 3)
return -EINVAL;
@@ -390,12 +412,15 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer,
int source)
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
-void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
+int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
unsigned int load)
{
u32 l;
unsigned long flags;
+ if (unlikely(!timer))
+ return -EINVAL;
+
omap_dm_timer_enable(timer);
spin_lock_irqsave(dm_timer_lock, flags);
l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
@@ -413,16 +438,20 @@ void omap_dm_timer_set_load(struct omap_dm_timer *timer,
int autoreload,
timer-context.tldr = load;
spin_unlock_irqrestore(dm_timer_lock, flags);
omap_dm_timer_disable(timer);
+ return 0;
}
EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
/* Optimized set_load which removes costly spin wait in timer_start */
Re: [PATCH v2] ASoC: omap: convert per-board modules to platform drivers
On Thu, Sep 08, 2011 at 03:47:31PM -0700, Mark Brown wrote: On Thu, Sep 08, 2011 at 11:37:20PM +0100, Russell King - ARM Linux wrote: With DT of course, all devices get instantiated from the device tree, so there should not be any more platform specific chunks of code in these locations (ha, it couldn't be solved with platform data so I suspect it will continue to persist, forever unsolved.) That's not the case at all for audio, the PCB schematic for the audio subsystem on a device like a smartphone is a sufficiently interesting piece of hardware to be a device with a driver in its own right. The ASoC machine drivers aren't about instantiating devices, they are about controlling the interrelationships between the various devices in the audio subsystem. What will happen for device tree is that there will be a device in the device tree for the ASoC board. Sounds like you just solved the machine_is_xxx() problem in ASoC land too there. If you're _already_ going for separate devices to describe the ASoC stuff on the board, then there's no reason that couldn't have already been done to eliminate the machine_is_xxx() usage in ASoC - rather than complaining about machine_is_xxx() not being a very good solution. As I said, the problem was solved years ago, and all the component parts have been there also for years. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2] ASoC: omap: convert per-board modules to platform drivers
On Thu, Sep 08, 2011 at 11:37:20PM +0100, Russell King - ARM Linux wrote: With DT of course, all devices get instantiated from the device tree, so there should not be any more platform specific chunks of code in these locations (ha, it couldn't be solved with platform data so I suspect it will continue to persist, forever unsolved.) That's not the case at all for audio, the PCB schematic for the audio subsystem on a device like a smartphone is a sufficiently interesting piece of hardware to be a device with a driver in its own right. The ASoC machine drivers aren't about instantiating devices, they are about controlling the interrelationships between the various devices in the audio subsystem. What will happen for device tree is that there will be a device in the device tree for the ASoC board. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2] ASoC: omap: convert per-board modules to platform drivers
On Thu, 2011-09-08 at 22:28 +0200, Arnd Bergmann wrote: On Thursday 08 September 2011 20:05:48 Mans Rullgard wrote: I had the same thought, but I couldn't find a suitable string anywhere. Are you suggesting an if(machine_is_foo()) cascade in omap_init_audio()? I'll be the first to agree this patch is not particularly pretty. My general feeling is that practically every time someone writes machine_is_*(), they are doing it wrong. There are of course exceptions, but I would strongly recommend to have the initialization calling up from the board file into more general functions instead of having all boards calling the same function which then goes to board specific code again. I have to agree, that seems tasteless. I'd expect something like triggering registration of devices based off walking down a table of machine IDs or something. One other issue to consider here is that we don't want to discourage people from sharing machine drivers while we can so it can't be completely automatic, it Perhaps some sort of generic machine type based mechanism for instantiating drivers a bit like what's done with DMI might be useful, video will have a similar issue I guess. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2] ASoC: omap: convert per-board modules to platform drivers
On Thu, Sep 08, 2011 at 11:47:16PM +0530, Jassi Brar wrote: Can't we do by having omap_init_audio() in arch/arm/mach-omap2/devices.c generate a platform device of name depending upon machine_is_* ? That's not a bad idea. If we were going to do that it shouldn't be OMAP specific, any platform could use it. Though we'd need a way to override it to provide platform data on systems that needs it. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/8] omap3evm: Add Camera board init/hookup file
Hi,
On Thursday 08 September 2011 15:34:44 Deepthy Ravi wrote:
From: Vaibhav Hiremath hvaib...@ti.com
In OMAP3EVM Rev G, TVP5146 video decoder is populated on the
main board. This decoder is registered as a subdevice to the
media-controller/omap3isp.
Thanks for the patch.
We're getting more and more board code that adds camera support for
development platforms. The OMAP3EVM board code can hardcode TVP5146 support,
as the chip is always present on the board. However, many other boards have
extension connectors to support external sensors. In that case it gets more
difficult to push board code to mainline.
Do you think we should work on a standard mechanism to register sensor devices
in board code (maybe based on a kernel command line parameter) ? Or should we
wait for DT support, which would make this much easier ?
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Deepthy Ravi deepthy.r...@ti.com
---
arch/arm/mach-omap2/Makefile|5 +
arch/arm/mach-omap2/board-omap3evm-camera.c | 253
+++ arch/arm/mach-omap2/board-omap3evm.c|
4 +
include/media/tvp514x.h |3 +
4 files changed, 265 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/board-omap3evm-camera.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index e43d94b..66ac9fe 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -272,3 +272,8 @@ disp-$(CONFIG_OMAP2_DSS) := display.o
obj-y+= $(disp-m) $(disp-y)
obj-y+= common-board-devices.o
twl-common.o
+
+ifeq ($(CONFIG_MACH_OMAP3EVM),y)
+evm-camera-$(CONFIG_VIDEO_OMAP3) := board-omap3evm-camera.o
+obj-y += $(evm-camera-m) $(evm-camera-y)
+endif
diff --git a/arch/arm/mach-omap2/board-omap3evm-camera.c
b/arch/arm/mach-omap2/board-omap3evm-camera.c new file mode 100644
index 000..718dd6d
--- /dev/null
+++ b/arch/arm/mach-omap2/board-omap3evm-camera.c
@@ -0,0 +1,253 @@
+/*
+ * arch/arm/mach-omap2/board-omap3evm-camera.c
+ *
+ * OMAP3EVM: Driver for TVP5146 module
+ *
+ * Copyright (C) 2011 Texas Instruments Inc
+ * Author: Vaibhav Hiremath hvaib...@ti.com
+ *
+ * This package is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include linux/io.h
+#include linux/i2c.h
+#include linux/delay.h
+#include linux/err.h
+#include linux/platform_device.h
+#include linux/regulator/consumer.h
+#include mach/gpio.h
+#include media/tvp514x.h
+#include media/omap3isp.h
+#include devices.h
+
+#define CAM_USE_XCLKA0
This isn't used.
+
+#define TVP5146_DEC_RST 98
+#define T2_GPIO_2194
+#define nCAM_VD_SEL 157
+#define nCAM_VD_EN 200
+
+static struct regulator *omap3evm_1v8;
+static struct regulator *omap3evm_2v8;
I tend to dislike global variables. What about passing pointers to the
regulators to the TVP5146 driver instead, and have it deal with them in its
.s_power() method ? This would simplify the board code s_power method as well.
+
+
+/* mux id to enable/disable signal routing to different peripherals */
+enum omap3evm_cam_mux {
+ MUX_EN_TVP5146 = 0,
+ MUX_EN_CAMERA_SENSOR,
+ MUX_EN_EXP_CAMERA_SENSOR,
+ MUX_INVALID,
+};
+
+static int omap3evm_regulator_ctrl(u32 on)
+{
+ if (!omap3evm_1v8 || !omap3evm_2v8) {
+ printk(KERN_ERR No regulator available\n);
+ return -ENODEV;
+ }
+ if (on) {
+ regulator_enable(omap3evm_1v8);
+ mdelay(1);
+ regulator_enable(omap3evm_2v8);
+ mdelay(50);
+ } else {
+ if (regulator_is_enabled(omap3evm_1v8))
+ regulator_disable(omap3evm_1v8);
+ if (regulator_is_enabled(omap3evm_2v8))
+ regulator_disable(omap3evm_2v8);
+ }
+ return 0;
+}
+/**
+ * @brief omap3evm_set_mux - Sets mux to enable/disable signal routing to
+ * different peripherals present on new EVM
board + *
+ * @param mux_id - enum, mux id to enable/disable
+ * @param value - enum, ENABLE_MUX for enabling and DISABLE_MUX for
Re: [alsa-devel] [PATCH] ASoC: omap: convert per-board modules to platform drivers
On Thu, Sep 08, 2011 at 04:41:30PM +0100, Mans Rullgard wrote: On 8 September 2011 16:15, Lars-Peter Clausen l...@metafoo.de wrote: Use different device driver names for different drivers. I guess this worked by accident on my system. Are there any other changes needed? Check the N810 code - it looks like that driver should be taking platform data to distinguish between the two models. Possibly also rx51 though I only looked at the diff. Also it should probably be grabbing the clocks before it registers the card. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 4/8] ispvideo: Add support for G/S/ENUM_STD ioctl
Hi Deepathy,
Thanks for the patches.
On Thu, Sep 08, 2011 at 07:05:22PM +0530, Deepthy Ravi wrote:
From: Vaibhav Hiremath hvaib...@ti.com
In order to support TVP5146 (for that matter any video decoder),
it is important to support G/S/ENUM_STD ioctl on /dev/videoX
device node.
Why on video nodes rather than the subdev node?
I don't think *_STD ioctls should be handled differently from any others,
i.e. this is directly related to that subdev, so the control should go
through the subdev node.
That said, generic applications aren't necessarily aware of the subdev nodes
and I think this is something that should be handled in a libv4l plugin.
This appears quite generic to me; walking the graph and accessing the right
subdev node can be done in user space.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Deepthy Ravi deepthy.r...@ti.com
---
drivers/media/video/omap3isp/ispvideo.c | 98
++-
drivers/media/video/omap3isp/ispvideo.h |1 +
2 files changed, 98 insertions(+), 1 deletions(-)
diff --git a/drivers/media/video/omap3isp/ispvideo.c
b/drivers/media/video/omap3isp/ispvideo.c
index d5b8236..ff0ffed 100644
--- a/drivers/media/video/omap3isp/ispvideo.c
+++ b/drivers/media/video/omap3isp/ispvideo.c
@@ -37,6 +37,7 @@
#include plat/iovmm.h
#include plat/omap-pm.h
+#include media/tvp514x.h
#include ispvideo.h
#include isp.h
@@ -1136,7 +1137,97 @@ isp_video_g_input(struct file *file, void *fh,
unsigned int *input)
static int
isp_video_s_input(struct file *file, void *fh, unsigned int input)
{
- return input == 0 ? 0 : -EINVAL;
+ struct isp_video *video = video_drvdata(file);
+ struct media_entity *entity = video-video.entity;
+ struct media_entity_graph graph;
+ struct v4l2_subdev *subdev;
+ struct v4l2_routing route;
+ int ret = 0;
+
+ media_entity_graph_walk_start(graph, entity);
+ while ((entity = media_entity_graph_walk_next(graph))) {
+ if (media_entity_type(entity) ==
+ MEDIA_ENT_T_V4L2_SUBDEV) {
+ subdev = media_entity_to_v4l2_subdev(entity);
+ if (subdev != NULL) {
+ if (input == 0)
+ route.input = INPUT_CVBS_VI4A;
+ else
+ route.input = INPUT_SVIDEO_VI2C_VI1C;
+ route.output = 0;
+ ret = v4l2_subdev_call(subdev, video, s_routing,
+ route.input, route.output, 0);
+ if (ret 0 ret != -ENOIOCTLCMD)
+ return ret;
+ }
+ }
+ }
+
+ return 0;
+}
+
+static int isp_video_querystd(struct file *file, void *fh, v4l2_std_id *a)
+{
+ struct isp_video_fh *vfh = to_isp_video_fh(fh);
+ struct isp_video *video = video_drvdata(file);
+ struct media_entity *entity = video-video.entity;
+ struct media_entity_graph graph;
+ struct v4l2_subdev *subdev;
+ int ret = 0;
+
+ media_entity_graph_walk_start(graph, entity);
+ while ((entity = media_entity_graph_walk_next(graph))) {
+ if (media_entity_type(entity) ==
+ MEDIA_ENT_T_V4L2_SUBDEV) {
+ subdev = media_entity_to_v4l2_subdev(entity);
+ if (subdev != NULL) {
+ ret = v4l2_subdev_call(subdev, video, querystd,
+ a);
+ if (ret 0 ret != -ENOIOCTLCMD)
+ return ret;
+ }
+ }
+ }
+
+ vfh-standard.id = *a;
+ return 0;
+}
+
+static int isp_video_g_std(struct file *file, void *fh, v4l2_std_id *norm)
+{
+ struct isp_video_fh *vfh = to_isp_video_fh(fh);
+ struct isp_video *video = video_drvdata(file);
+
+ mutex_lock(video-mutex);
+ *norm = vfh-standard.id;
+ mutex_unlock(video-mutex);
+
+ return 0;
+}
+
+static int isp_video_s_std(struct file *file, void *fh, v4l2_std_id *norm)
+{
+ struct isp_video *video = video_drvdata(file);
+ struct media_entity *entity = video-video.entity;
+ struct media_entity_graph graph;
+ struct v4l2_subdev *subdev;
+ int ret = 0;
+
+ media_entity_graph_walk_start(graph, entity);
+ while ((entity = media_entity_graph_walk_next(graph))) {
+ if (media_entity_type(entity) ==
+ MEDIA_ENT_T_V4L2_SUBDEV) {
+ subdev = media_entity_to_v4l2_subdev(entity);
+ if (subdev != NULL) {
+ ret = v4l2_subdev_call(subdev, core, s_std,
+ *norm);
+
Re: [PATCH v2] ASoC: omap: convert per-board modules to platform drivers
On Thursday 08 September 2011 20:05:48 Mans Rullgard wrote: Can't we do by having omap_init_audio() in arch/arm/mach-omap2/devices.c generate a platform device of name depending upon machine_is_* ? I had the same thought, but I couldn't find a suitable string anywhere. Are you suggesting an if(machine_is_foo()) cascade in omap_init_audio()? I'll be the first to agree this patch is not particularly pretty. My general feeling is that practically every time someone writes machine_is_*(), they are doing it wrong. There are of course exceptions, but I would strongly recommend to have the initialization calling up from the board file into more general functions instead of having all boards calling the same function which then goes to board specific code again. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 4/8] ispvideo: Add support for G/S/ENUM_STD ioctl
Hi,
Thanks for the patch.
On Thursday 08 September 2011 15:35:22 Deepthy Ravi wrote:
From: Vaibhav Hiremath hvaib...@ti.com
In order to support TVP5146 (for that matter any video decoder),
it is important to support G/S/ENUM_STD ioctl on /dev/videoX
device node.
Why so ? Shouldn't it be queried on the subdev output pad directly ?
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Deepthy Ravi deepthy.r...@ti.com
---
drivers/media/video/omap3isp/ispvideo.c | 98
++- drivers/media/video/omap3isp/ispvideo.h |
1 +
2 files changed, 98 insertions(+), 1 deletions(-)
diff --git a/drivers/media/video/omap3isp/ispvideo.c
b/drivers/media/video/omap3isp/ispvideo.c index d5b8236..ff0ffed 100644
--- a/drivers/media/video/omap3isp/ispvideo.c
+++ b/drivers/media/video/omap3isp/ispvideo.c
@@ -37,6 +37,7 @@
#include plat/iovmm.h
#include plat/omap-pm.h
+#include media/tvp514x.h
#include ispvideo.h
#include isp.h
@@ -1136,7 +1137,97 @@ isp_video_g_input(struct file *file, void *fh,
unsigned int *input) static int
isp_video_s_input(struct file *file, void *fh, unsigned int input)
{
- return input == 0 ? 0 : -EINVAL;
+ struct isp_video *video = video_drvdata(file);
+ struct media_entity *entity = video-video.entity;
+ struct media_entity_graph graph;
+ struct v4l2_subdev *subdev;
+ struct v4l2_routing route;
+ int ret = 0;
+
+ media_entity_graph_walk_start(graph, entity);
+ while ((entity = media_entity_graph_walk_next(graph))) {
+ if (media_entity_type(entity) ==
+ MEDIA_ENT_T_V4L2_SUBDEV) {
+ subdev = media_entity_to_v4l2_subdev(entity);
+ if (subdev != NULL) {
+ if (input == 0)
+ route.input = INPUT_CVBS_VI4A;
+ else
+ route.input = INPUT_SVIDEO_VI2C_VI1C;
+ route.output = 0;
+ ret = v4l2_subdev_call(subdev, video, s_routing,
+ route.input, route.output, 0);
+ if (ret 0 ret != -ENOIOCTLCMD)
+ return ret;
+ }
+ }
+ }
+
+ return 0;
+}
+
+static int isp_video_querystd(struct file *file, void *fh, v4l2_std_id *a)
+{
+ struct isp_video_fh *vfh = to_isp_video_fh(fh);
+ struct isp_video *video = video_drvdata(file);
+ struct media_entity *entity = video-video.entity;
+ struct media_entity_graph graph;
+ struct v4l2_subdev *subdev;
+ int ret = 0;
+
+ media_entity_graph_walk_start(graph, entity);
+ while ((entity = media_entity_graph_walk_next(graph))) {
+ if (media_entity_type(entity) ==
+ MEDIA_ENT_T_V4L2_SUBDEV) {
+ subdev = media_entity_to_v4l2_subdev(entity);
+ if (subdev != NULL) {
+ ret = v4l2_subdev_call(subdev, video, querystd,
+ a);
+ if (ret 0 ret != -ENOIOCTLCMD)
+ return ret;
+ }
+ }
+ }
+
+ vfh-standard.id = *a;
+ return 0;
+}
+
+static int isp_video_g_std(struct file *file, void *fh, v4l2_std_id *norm)
+{
+ struct isp_video_fh *vfh = to_isp_video_fh(fh);
+ struct isp_video *video = video_drvdata(file);
+
+ mutex_lock(video-mutex);
+ *norm = vfh-standard.id;
+ mutex_unlock(video-mutex);
+
+ return 0;
+}
+
+static int isp_video_s_std(struct file *file, void *fh, v4l2_std_id *norm)
+{
+ struct isp_video *video = video_drvdata(file);
+ struct media_entity *entity = video-video.entity;
+ struct media_entity_graph graph;
+ struct v4l2_subdev *subdev;
+ int ret = 0;
+
+ media_entity_graph_walk_start(graph, entity);
+ while ((entity = media_entity_graph_walk_next(graph))) {
+ if (media_entity_type(entity) ==
+ MEDIA_ENT_T_V4L2_SUBDEV) {
+ subdev = media_entity_to_v4l2_subdev(entity);
+ if (subdev != NULL) {
+ ret = v4l2_subdev_call(subdev, core, s_std,
+ *norm);
+ if (ret 0 ret != -ENOIOCTLCMD)
+ return ret;
+ }
+ }
+ }
+
+ return 0;
}
static const struct v4l2_ioctl_ops isp_video_ioctl_ops = {
@@ -1161,6 +1252,9 @@ static const struct v4l2_ioctl_ops
isp_video_ioctl_ops = { .vidioc_enum_input= isp_video_enum_input,
.vidioc_g_input = isp_video_g_input,
Re: [PATCH 3/8] tvp514x: Migrate to media-controller framework
Hi,
On Thursday 08 September 2011 15:35:00 Deepthy Ravi wrote:
From: Vaibhav Hiremath hvaib...@ti.com
Migrate tvp5146 driver to media controller framework. The
driver registers as a sub-device entity to MC framwork
and sub-device to V4L2 layer. The default format code was
V4L2_MBUS_FMT_YUYV10_2X10. Changed it to V4L2_MBUS_FMT_UYVY8_2X8
and hence added the new format code to ccdc and isp format
arrays.
Thanks for the patch.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Deepthy Ravi deepthy.r...@ti.com
---
drivers/media/video/omap3isp/ispccdc.c |1 +
drivers/media/video/omap3isp/ispvideo.c |3 +
drivers/media/video/tvp514x.c | 241 +---
include/media/v4l2-subdev.h |7 +-
This should be split in 3 patches.
I've already posted patches to support UYVY8_2X8 in the OMAP3 ISP driver to
the linux-media mailing list. Can you reuse them ?
4 files changed, 222 insertions(+), 30 deletions(-)
diff --git a/drivers/media/video/omap3isp/ispccdc.c
b/drivers/media/video/omap3isp/ispccdc.c index 9d3459d..d58fe45 100644
--- a/drivers/media/video/omap3isp/ispccdc.c
+++ b/drivers/media/video/omap3isp/ispccdc.c
@@ -57,6 +57,7 @@ static const unsigned int ccdc_fmts[] = {
V4L2_MBUS_FMT_SRGGB12_1X12,
V4L2_MBUS_FMT_SBGGR12_1X12,
V4L2_MBUS_FMT_SGBRG12_1X12,
+ V4L2_MBUS_FMT_UYVY8_2X8,
};
/*
diff --git a/drivers/media/video/omap3isp/ispvideo.c
b/drivers/media/video/omap3isp/ispvideo.c index fd965ad..d5b8236 100644
--- a/drivers/media/video/omap3isp/ispvideo.c
+++ b/drivers/media/video/omap3isp/ispvideo.c
@@ -100,6 +100,9 @@ static struct isp_format_info formats[] = {
{ V4L2_MBUS_FMT_YUYV8_1X16, V4L2_MBUS_FMT_YUYV8_1X16,
V4L2_MBUS_FMT_YUYV8_1X16, 0,
V4L2_PIX_FMT_YUYV, 16, },
+ { V4L2_MBUS_FMT_UYVY8_2X8, V4L2_MBUS_FMT_UYVY8_2X8,
+ V4L2_MBUS_FMT_UYVY8_2X8, 0,
+ V4L2_PIX_FMT_UYVY, 16, },
};
const struct isp_format_info *
diff --git a/drivers/media/video/tvp514x.c b/drivers/media/video/tvp514x.c
index 9b3e828..10f3e87 100644
--- a/drivers/media/video/tvp514x.c
+++ b/drivers/media/video/tvp514x.c
@@ -32,11 +32,14 @@
#include linux/slab.h
#include linux/delay.h
#include linux/videodev2.h
+#include linux/v4l2-mediabus.h
#include media/v4l2-device.h
#include media/v4l2-common.h
-#include media/v4l2-mediabus.h
#include media/v4l2-chip-ident.h
+#include media/v4l2-subdev.h
+#include media/v4l2-ctrls.h
+
#include media/v4l2-ctrls.h
#include media/tvp514x.h
@@ -78,6 +81,8 @@ struct tvp514x_std_info {
unsigned long height;
u8 video_std;
struct v4l2_standard standard;
+ unsigned int mbus_code;
+ struct v4l2_mbus_framefmt format;
};
static struct tvp514x_reg tvp514x_reg_list_default[0x40];
@@ -101,6 +106,7 @@ struct tvp514x_decoder {
struct v4l2_ctrl_handler hdl;
struct tvp514x_reg tvp514x_regs[ARRAY_SIZE(tvp514x_reg_list_default)];
const struct tvp514x_platform_data *pdata;
+ struct media_pad pad;
int ver;
int streaming;
@@ -207,29 +213,46 @@ static struct tvp514x_reg tvp514x_reg_list_default[]
= { static const struct tvp514x_std_info tvp514x_std_list[] = {
/* Standard: STD_NTSC_MJ */
[STD_NTSC_MJ] = {
- .width = NTSC_NUM_ACTIVE_PIXELS,
- .height = NTSC_NUM_ACTIVE_LINES,
- .video_std = VIDEO_STD_NTSC_MJ_BIT,
- .standard = {
- .index = 0,
- .id = V4L2_STD_NTSC,
- .name = NTSC,
- .frameperiod = {1001, 3},
- .framelines = 525
- },
- /* Standard: STD_PAL_BDGHIN */
+ .width = NTSC_NUM_ACTIVE_PIXELS,
+ .height = NTSC_NUM_ACTIVE_LINES,
+ .video_std = VIDEO_STD_NTSC_MJ_BIT,
+ .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8,
+ .standard = {
+ .index = 0,
+ .id = V4L2_STD_NTSC,
+ .name = NTSC,
+ .frameperiod = {1001, 3},
+ .framelines = 525
+ },
+ .format = {
+ .width = NTSC_NUM_ACTIVE_PIXELS,
+ .height = NTSC_NUM_ACTIVE_LINES,
+ .code = V4L2_MBUS_FMT_UYVY8_2X8,
+ .field = V4L2_FIELD_INTERLACED,
+ .colorspace = V4L2_COLORSPACE_SMPTE170M,
+ }
+
},
+ /* Standard: STD_PAL_BDGHIN */
[STD_PAL_BDGHIN] = {
- .width = PAL_NUM_ACTIVE_PIXELS,
- .height = PAL_NUM_ACTIVE_LINES,
- .video_std = VIDEO_STD_PAL_BDGHIN_BIT,
- .standard = {
- .index = 1,
- .id = V4L2_STD_PAL,
- .name = PAL,
- .frameperiod = {1, 25},
- .framelines = 625
- },
+ .width =
Re: [RFC PATCH 05/10] documentation/dt: Add mpu, dsp and iva bindings
On Wed, Aug 24, 2011 at 03:09:11PM +0200, Benoit Cousson wrote:
Add documentation for the OMAP4 processors bindings.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Randy Dunlap rdun...@xenotime.net
---
Documentation/devicetree/bindings/arm/omap/dsp.txt | 14
Documentation/devicetree/bindings/arm/omap/iva.txt | 18 ++
Documentation/devicetree/bindings/arm/omap/mpu.txt | 35
3 files changed, 67 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/omap/dsp.txt
create mode 100644 Documentation/devicetree/bindings/arm/omap/iva.txt
create mode 100644 Documentation/devicetree/bindings/arm/omap/mpu.txt
diff --git a/Documentation/devicetree/bindings/arm/omap/dsp.txt
b/Documentation/devicetree/bindings/arm/omap/dsp.txt
new file mode 100644
index 000..8fcd82c
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/omap/dsp.txt
@@ -0,0 +1,14 @@
+* TI - DSP (Digital Signal Processor)
+
+TI DSP included in OMAP SoC
+
+Required properties:
+- compatible : Should be ti,c64 for OMAP3 4
+- hwmods: dsp
+
+Examples:
+
+dsp {
+compatible = ti,omap4-c64, ti,c64;
+hwmods = dsp;
+};
diff --git a/Documentation/devicetree/bindings/arm/omap/iva.txt
b/Documentation/devicetree/bindings/arm/omap/iva.txt
new file mode 100644
index 000..f428e88
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/omap/iva.txt
@@ -0,0 +1,18 @@
+* TI - IVA (Imaging and Video Accelerator) subsystem
+
+The IVA contain various audio, video or imaging HW accelerator
+depending of the version.
+
+Required properties:
+- compatible : Should be:
+ - ti,ivahd, ti,iva for OMAP4
+ - ti,iva2, ti,iva for OMAP3
+ - ti,iva1, ti,iva for OMAP2
Again, be specific to the instantiation and encode the omap version
into the compatible value. Use the form ti,omap4-*, etc.
g.
--
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the body of a message to majord...@vger.kernel.org
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Re: [PATCH] ASoC: omap: convert per-board modules to platform drivers
On Thu, Sep 08, 2011 at 04:05:53PM +0100, Mans Rullgard wrote:
+static struct platform_device omap_soc_audio = {
+ .name = omap-soc-audio,
+ .id = -1,
+};
+
This isn't really accomplishing anything as you're using the same device
name for all boards, it's essentially the same thing as soc-audio just
an OMAP version of that device. Each machine driver should be a
separate platform driver.
--
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the body of a message to majord...@vger.kernel.org
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Re: [PATCH 5/8] ispccdc: Configure CCDC registers
Hi,
Thanks for the patch.
On Thursday 08 September 2011 15:35:44 Deepthy Ravi wrote:
From: Vaibhav Hiremath hvaib...@ti.com
Configure the CCDC registers for YUV and non YUV
data. Also some code clean-up for making it compact.
I've already posted patches to the linux-media mailing list for this. Can you
rebase this patch on top of them ?
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Deepthy Ravi deepthy.r...@ti.com
---
drivers/media/video/omap3isp/ispccdc.c | 65
+-- drivers/media/video/omap3isp/ispreg.h |
1 +
drivers/media/video/omap3isp/ispvideo.c |3 +
3 files changed, 48 insertions(+), 21 deletions(-)
diff --git a/drivers/media/video/omap3isp/ispccdc.c
b/drivers/media/video/omap3isp/ispccdc.c index d58fe45..c583384 100644
--- a/drivers/media/video/omap3isp/ispccdc.c
+++ b/drivers/media/video/omap3isp/ispccdc.c
@@ -58,6 +58,7 @@ static const unsigned int ccdc_fmts[] = {
V4L2_MBUS_FMT_SBGGR12_1X12,
V4L2_MBUS_FMT_SGBRG12_1X12,
V4L2_MBUS_FMT_UYVY8_2X8,
+ V4L2_MBUS_FMT_YUYV8_2X8,
};
/*
@@ -788,11 +789,16 @@ static void ccdc_apply_controls(struct
isp_ccdc_device *ccdc) void omap3isp_ccdc_restore_context(struct
isp_device *isp)
{
struct isp_ccdc_device *ccdc = isp-isp_ccdc;
+ struct v4l2_mbus_framefmt *format;
isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
- ccdc-update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
- | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
+ /* CCDC_PAD_SINK */
+ format = ccdc-formats[CCDC_PAD_SINK];
+ if ((format-code != V4L2_MBUS_FMT_UYVY8_2X8)
+ (format-code != V4L2_MBUS_FMT_UYVY8_2X8))
+ ccdc-update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
+ | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
ccdc_apply_controls(ccdc);
ccdc_configure_fpc(ccdc);
}
@@ -966,14 +972,22 @@ static void ccdc_config_sync_if(struct
isp_ccdc_device *ccdc, u32 syn_mode = isp_reg_readl(isp,
OMAP3_ISP_IOMEM_CCDC,
ISPCCDC_SYN_MODE);
+ syn_mode = ~(ISPCCDC_SYN_MODE_VDHDOUT |
+ ISPCCDC_SYN_MODE_FLDOUT |
+ ISPCCDC_SYN_MODE_VDPOL |
+ ISPCCDC_SYN_MODE_HDPOL |
+ ISPCCDC_SYN_MODE_FLDPOL |
+ ISPCCDC_SYN_MODE_FLDMODE |
+ ISPCCDC_SYN_MODE_DATAPOL |
+ ISPCCDC_SYN_MODE_DATSIZ_MASK |
+ ISPCCDC_SYN_MODE_PACK8 |
+ ISPCCDC_SYN_MODE_INPMOD_MASK);
+
syn_mode |= ISPCCDC_SYN_MODE_VDHDEN;
if (syncif-fldstat)
syn_mode |= ISPCCDC_SYN_MODE_FLDSTAT;
- else
- syn_mode = ~ISPCCDC_SYN_MODE_FLDSTAT;
- syn_mode = ~ISPCCDC_SYN_MODE_DATSIZ_MASK;
switch (syncif-datsz) {
case 8:
syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
@@ -991,28 +1005,18 @@ static void ccdc_config_sync_if(struct
isp_ccdc_device *ccdc,
if (syncif-fldmode)
syn_mode |= ISPCCDC_SYN_MODE_FLDMODE;
- else
- syn_mode = ~ISPCCDC_SYN_MODE_FLDMODE;
if (syncif-datapol)
syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
- else
- syn_mode = ~ISPCCDC_SYN_MODE_DATAPOL;
if (syncif-fldpol)
syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
- else
- syn_mode = ~ISPCCDC_SYN_MODE_FLDPOL;
if (syncif-hdpol)
syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
- else
- syn_mode = ~ISPCCDC_SYN_MODE_HDPOL;
if (syncif-vdpol)
syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
- else
- syn_mode = ~ISPCCDC_SYN_MODE_VDPOL;
if (syncif-ccdc_mastermode) {
syn_mode |= ISPCCDC_SYN_MODE_FLDOUT | ISPCCDC_SYN_MODE_VDHDOUT;
@@ -1027,9 +1031,7 @@ static void ccdc_config_sync_if(struct
isp_ccdc_device *ccdc,
| syncif-hlprf ISPCCDC_PIX_LINES_HLPRF_SHIFT,
OMAP3_ISP_IOMEM_CCDC,
ISPCCDC_PIX_LINES);
- } else
- syn_mode = ~(ISPCCDC_SYN_MODE_FLDOUT |
- ISPCCDC_SYN_MODE_VDHDOUT);
+ }
isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
@@ -1181,6 +1183,9 @@ static void ccdc_configure(struct isp_ccdc_device
*ccdc)
isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
+ if (format-code == V4L2_MBUS_FMT_UYVY8_2X8)
+ isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
+ ISPCCDC_CFG_Y8POS);
/* Mosaic filter */
switch (format-code) {
case V4L2_MBUS_FMT_SRGGB10_1X10:
@@ -1200,7 +1205,10 @@ static void ccdc_configure(struct isp_ccdc_device
*ccdc) ccdc_pattern = ccdc_sgrbg_pattern;
break;
}
-
Re: [RFC PATCH 07/10] documentation/dt: Add spinlock bindings
On Wed, Aug 24, 2011 at 03:09:13PM +0200, Benoit Cousson wrote: Add documentation for the HW spinlock in OMAP4. Signed-off-by: Benoit Cousson b-cous...@ti.com Cc: Randy Dunlap rdun...@xenotime.net --- .../bindings/hwspinlock/omap-spinlock.txt |5 + 1 files changed, 5 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/hwspinlock/omap-spinlock.txt diff --git a/Documentation/devicetree/bindings/hwspinlock/omap-spinlock.txt b/Documentation/devicetree/bindings/hwspinlock/omap-spinlock.txt new file mode 100644 index 000..36ac074 --- /dev/null +++ b/Documentation/devicetree/bindings/hwspinlock/omap-spinlock.txt @@ -0,0 +1,5 @@ +HW spinlock on OMAP platform: + +Required properties: +- compatible : Must be ti,omap-spinlock; ti,omap-* is probably too generic. omap3-spinlock or omap4-spinlock would be better. +- hwmods : spinlock -- 1.7.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2] ASoC: omap: convert per-board modules to platform drivers
This converts the per-board modules to platform drivers for a
device created by in main platform setup. These drivers call
snd_soc_register_card() directly instead of going via a soc-audio
device and the corresponding driver in soc-core.
Signed-off-by: Mans Rullgard mans.rullg...@linaro.org
---
Platform device names fixed.
N8x0 changed to get clocks before registering card.
---
arch/arm/mach-omap2/board-3430sdp.c |6 ++
arch/arm/mach-omap2/board-4430sdp.c |6 ++
arch/arm/mach-omap2/board-am3517evm.c|7 +++
arch/arm/mach-omap2/board-devkit8000.c |6 ++
arch/arm/mach-omap2/board-igep0020.c |6 ++
arch/arm/mach-omap2/board-n8x0.c |6 ++
arch/arm/mach-omap2/board-omap3beagle.c |6 ++
arch/arm/mach-omap2/board-omap3evm.c |7 +++
arch/arm/mach-omap2/board-omap3pandora.c |6 ++
arch/arm/mach-omap2/board-overo.c| 17 ++
arch/arm/mach-omap2/board-rx51.c |6 ++
arch/arm/mach-omap2/board-zoom-peripherals.c |6 ++
sound/soc/omap/am3517evm.c | 55 ---
sound/soc/omap/igep0020.c| 52 --
sound/soc/omap/n810.c| 73 --
sound/soc/omap/omap3beagle.c | 55 ---
sound/soc/omap/omap3evm.c| 56 +---
sound/soc/omap/omap3pandora.c| 70 +++--
sound/soc/omap/overo.c | 56 ---
sound/soc/omap/rx51.c| 55 +--
sound/soc/omap/sdp3430.c | 65 ++-
sound/soc/omap/sdp4430.c | 60 +
sound/soc/omap/zoom2.c | 68
23 files changed, 509 insertions(+), 241 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c
b/arch/arm/mach-omap2/board-3430sdp.c
index 5dac974..4c6a845 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -470,6 +470,11 @@ static struct twl4030_codec_data sdp3430_codec = {
.audio = sdp3430_audio,
};
+static struct platform_device sdp3430_soc_audio = {
+ .name = sdp3430-soc-audio,
+ .id = -1,
+};
+
static struct twl4030_platform_data sdp3430_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end= TWL4030_IRQ_END,
@@ -796,6 +801,7 @@ static void __init omap_3430sdp_init(void)
sdp3430_display_init();
enable_board_wakeup_source();
usbhs_init(usbhs_bdata);
+ platform_device_register(sdp3430_soc_audio);
}
MACHINE_START(OMAP_3430SDP, OMAP3430 3430SDP board)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index 63de2d3..d73d7e7 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -276,11 +276,17 @@ static struct platform_device sdp4430_lcd_device = {
.id = -1,
};
+static struct platform_device sdp4430_soc_audio = {
+ .name = sdp4430-soc-audio,
+ .id = -1,
+};
+
static struct platform_device *sdp4430_devices[] __initdata = {
sdp4430_lcd_device,
sdp4430_gpio_keys_device,
sdp4430_leds_gpio,
sdp4430_leds_pwm,
+ sdp4430_soc_audio,
};
static struct omap_lcd_config sdp4430_lcd_config __initdata = {
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index 63af417..5d632f6 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -457,6 +457,11 @@ static void am3517_evm_hecc_init(struct
ti_hecc_platform_data *pdata)
platform_device_register(am3517_hecc_device);
}
+static struct platform_device am3517_evm_soc_audio = {
+ .name = am3517evm-soc-audio,
+ .id = -1,
+};
+
static struct omap_board_config_kernel am3517_evm_config[] __initdata = {
};
@@ -487,6 +492,8 @@ static void __init am3517_evm_init(void)
/* MUSB */
am3517_evm_musb_init();
+
+ platform_device_register(am3517_evm_soc_audio);
}
MACHINE_START(OMAP3517EVM, OMAP3517/AM3517 EVM)
diff --git a/arch/arm/mach-omap2/board-devkit8000.c
b/arch/arm/mach-omap2/board-devkit8000.c
index 34956ec..070d4f6 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -477,6 +477,11 @@ static struct platform_device omap_dm9000_dev = {
},
};
+static struct platform_device soc_audio = {
+ .name = omap3beagle-soc-audio,
+ .id = -1,
+};
+
static void __init omap_dm9000_init(void)
{
unsigned char *eth_addr = omap_dm9000_platdata.dev_addr;
@@ -505,6 +510,7 @@ static struct platform_device *devkit8000_devices[]
__initdata = {
leds_gpio,
keys_gpio,
omap_dm9000_dev,
+ soc_audio,
};
