From: Jean Pihet j-pi...@ti.com
Remove the vdd_name field from hwmod, which was only used by the SmartReflex
code and has been removed. SmartReflex will use a name field in its internal
structures instead.
Based on Paul's original code for the SmartReflex driver conversion.
Signed-off-by: Paul
result in
no functional change.
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/smartreflex.c |7 +++--
arch/arm/mach-omap2/smartreflex.h |4 +-
arch/arm/mach-omap2/sr_device.c | 50 ++--
3 files
From: Paul Walmsley p...@pwsan.com
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/smartreflex-class3.c |6 +-
arch/arm/mach-omap2/smartreflex.c| 233 +++---
arch/arm/mach-omap2/smartreflex.h
From: Jean Pihet j-pi...@ti.com
Makes the code non-OMAP specific.
Based on Paul's original code for the SmartReflex driver conversion.
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/smartreflex-class3.c |2 +-
arch/arm/mach
From: Paul Walmsley p...@pwsan.com
The code can be added it back in when it actually does something.
Based on Paul's original code for the SmartReflex driver conversion.
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/smartreflex.c
driver conversion.
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Jean Pihet j-pi...@ti.com
Cc: Thara Gopinath th...@ti.com
Cc: Nishanth Menon n...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/smartreflex.c | 53 ++---
arch/arm/mach
From: Paul Walmsley p...@pwsan.com
Add functional clocks for OMAP3 SmartReflex 12 and for OMAP4 SmartReflex 1,23
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/clock3xxx_data.c |6 ++
arch/arm/mach-omap2/clock44xx_data.c
From: Paul Walmsley p...@pwsan.com
struct omap_sr_nvalue_table now contains more than simply n-values, so
rename it accordingly to omap_sr_data_table.
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/smartreflex.c | 29
From: Jean Pihet j-pi...@ti.com
Based on Paul's original code for the SmartReflex driver conversion.
Signed-off-by: Jean Pihet j-pi...@ti.com
Cc: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/smartreflex.c | 51 +++--
arch/arm/mach-omap2/smartreflex.h
From: Jean Pihet j-pi...@ti.com
Use the data from the SmartReflex data struct; make the driver
OMAP independent.
Based on Paul's original code for the SmartReflex driver conversion.
Signed-off-by: Jean Pihet j-pi...@ti.com
Cc: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/smartreflex.c
From: Jean Pihet j-pi...@ti.com
Use pdev and pdata to register the driver and pass data to it from the
platform code.
Based on Paul's original code for the SmartReflex driver conversion.
Signed-off-by: Jean Pihet j-pi...@ti.com
Cc: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2
From: Jean Pihet j-pi...@ti.com
In preparation for the generic driver implementation
Based on Paul's original code for the SmartReflex driver conversion.
Signed-off-by: Jean Pihet j-pi...@ti.com
Cc: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/smartreflex.c | 80
From: Jean Pihet j-pi...@ti.com
Move some functions from mach-omap2/ dir to the plat/ dir.
The SmartReflex class driver is a user of the basic voltage domains
functions (enable, disable, reset).
Signed-off-by: Jean Pihet j-pi...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2
From: Paul Walmsley p...@pwsan.com
If needed should be handled by an atomic notifier. Currently no
code needs this.
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/smartreflex.c |8 +---
arch/arm/mach-omap2/smartreflex.h
...@pwsan.com
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/smartreflex.c | 35 ++-
1 files changed, 14 insertions(+), 21 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index 41c4d2a..154a98b 100644
From: Paul Walmsley p...@pwsan.com
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/smartreflex.c | 53 ++--
arch/arm/mach-omap2/smartreflex.h |8 -
2 files changed, 21 insertions(+), 40
code to
allow board files to specify or override the SmartReflex eFuse data.
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Jean Pihet j-pi...@ti.com
Cc: Thara Gopinath th...@ti.com
Cc: Nishanth Menon n...@ti.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/sr_device.c | 40
From: Jean Pihet j-pi...@ti.com
Associate a name with each SmartReflex instance, rather than
attempting to reuse the name of a voltage domain. This helps remove
any dependencies on SoC-specific structures.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/smartreflex-class3.c
Kevin,
On Thu, Nov 17, 2011 at 10:16 PM, Kevin Hilman khil...@ti.com wrote:
jean.pi...@newoldbits.com writes:
From: Jean Pihet j-pi...@ti.com
When a PM QoS device latency constraint is requested or removed the
PM QoS layer notifies the underlying layer with the updated aggregated
On Thu, Nov 17, 2011 at 10:24 PM, Kevin Hilman khil...@ti.com wrote:
jean.pi...@newoldbits.com writes:
From: Jean Pihet j-pi...@ti.com
Implement the devices wake-up latency constraints using the global
device PM QoS notification handler which applies the constraints to the
underlying layer
On Thu, Nov 17, 2011 at 10:29 PM, Kevin Hilman khil...@ti.com wrote:
jean.pi...@newoldbits.com writes:
From: Jean Pihet j-pi...@ti.com
The MPU latency figures for cpuidle include the MPU itself and also
the peripherals needed for the MPU to execute instructions (e.g.
main memory, caches
Hi Mark, Benoit,
On Tue, Nov 22, 2011 at 6:47 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
On Tue, Nov 22, 2011 at 06:40:07PM +0100, Cousson, Benoit wrote:
On 11/22/2011 5:43 PM, Mark Brown wrote:
This sounds a lot like what devfreq (which was recently merged) is
supposed to do.
From: Jean Pihet j-pi...@ti.com
Hwmod is queried from the OMAP_PM layer to manage the power domains
wake-up latency constraints. Hwmod retrieves the correct power domain
and if it exists it calls the corresponding power domain function.
Tested on OMAP3 Beagleboard and OMAP4 Pandaboard in RET/OFF
From: Jean Pihet j-pi...@ti.com
Update the data from the measurements performed at HW and SW levels.
Cf. http://www.omappedia.org/wiki/Power_Management_Device_Latencies_Measurement
for a detailed explanation on where are the numbers coming from.
ToDo:
- Measure the wake-up latencies for all
Hi Govindraj,
On Thu, Oct 13, 2011 at 3:09 AM, Govindraj govindraj...@gmail.com wrote:
...
Yes, but obviously comes at the expense of power savings. IOW, This is
a hard-coded power vs. performance trade off that we are trying to get
away from.
So, the root of the problem is that the MPU
Hi Ming,
On Wed, Oct 12, 2011 at 4:48 AM, Ming Lei tom.leim...@gmail.com wrote:
Hi,
On Thu, Sep 22, 2011 at 12:14 AM, Jean Pihet jean.pi...@newoldbits.com
wrote:
Update the data from the measurements performed at HW and SW levels.
Cf.
http://www.omappedia.org/wiki
From: Jean Pihet j-pi...@ti.com
. Convert the OMAP I2C driver to the PM QoS API for MPU latency constraints
. Remove the remove the latency related functions from OMAP PM in favor of
the generic per-device PM QoS API
. Implement the devices wake-up latency constraints using the global
device
From: Jean Pihet j-pi...@ti.com
Convert the driver from the outdated omap_pm_set_max_mpu_wakeup_lat
API to the new PM QoS API.
Since the constraint is on the MPU subsystem, use the PM_QOS_CPU_DMA_LATENCY
class of PM QoS. The resulting MPU constraints are used by cpuidle to
decide the next power
From: Jean Pihet j-pi...@ti.com
Remove the following functions from the API:
omap_pm_set_max_mpu_wakeup_lat
omap_pm_set_max_dev_wakeup_lat
omap_pm_set_max_sdma_lat
The generic per-device PM QoS functions shall be used instead, cf.
include/linux/pm_qos.h.
Signed-off-by: Jean Pihet j-pi
From: Jean Pihet j-pi...@ti.com
When a PM QoS device latency constraint is requested or removed the
PM QoS layer notifies the underlying layer with the updated aggregated
constraint value. The constraint is stored in the powerdomain constraints
list and then applied to the corresponding power
From: Jean Pihet j-pi...@ti.com
Hwmod is queried from the OMAP_PM layer to manage the power domains
wake-up latency constraints. Hwmod retrieves the correct power domain
and if it exists it calls the corresponding power domain function.
Tested on OMAP3 Beagleboard and OMAP4 Pandaboard in RET/OFF
From: Jean Pihet j-pi...@ti.com
Implement the devices wake-up latency constraints using the global
device PM QoS notification handler which applies the constraints to the
underlying layer by calling the corresponding function at hwmod level.
Tested on OMAP3 Beagleboard and OMAP4 Pandaboard
From: Jean Pihet j-pi...@ti.com
The MPU latency figures for cpuidle include the MPU itself and also
the peripherals needed for the MPU to execute instructions (e.g.
main memory, caches, IRQ controller, MMU etc). On OMAP3 those
peripherals belong to the MPU and CORE power domains and so
From: Jean Pihet j-pi...@ti.com
Update the data from the measurements performed at HW and SW levels.
Cf. http://www.omappedia.org/wiki/Power_Management_Device_Latencies_Measurement
for a detailed explanation on where are the numbers magically coming from.
ToDo:
- Measure the wake-up latencies
From: Jean Pihet j-pi...@ti.com
Figures are added to the power domains structs for RET and OFF modes.
Note: the latency figures for MPU, PER, CORE, NEON have been obtained
from actual measurements.
The latency figures for the other power domains are preliminary and
shall be added.
Cf. http
Hi Paul,
The series has been updated with the kerneldoc and error path rework,
then re-submitted as v3.
Can you please look at it and possibly pull it?
Please let me know.
Regards,
Jean
On Mon, Oct 10, 2011 at 10:08 AM, Jean Pihet jean.pi...@newoldbits.com wrote:
Hi Paull,
On Fri, Oct 7
Hi Paull,
On Fri, Oct 7, 2011 at 4:53 AM, Paul Walmsley p...@pwsan.com wrote:
Hi
a comment:
On Wed, 21 Sep 2011, jean.pi...@newoldbits.com wrote:
From: Jean Pihet j-pi...@ti.com
Hwmod is queried from the OMAP_PM layer to manage the power domains
wake-up latency constraints. Hwmod
Hi Paul,
On Fri, Oct 7, 2011 at 6:17 AM, Paul Walmsley p...@pwsan.com wrote:
Hi Jean
On Wed, 21 Sep 2011, jean.pi...@newoldbits.com wrote:
From: Jean Pihet j-pi...@ti.com
Figures are added to the power domains structs for RET and OFF modes.
Note: the latency figures for MPU, PER, CORE
Paul,
On Fri, Oct 7, 2011 at 5:26 PM, Paul Walmsley p...@pwsan.com wrote:
Hi Jean
On Wed, 21 Sep 2011, jean.pi...@newoldbits.com wrote:
Figures are added to the power domains structs for RET and OFF modes.
Note: the latency figures for MPU, PER, CORE, NEON have been obtained
from actual
From: Jean Pihet j-pi...@ti.com
Update the documentation for the recently updated pm_qos API, kernel
and user space.
Add the documentation for the per-device PM QoS (dev_pm_qos) framework
API.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
Documentation/power/pm_qos_interface.txt | 92
Hi,
Here is a patch which adds a PM_QOS_MEMORY_THROUGHPUT class to the PM
QoS framework. The idea is to provide a memory or SDMA throughput
constraints class, which can be applied to the low level platform code
using the callback notification mechanism and also a MISC /dev entry
for the
From: Jean Pihet j-pi...@ti.com
Provide a memory or SDMA throughput constraints class,
which can be applied to the low level platform code using the
callback notification mechanism and
also a MISC /dev entry for the constraints from user space.
Signed-off-by: Jean Pihet j-pi...@ti.com
Hi,
You can use https://github.com/tmlind/linux/commits/master.
Regards,
Jean
On Thu, Sep 22, 2011 at 4:47 PM, Daniel Lezcano
daniel.lezc...@linaro.org wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hi all,
I would like to clone the linux-omap git tree but git.kernel.org is down.
:
Signed-off-by: Jean Pihet j-pi...@ti.com
2. Boot tested on x86 nehalem with multiple C-states for both intel_idle
and acpi_idle drivers.
3. Boot tested on T60p thinkpad that has T2600 cpu with multiple C-states.
Also tested the case when there is dynamic changes in C-states
the next power state programmed directly in the
registers via pwrdm_wakeuplat_update_pwrst.
Tested on OMAP3 Beagleboard and OMAP4 Pandaboard in RET/OFF using
wake-up latency constraints on MPU, CORE and PER.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/powerdomain.c | 197
constraints on MPU, CORE and PER.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 26 +-
arch/arm/plat-omap/include/plat/omap_hwmod.h |2 ++
2 files changed, 27 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2
- Correct some numbers when sys_clkreq and sys_offmode are supported
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 28 ++--
1 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach
/Power_Management_Device_Latencies_Measurement
for a detailed explanation on where are the numbers magically coming from.
Tested on OMAP3 Beagleboard in RET/OFF using wake-up latency constraints
on MPU, CORE and PER.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/powerdomains3xxx_data.c
) with constraints on MPU, CORE, PER in
RETention and OFF modes.
[1] http://www.omappedia.org/wiki/Power_Management_Device_Latencies_Measurement
[2] git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git
Jean Pihet (8):
OMAP: convert I2C driver to PM QoS for latency constraints
OMAP: PM: remove
Remove the following functions from the API:
omap_pm_set_max_mpu_wakeup_lat
omap_pm_set_max_dev_wakeup_lat
omap_pm_set_max_sdma_lat
The generic per-device PM QoS functions shall be used instead, cf.
include/linux/pm_qos.h.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
Documentation/arm/OMAP
.
The I2C device latency timing is derived from the FIFO size and the
clock speed and so is applicable to all OMAP SoCs.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/plat-omap/i2c.c | 20
drivers/i2c/busses/i2c-omap.c | 30 +++---
include
constraints on MPU, CORE and PER.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/pm.c | 63 ++
1 files changed, 63 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 3feb359..58b4b76
for MPU and CORE power domains is not lower than the
next state calculated by the per-device PM QoS.
Tested on OMAP3 Beagleboard in RET/OFF using wake-up latency constraints
on MPU, CORE and PER.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 49
From: Jean Pihet j-pi...@ti.com
. Convert the OMAP I2C driver to the PM QoS API for MPU latency constraints
. Remove the remove the latency related functions from OMAP PM in favor of
the generic per-device PM QoS API
. Implement the devices wake-up latency constraints using the global
device
From: Jean Pihet j-pi...@ti.com
Convert the driver from the outdated omap_pm_set_max_mpu_wakeup_lat
API to the new PM QoS API.
Since the constraint is on the MPU subsystem, use the PM_QOS_CPU_DMA_LATENCY
class of PM QoS. The resulting MPU constraints are used by cpuidle to
decide the next power
From: Jean Pihet j-pi...@ti.com
Remove the following functions from the API:
omap_pm_set_max_mpu_wakeup_lat
omap_pm_set_max_dev_wakeup_lat
omap_pm_set_max_sdma_lat
The generic per-device PM QoS functions shall be used instead, cf.
include/linux/pm_qos.h.
Signed-off-by: Jean Pihet j-pi
From: Jean Pihet j-pi...@ti.com
When a PM QoS device latency constraint is requested or removed the
PM QoS layer notifies the underlying layer with the updated aggregated
constraint value. The constraint is stored in the powerdomain constraints
list and then applied to the corresponding power
From: Jean Pihet j-pi...@ti.com
The MPU latency figures for cpuidle include the MPU itself and also
the peripherals needed for the MPU to execute instructions (e.g.
main memory, caches, IRQ controller, MMU etc). On OMAP3 those
peripherals belong to the MPU and CORE power domains and so
From: Jean Pihet j-pi...@ti.com
Update the data from the measurements performed at HW and SW levels.
Cf. http://www.omappedia.org/wiki/Power_Management_Device_Latencies_Measurement
for a detailed explanation on where are the numbers magically coming from.
ToDo:
- Measure the wake-up latencies
From: Jean Pihet j-pi...@ti.com
Hwmod is queried from the OMAP_PM layer to manage the power domains
wake-up latency constraints. Hwmod retrieves the correct power domain
and if it exists it calls the corresponding power domain function.
Tested on OMAP3 Beagleboard and OMAP4 Pandaboard in RET/OFF
From: Jean Pihet j-pi...@ti.com
Implement the devices wake-up latency constraints using the global
device PM QoS notification handler which applies the constraints to the
underlying layer by calling the corresponding function at hwmod level.
Tested on OMAP3 Beagleboard and OMAP4 Pandaboard
From: Jean Pihet j-pi...@ti.com
Figures are added to the power domains structs for RET and OFF modes.
Note: the latency figures for MPU, PER, CORE, NEON have been obtained
from actual measurements.
The latency figures for the other power domains are preliminary and
shall be added.
Cf. http
Hi,
Sorry I was missing the 'From:' line. Patch sent has been resent properly.
On Wed, Sep 21, 2011 at 6:24 PM, jean.pi...@newoldbits.com wrote:
From: Jean Pihet j-pi...@ti.com
Regards,
Jean
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message
Kevin,
On Fri, Sep 16, 2011 at 12:46 AM, Kevin Hilman khil...@ti.com wrote:
Hi Jean,
Jean Pihet jean.pi...@newoldbits.com writes:
Convert the driver from the outdated omap_pm_set_max_mpu_wakeup_lat
API to the new PM QoS API.
Since the constraint is on the MPU subsystem, use
Kevin,
On Fri, Sep 16, 2011 at 1:47 AM, Kevin Hilman khil...@ti.com wrote:
Jean Pihet jean.pi...@newoldbits.com writes:
Implement the devices wake-up latency constraints using the global
device PM QoS notification handler which applies the constraints to the
underlying layer by calling
Paul, Rafael, Kevin,
Ping on this patch set.
IIUC the intention is to have this series merged in 3.2, is that correct?
Regards,
Jean
On Fri, Sep 2, 2011 at 3:13 PM, Jean Pihet jean.pi...@newoldbits.com wrote:
. create a PM layer plugin for per-device constraints, compiled under
Hi Santosh,
On Tue, Sep 13, 2011 at 7:37 AM, Santosh santosh.shilim...@ti.com wrote:
On Tuesday 13 September 2011 12:22 AM, Kevin Hilman wrote:
Santosh Shilimkarsantosh.shilim...@ti.com writes:
This patch adds the MPUSS OSWR (Open Switch Retention) support. The MPUSS
OSWR configuration is
Hi Tero, Govindraj,
On Thu, Sep 8, 2011 at 5:22 PM, Tero Kristo t-kri...@ti.com wrote:
From: R, Govindraj govindraj.r...@ti.com
Add API to determine IO-PAD wakeup event status for a given
hwmod dynamic_mux pad.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
Hi Keerthy,
On Wed, Aug 31, 2011 at 7:25 PM, Keerthy j-keer...@ti.com wrote:
The device file adds the device support for OMAP4
on die temperature sensor.
Signed-off-by: Keerthy j-keer...@ti.com
Cc: t...@atomide.com
---
arch/arm/mach-omap2/Makefile | 1 +
Santosh,
On Fri, Sep 9, 2011 at 11:43 AM, Santosh santosh.shilim...@ti.com wrote:
On Friday 09 September 2011 12:49 AM, Jean Pihet wrote:
On Sun, Sep 4, 2011 at 3:54 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
Allocate the memory to save secure ram context which needs
to be done
Kevin,
On Mon, Aug 29, 2011 at 7:35 PM, Kevin Hilman khil...@ti.com wrote:
Create basic voltagedomains for OMAP2 and associate OMAP2 powerdomains
with the newly created voltage domains.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/Makefile | 3 +-
-omap-pm.git
Applies on v3.1-rc3 + the part A series (pm-wip/voltdm_a branch)
Kevin
Ok after review.
FWIW:
Acked-by: Jean Pihet j-pi...@ti.com
Regards,
Jean
Kevin Hilman (10):
OMAP3+: VC: cleanup i2c slave address configuration
OMAP3+: VC: cleanup PMIC register address configuration
layers.
Based on v3.1-rc3
Series available in branch pm-wip/voltdm_a in my linux-omap-pm tree:
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git
Some comments have been sent on this patch set, otherwise OK after review.
FWIW:
Acked-by: Jean Pihet j-pi...@ti.com
Regards
-omap-pm.git
Applies on v3.1-rc3 + the part A, B C series.
Kevin
Ok to me after review.
FWIW:
Acked-by: Jean Pihet j-pi...@ti.com
Regards,
Jean
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info
-omap-pm.git
Applies on v3.1-rc3 + the part A B series.
Kevin
Some comments have been sent on this patch set, otherwise OK after review.
FWIW:
Acked-by: Jean Pihet j-pi...@ti.com
Regards,
Jean
Kevin Hilman (11):
OMAP3+: VP: cleanup: move VP instance into voltdm, misc. renames
OMAP3
Mike, Kevin,
On Thu, Jun 30, 2011 at 2:25 AM, Mike Turquette mturque...@ti.com wrote:
From: Nishanth Menon n...@ti.com
We have multiple interrupt status hidden in the PRM interrupt status
reg. Make this handling generic to allow us to pull out LDO status such
as those for ABB from it using
Hi Mike,
On Thu, Jun 30, 2011 at 2:25 AM, Mike Turquette mturque...@ti.com wrote:
Due to voltage domain trimming and silicon characterstics some silicon
may experience instability when operating at a high voltage. To
compensate for this an Adaptive Body-Bias ldo exists. First featured in
Mike,
I have a minor comment below.
On Thu, Jun 30, 2011 at 2:25 AM, Mike Turquette mturque...@ti.com wrote:
The Adaptive Body-Bias ldo can be set to bypass or Forward Body-Bias
after voltage scaling is performed.
This patch implements the Adaptive Body-Bias ldo initialization routine
and
Ming Lei, Thomas,
Sorry if it is a bit late to jump in.
On Mon, Aug 22, 2011 at 10:27 AM, Thomas Renninger tr...@suse.de wrote:
On Saturday, August 20, 2011 04:40:09 AM Ming Lei wrote:
Hi,
2011/8/20 Thomas Renninger tr...@suse.de:
On Friday, August 19, 2011 05:04:04 PM
-pm.git
Jean Pihet (8):
OMAP: convert I2C driver to PM QoS for latency constraints
OMAP: PM: create a PM layer plugin for per-device constraints
OMAP2+: powerdomain: control power domains next state
OMAP3: powerdomain data: add wake-up latency figures
OMAP2+: omap_hwmod: manage the wake
.
Currently only OMAP3 is placing constraints on the MPU.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/plat-omap/i2c.c | 20
drivers/i2c/busses/i2c-omap.c | 31 ++-
2 files changed, 18 insertions(+), 33 deletions(-)
diff --git a/arch/arm
Created arch/arm/plat-omap/omap-pm-constraints.c file from
arch/arm/plat-omap/omap-pm-noop.c and the associated Kconfig option
OMAP_PM_CONSTRAINTS.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/plat-omap/Kconfig |7 +
arch/arm/plat-omap/Makefile |1
the next power state programmed directly in the
registers via pwrdm_wakeuplat_update_pwrst.
Tested on OMAP3 Beagleboard and OMAP4 Pandaboard in RET/OFF using
wake-up latency constraints on MPU, CORE and PER.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/powerdomain.c | 190
wake-up latency constraints
on MPU, CORE and PER.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/powerdomains3xxx_data.c | 78 +++
1 files changed, 78 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c
b/arch/arm/mach
constraints on MPU, CORE and PER.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 26 +-
arch/arm/plat-omap/include/plat/omap_hwmod.h |2 ++
2 files changed, 27 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2
class for the bus throughput needs to be
added.
Tested on OMAP3 Beagleboard and OMAP4 Pandaboard in RET/OFF using wake-up
latency constraints on MPU, CORE and PER.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/plat-omap/include/plat/omap-pm.h | 128 -
arch/arm/plat
latencies must be
included in this figure.
Tested on OMAP3 Beagleboard in RET/OFF using wake-up latency constraints
on MPU, CORE and PER.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 42 +++-
arch/arm/mach-omap2/pm.h
- Correct some numbers when sys_clkreq and sys_offmode are supported
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 14 +++---
1 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2
On Thu, Aug 25, 2011 at 4:17 PM, Rafael J. Wysocki r...@sisk.pl wrote:
On Thursday, August 25, 2011, Mark Brown wrote:
On Tue, Aug 23, 2011 at 11:31:54PM +0200, Rafael J. Wysocki wrote:
Perhaps. Still, that requires some policy to be put into drivers,
which I don't think is entirely
From: Jean Pihet j-pi...@ti.com
High level implementation:
1. Preparation of the PM QoS for the addition of a device PM QoS constraints
framework:
. rename and move of the PM QoS implementation files to kernel/power/qos.c
and include/linux/pm_qos.h
. rename of API parameters
From: Jean Pihet j-pi...@ti.com
The PM QoS implementation files are better named
kernel/power/qos.c and include/linux/pm_qos.h.
The PM QoS support is compiled under the CONFIG_PM option.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-msm/clock.c |2 +-
drivers/acpi
From: Jean Pihet j-pi...@ti.com
- Misc fixes to improve code readability:
. rename struct pm_qos_request_list to struct pm_qos_request,
. rename pm_qos_req parameter to req in internal code,
consistenly use req in the API parameters,
. update the in-kernel API callers to the new parameters
From: Jean Pihet j-pi...@ti.com
Move around the PM QoS misc devices management code
for better readability.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
kernel/power/qos.c | 45 +++--
1 files changed, 23 insertions(+), 22 deletions(-)
diff --git
From: Jean Pihet j-pi...@ti.com
In preparation for the per-device constratins support, re-organize
the data strctures:
- add a struct pm_qos_constraints which contains the constraints
related data
- update struct pm_qos_object contents to the PM QoS internal object
data. Add a pointer to struct
From: Jean Pihet j-pi...@ti.com
In preparation for the per-device constratins support:
- rename update_target to pm_qos_update_target
- generalize and export pm_qos_update_target for usage by the upcoming
per-device latency constraints framework:
. operate on struct pm_qos_constraints
From: Jean Pihet j-pi...@ti.com
Implement the per-device PM QoS constraints by creating a device
PM QoS API, which calls the PM QoS constraints management core code.
The per-device latency constraints data strctures are stored
in the device dev_pm_info struct.
The device PM code calls the init
From: Jean Pihet j-pi...@ti.com
Add a global notification chain that gets called upon changes to the
aggregated constraint value for any device.
The notification callbacks are passing the full constraint request data
in order for the callees to have access to it. The current use
On Tue, Aug 16, 2011 at 6:08 AM, mark gross markgr...@thegnar.org wrote:
On Sun, Aug 14, 2011 at 03:37:43PM +0200, Rafael J. Wysocki wrote:
On Sunday, August 14, 2011, Jean Pihet wrote:
Hi Rafael, Mark,
On Sat, Aug 13, 2011 at 10:34 PM, Rafael J. Wysocki r...@sisk.pl wrote:
On Saturday
Hi Rafael,
2011/8/14 Rafael J. Wysocki r...@sisk.pl:
Hi,
There is some code duplication in this patch that should better be
avoided (details below).
On Thursday, August 11, 2011, jean.pi...@newoldbits.com wrote:
From: Jean Pihet j-pi...@ti.com
Add a global notification chain that gets
From: Jean Pihet j-pi...@ti.com
High level implementation:
1. Preparation of the PM QoS for the addition of a device PM QoS constraints
framework:
. rename and move of the PM QoS implementation files to kernel/power/qos.c
and include/linux/pm_qos.h
. rename of API parameters
401 - 500 of 931 matches
Mail list logo
