On Wed, 2012-10-10 at 06:38 +0800, Stephen Warren wrote:
On 10/08/2012 04:26 AM, Joseph Lo wrote:
Enable csite (debug and trace controller) clock at init to prevent it
be disabled. And this also the necessary clock for CPU be brought up or
resumed from a power-gate low power state (e.g.,
On 10/08/2012 04:26 AM, Joseph Lo wrote:
Enable csite (debug and trace controller) clock at init to prevent it
be disabled. And this also the necessary clock for CPU be brought up or
resumed from a power-gate low power state (e.g., LP2).
Does it make sense to enable this clock only when
Enable csite (debug and trace controller) clock at init to prevent it
be disabled. And this also the necessary clock for CPU be brought up or
resumed from a power-gate low power state (e.g., LP2).
Signed-off-by: Joseph Lo jose...@nvidia.com
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arch/arm/mach-tegra/common.c |1 +
1 files
