On Thu, 24 Mar 2005 05:54:17 + (GMT), Ramesh Chhaba
[EMAIL PROTECTED] wrote:
Yes Sir ,
u was right that I was missing that payload = line in configuration :)
So I have aded that line
and also enabled STD_FLASH
and ELF_BOOT
options and also added
PAY_LOAD_SIZE = 64KB
and
Just hope they didn't route the Flash write through the 87570. The micro has
2KB or ROM so you can't change that if it's been burned in.
Does that mean something like if I rewrite the Flash, a Part of the old
Bios is still in the ROM of the 87570. The modified code in flash will
never be
Second thing I have got the BIOS writer guide for STPC
So If I think I changes the replaces the code of STPC_ELITE
for that of STPC_ATLAS then I can make it for STPC_ATLAS
If you are going to have to do a lot of re-write work I encourage you
to start over with V2. V1 is a dead end
this is a clear FAQ entry.
For v1 yes but not for v2 and most of our docs now are all for v2. I
think I would still make v1 people ask so we can tell them not to use
v1.
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I alsoo need the help regarding when to write code for BIOS
what sequence should I follow
I mean which part to init first and which to next
Ex .
1. Enable flat mode
2. init memory
then ??
Are you following the examples from the BIOS Writers guide on the ST
dev site? I
On Wed, 23 Mar 2005 06:53:22 + (GMT), Ramesh Chhaba
[EMAIL PROTECTED] wrote:
I am using tulip.zelf as payload that I have taken
from the rom-o-matic
I have copied this file to the place of linux kernel
But when i compile it ,it gives eorror.
6+0 records
Now something strange happens:
The Riser allows to jumper the IDSEL/AD to 12 different positions, all but one
position lead to a collision of 2 PCI cards, yes, only in one position i have
a collision.
You have a board with 12 different PCI devices on it? Yikes.
Now the strange thing is,
You have a board with 12 different PCI devices on it? Yikes.
No, it are more, see below ;-)
#lspci
00:00.0 Host bridge: Intel Corp. 82852/855GM Host Bridge (rev 02)
00:02.0 VGA compatible controller: Intel Corp. 82852/855GM Integrated Graphics
00:1d.0 USB Controller: Intel Corp. 82801DB
Well - it was the one available for the mini-itx-case as low profile one, no
doubt the manufacturers know why they do not use bridges...
Ah I'm probably talking about a different device. The riser PCI cards
I'm thinking of will generally add too much extra capacitance to the
bus. The clock
Looking at Stefan's /dev/bios code I see the use of 6
to enable write access to the flash. But I don't see
the ability to disable the CS5530A's claim of the read
cycle. So no way to map F elsewhere.
I'm kind of doubtful on this. ROM shadowing has been part of chipsets
for a long time
The ADLO loader needs to handle the conversion from the format linuxbios uses
and whatever bochs bios uses. Currently the loader is terribly primitive.
Bochs dosen't use any of those tables IIRC. The ADLO build just
sticks them in the image file and they get block copied by the loader
along
Richard, can you please make one and post it? Then I can drop it in the
wiki if you don't have time.
Here's my additions to the ADLO serial patch. This will output info
to both the video head and the serial port.
I also preserved the original full redirect which may be useful if
writes to
I'm trying to create the patch for my 440bx stuff but I need some
help. I have a bunch of new files that I added in the tree. So 'cvs
diff' dosen't know about these files and dosen't show anything on the
diffs.
If I check out a new copy of the repository and then diff vs that I
get loads of
I always do something like
cvs update | grep ^? | cut -f2 -d\ |while read name
do
diff -uN /dev/null $name mypatch.newfiles.diff
done
but it is not exactly elegant
I can't seem to make that work. Do I have to protect something from
the shell? I get a bash: syntax error near
On Wed, 9 Mar 2005 19:41:28 +0100, Stefan Reinauer [EMAIL PROTECTED] wrote:
I can't seem to make that work. Do I have to protect something from
the shell? I get a bash: syntax error near unexpected token 'done'
What version of bash are you using? It seems to work fine here.
echo
On Wed, 9 Mar 2005 17:08:20 -0800 (PST), ramesh bios
[EMAIL PROTECTED] wrote:
As for watching the chip select line, I'd love to do
that but I don't have a logic analyzer or probes. I
guess I could do it with an LED and a sharpened wire
but I'd rather not risk damage to my board. :-)
Oh. for
As I found on some chipsets, the CPU can be too fast, and it should:
1. start op
2. wait for 'smbus active' indicator to go to 1
3. wait for 'smbus active' indicator to go to 0
is this by any chance your problem?
The code is basiclly a port of the working V1 assembly code converted
to C.
How difficult is it to port Intel 440BX chipset support from
V1 to V2?
easy. Been done. Ask Richard Smith.
Been working on it. Not even close to done.
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http
RS I don't think in-kernel will be enough. pcmica services depend on the
RS card manager deamon to detect device insertions and register the
RS device. cardmgr is user space.
No, you're a bit wrong. PCMCIA services do not _depend_ on cardmgr.
They may take advantage of it, but do not
On Tue, 8 Mar 2005 10:31:41 -0500, [EMAIL PROTECTED]
[EMAIL PROTECTED] wrote:
If you haven't already tried... maybe a few out's to port 0x80 to slow things
down.
Thats a pretty quick and easy test. I'll do that in a bit and see what happens.
--
Richard A. Smith
[EMAIL PROTECTED] wrote:
If you haven't already tried... maybe a few out's to port 0x80 to slow
things down.
Thats a pretty quick and easy test. I'll do that in a bit and see what
happens.
No change. I still get all 0xff's (not all zeros like I said earlier)
I think I'm a victim
On Tue, 8 Mar 2005 09:53:03 -0800, yhlu [EMAIL PROTECTED] wrote:
So need to make shadowing work in V2 before make ADLO working...?
which region?
0xf - 0xf and 0xc- 0xc. Look at util/ADLO/loader.s
That shows you the ranges.
--
Richard A. Smith
I think I'll just clean this structure up a bit ... it's just an smbus
controller ... how hard can it be?
It was more like. Hey this is known to work and it looks like it does
exaclty the same thing. All I have to do change the bits.
PC hardware. blech.
I don't have any 440
On Tue, 08 Mar 2005 14:23:48 -0700, Li-Ta Lo [EMAIL PROTECTED] wrote:
On Tue, 2005-03-08 at 14:32, YhLu wrote:
why does the Linux kernel use bitkeeper?
YH
I seem to remember it was because bitkeeper has really advanced patch
handling and merging tools.
--
Richard A. Smith
You should. What did you do with my XMS system I sent you long ago?
oh, I still have it.
ok, I'll try to bring it out and revive it.
Ok. I'll whip up a patch for v2 and send it to you.
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Ok. I'll whip up a patch for v2 and send it to you.
I'm trying to do a cvs diff command that will show all the new files
I've added to my V2 tree. Whats the magic options?
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On Tue, 8 Mar 2005 14:44:41 -0800, yhlu [EMAIL PROTECTED] wrote:
some questions
1. Where is the defacto location for the serial patch for ADLO?
There isn't one. Search the archvies or I'll have to make you one
later on tonight.
2. about vga init, linuxbios v2 already init that and copy that
to a VM's config file:
bios440.filename = path to the BIOS ROM file
The BIOS has to support Intel 440BX chipset and in general
doesn't need significant changes to support the virtual chipset:
we do a good job emulating 440BX.
Does it do all the status bits of the smbus controller?
There isn't one. Search the archvies or I'll have to make you one
later on tonight.
We need to fix this in the wiki on the ADLO page:
/!\ FixMe Where is the defacto location for the serial patch?
Richard, can you please make one and post it? Then I can drop it in the
wiki if you
We need to fix this in the wiki on the ADLO page:
/!\ FixMe Where is the defacto location for the serial patch?
Richard, can you please make one and post it? Then I can drop it in the
wiki if you don't have time.
Well then looks like I'm the defacto location. I've actually
??? I thought vfat support long filenames.
I believe it is the length of the pathname rather than individual filenames.
Although some filenames may also be affected. I really don't understand
it either. This is my dim recollection from watching some of the
conversation.
It probally
this in CMOS...
3. VGA BIOS already be copied by LinuxBIOS, but should still need let
ADLO know the dev and fun of that .--- put that in CMOS?
4. mptable is alredy in the RAM.
Any suggestion about 1 and 2.
If you use CMOS then make sure the code dosen't depend on some sort of
How difficult is it to port Intel 440BX chipset support from
V1 to V2?
Not terribly hard. It is more of a time/desire thing. Does vmware
accurately simulate what is required to bring memory up or do we
Yep. not to bad. I've got the beginnings of the port already done. I
got hung up on
Anyone tried LinuxBIOS with freeBSD?
I talked to freebsd guys about it. Freebsd makes BIOS calls, so that would
need to be fixed.
That or see if it works with ADLO.
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ASUS boards in general. The K8V-X uses the VIA K8T800 chipset, which
seems to be fairly common. Is anyone working on this? Is ASUS amiable to
linuxbios? What's the word on the street?
Not really. A lot of the ASUS boards worked with so far have special
things done to the SMbus and thus
On Fri, 04 Mar 2005 15:37:31 -0600, Bari Ari [EMAIL PROTECTED] wrote:
http://wiki.linuxbios.org/ADLO
That info is all from my V1 stuff and ADLO is not in V2 yet. However
its just a elf payload just like anything else so it will load fine.
It won't run until you get the shadowing right.
I
On Wed, 2 Mar 2005 08:05:06 -0700 (MST), Ronald G. Minnich
rminnich@lanl.gov wrote:
On Wed, 2 Mar 2005, Peter Karlsson wrote:
Ok, thanks again for educating me!
so, peter, you want to accumulate the Glossary for us :-)
A tehnical glossary would be nice but one thing we _really_ need
listing of all config options and what they do. This was (and still
is) one of the largest hurdles for me. And its one of the things that
Google won't find much on.
Should this be generated automatically out of Options.lb? There is a lot
of description in that file already.
Thats a
I've been adding selected info from my V1 FAQ up into the wiki. The
following is some info I compiled up on V1 start up.
If someone(s) would update this for V2 and post it t the wiki I think
it would be very useful.
Help! I'm a newbie and I'm completely lost
And if that were done, Linux would not need to parse a
PIRQ table, yes?
LinuxBIOS does not do that, it provides the tables and requires the OS
to do so.
I've found that Linux up to 2.6.9 (I haven't tested .10) Dosen't do
this fully. With my 440bx chipset there are config registers in
So would someone who DOES have an account please edit the login page to
put a mailto link there to allow users to at least know that the UI on
that page isn't as described in the error you get when you try to create
an account the way the page says to do so? It's guaranteed to be an FAQ
it was my understanding that the reason the pcmcia/cardbus stuff got
integrated into kernel in the first place was to support booting from such
devices.
I believe you are correct but I seem to remember that it will only be
posible via early userspace due to the database lookup cardmgr has to
I don't know what the difference between the 440LX and BX is Buta
as long as the ram registers are the same the 440bx stuff should
work fine. Unless they have done something messy with the access
to the SPD on the ram.
I just look on developer.intel.com and fouind the 440LX datasheet.
On Fri, 11 Feb 2005 08:32:43 -0800, Adam Talbot [EMAIL PROTECTED] wrote:
How fast is the ROM chip MB/s. In my case a SST 39SF020A 70-4C-NH. I was
trying to figure out what would be faster... Linuxbios calling a 2.6 kernel
off the hard drive, or loading my 2.6 kernel out of the rom file. I
there are no stupid questions, this stuff is hard. We would be very
grateful for your help. I would start with richard smith's 440bx port on
V2.
Yeah that would be great.. _If_ it worked. I got stuck getting data
back from the SM controller. Its really wierd. I can see data
happening on
Silly question #1: what is V1 and V2? Do these map to the two modules
under sourceforge CVS: freebios and freebios2? Which tree is better
to use and more likely to work?
V1 is the only tree that can work. I haven't even given anybody my V2
patches which don't work yet anyway. So V1 is
Quick (cheeky) question: does LinuxBIOS support the 440LX chipset?
I don't know what the difference between the 440LX and BX is Buta as
long as the ram registers are the same the 440bx stuff should work
fine. Unless they have done something messy with the access to the
SPD on the ram.
PPS
There has been talk of adding emu86 to the kernel. Where's the source
for your 32K version? I'd also like to look at your code for setting
up the environment to run the VBIOS. PPC/IA64 people have been asking
for us to add emu86 support so that they can reset their cards. With a
32K
The emulator is slightly larger than 32KB. For the Tyan S2885
mainboard, the difference of the final romimage is 41376 bytes.
Actuall, it is for uncompress romimage. For compressed image,
it is about 16KB.
Wow. I didn't realize that the Linuxbios verison would compile down
and compress
get a lot smaller. I remember Paulo saying that there was lots of
code duplication in the x86 instruction emulation that could be
consolidated.
I think Ollie did this already.
Ah. Well that would explain why is so much smaller. Looking back
through my mail I see where he mentioned
code duplication in the x86 instruction emulation that could be
consolidated.
It is Paulo's work.
Ah well there you go. My knowledge was outdated. Looks like the
cutting edge of x86emu developement now is the linuxbios emu tree.
Did you also extend Paulo's work? He mentioned that
and if so, would LinuxBios support the cipset? I am at work at the moment,
so I cant give you the chipset part numbers, but if you need them I will
send them when I get home.
- SMSC FDC37C665GT (SuperIO)
- OPTi 82C802GA (Northbridge?)
- OPTi 82C602A (RTC/companion chip?)
- OPTi 82C931 (Audio)
something I have been wondering. Suppose someone starts working on that
IDE driver to fix it for once in bochs bios. Won't we find out that
getting it work right is chip-set specific thing?
curently bochs bios is based on intel 440fx chipset or some such.
I don't think so. FILO does it
I don't think so. FILO does it right. Is it chipset specific?
It just uses the generic IDE io interface. No chipset specifics are
needed for IDE. Booting USB or PCMCIA is a bit trickier though.
So there you go. Bochs shoud be able to be made generic. I think it
is generic right now
I still remmber an IDE code that would work with Samsung HDD's but not IBM
hdd's. So it is possible to have disk/chipset specific code.
Thats buggy IDE hardware either the host chipset or the drive. I've
written lowlevel IDE routines for another project that do direct LBA
sector reads and
Well seems to me that if the movement toward according to the spec
is causes a problem then the project as a whole has an issue that
ought to be worked out.
Actually thinking about this more... I can probally see thier point.
They don't have hardware so implementation of all the flags and
I just attempted to flash my epia M1 with the official latest bios
from via (and their stupid awflsomething program) and the mobo is dead.
Is the bios chip mounted on the pcb or socketed?
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Is the bios chip mounted on the pcb or socketed?
it's socketed
Find someone with a programer and re-burn the chip or send it to me
and I'll program it for you.
Is there not some sort of recovery jumper?
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___
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Proposal:
Just use proprietary BIOS. you can buy it from BIOS upgrading company.
and even I think you MIGHT be able to use a BIOS comes with your PC.
Your proposal dosen't make any sense.
Why on earth would you want to boot LinuxBIOS only to then boot into a
proprietary BIOS?
When you
For booting Windows after you installed linuxbios.
You still aren't makeing sense to me. Booting a COTS bios after you
boot linuxbios to boot windows is a regression not an advancement.
You aren't getting any extra features. You are just adding
complexity. If you are going to boot a COTS
It makes sense if you usually want to boot Linux, but sometimes
want to boot Windows.
If you have a setup that you are doing dual boot on I don't really see
why you would be a canidate for using Linuxbios. Not in its current
state anyway.
I guess if nothing else it would be a good technical
Look at Adam Sulmicki's ADLO work, he did something very similar to this.
I currently use ADLO so I might be able to answer your questions.
I've only sucessfully booted linux via LILO under ADLO. I mostly use
ADLO to get the video bios up and going.
I've tried to boot a MSDOS compact flash
Thinking about ADLO and the shadow enable/disable got some wheels turning.
I've been spending lots of time in V2 and I was wondering if the same
type of methodology can't work for ADLO.
In V2 there are specifc .c files that do thing in a chipset specific
way and the auto.c includes them as
On Wed, 26 Jan 2005 13:12:27 -0600, Richard Smith [EMAIL PROTECTED] wrote:
But I actually think that is overkill. v2 by default and design
enables all of the shadow ranges as memory. So we just need to
use those ranges. That should be much easier having to patch
ADLO each time
But I actually think that is overkill. v2 by default and design
enables all of the shadow ranges as memory. So we just need to
use those ranges. That should be much easier having to patch
ADLO each time. It is fairly unlikely a writable ROM segment is
Ok.. Well when you put it that way
or perhaps to put it other way around; 95% of current problems with BOCHS
bios is related to the ide driver. Get IDE driver right and it is quite
possible most of the stuff will work.
I think that I when I remeber looking at the diff between ADLO and the
latest bochs stuff that the ADLO stuff
http://cvs.sourceforge.net/viewcvs.py/freebios/freebios/util/ADLO/loader.s?rev=1.1view=auto
it mentions sources as 0x8000 and 0x18000, so I guess they have been
aready copied out of rom into the the low memory by linuxbios ???
(i think that's part of the ELF header specs to tell
Yes you can do that with ELF.
The big gotcha is going to be that there are pirq tables current
stored at 0xf that you are not going to want to stomp.
Actually thats not that much of an issue. It currently stomps it already
ADLO has that table broken out into a single binary file. All I
Man the waters just get deeper. I though auto.c was first. I just
looked at failover.c and the fallback does a 'retun bist' so who
called failover.c?
Can you list out the boot sequence for me step by step? Who calls what?
It is the order they are listed in Config.lb.
Or more
Whats the difference for romcc between what I see in the code which looks
like:
Never mind I _finally_ get it. auto.c defines functions that are
used the the #include files. So they have to be included after the
definition in auto.c
--
Richard A. Smith
And since I don't have prototypes (which makes inlining easier) those
functions must be defined before they are used.
Just curious now, how does the lack of prototypes make inlining easier?
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dump_spd_registers in generic_dump_spd.c isn't really so generic.
It assumes that you have 2 memory channels which fails to build for me.
Is there already some method of indicating how many memory channels
you have our should I just create a #define option that you set when
you need to use this
Something is messed up with my dependencys.
After I edit auto.c and do a make in my top level config directory. I
get nothing to be done for 'all' after playing with it more I can go
into the fallback direcory and delete all the .o's and .inc's and lots
of other files but as long as I don't mess
It should be straight forward to remove all of the tests etc for switching
from a fallback to a normal image.
Do I really have to remove them? Ron seemed to suggest that if I just
turn off the fallback suff then I will end up with only a singel
fallback image.
I was thinking of
Our product is going to go into Gasoline pumps. You would not believe
the lengths that some store operators go to so they can cheat the
consumer slightly per fillup. So our customer requires a flash update
to be physical mod.
I want to know more about their tricks. Is there any mod
What's the functional purpose of auto.c? Obvously to turn on the ram
but what else?
Are the #includes distributed through the file for a romcc reason?
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Guess this means that I'll never come out of fallback? Of course I'm
stll a long ways off from that now
you can't really use fallback, I guess, unless you stash those bits
somewhere else.
Unless I wrote them to the flash there's nothing on my board that is
persistent between boots.
Whats the mapping between the various CPU models in the intel directory
and marketing cpu names as I know them like Pentium III, P3 celeron,
Pentuim 4, etc.
At this point I believe the marketing names are going away as they are not
specific enough, so you have to use the full name.
I'll try adding in a northbridge framework and see what happens.
you need to have at least one 'chip'
I do.
chip cpu/intel/socket_PGA370
end
So you must have to have more than that.
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well, I am supposed to put my filo in there RSN, should I do that? My
mistake ...
What about fs_stream?
What's fs_stream?
some questions and compiles. But then again, packing a good
documentation might help further.
That's why I'm asking all these questions. I'm documenting as I go.
I have a PIII celeron. Where do I go loook to find what model that is
so I know what to add into my config?
That was a PGA370, right? I am guessing it is not in there, looking at the
tree.
Right. I created it. And really all it needs is the right
cpu/intel/model_xxx in the config file.
I was just wondering if it's possible to use linuxbios as a kind of
virtualisation machine, meaning that I could use linuxbios to snoop
windows drivers for register hunting (to get real 3D-gfx-support for
instance)? This means that windows would run as a virtual os.
Not really. LinuxBIOS is
cpu model_6xx will not build.
microcode_MU16930c.h: No such file or directory.
I'll play with some others.
Also if you forget to provide enough arguments to romcc you get an
'Invalid tolken' error. A nice enhancement would be to count
arguments and if they don't match then give a incorrect
Looks like you have to have a pci_domain just adding a northbridge
didn't fix it.
So now I'm at
chip northbridge/intel/440bx
device pci_domain 0 on
end
chip cpu/intel/socket_PGA370
end
end
I noticed that I also have 4 irq slots specified. So pci slots with
no pci_domain.
fullfilled (hardware setup loading of os). A virtualisation machine much
like vmware or bochs, except that this machine would let the operating run
on the hardware instead of emulating the hardware (am I making sense?).
So you mean some sort of HAL like the VM on a IBM370 does.
Possible
Does IRQ_SLOT_COUNT have to match how many actual slots are on the MB
or just the number of pci devices in total?
Basically one for each device and one for bus1. Otherwise Linux won't
see the APIC of the 8111.
So the number of devices as counted by lspci?
--
Richard A. Smith
A typo in the header file include name. It should
be microcode_MU16830c.h I just committed the fix.
ok. Thanks I'll update and retry.
Which is roughly cpufamily, cpumodel, stepping as reported by /proc/cpuinfo.
With various bits ignored as seems appropriate.
Ah. Good. That makes it
:)
Do you have any other non-volatile storage?
Nope.
A serial eeprom might be another good choice, of a location for variables.
Anyway I understand the reasons for it and will happily work on brainstorming
By design if you want to change the boot firmware of our device (in
production) you
You should have one per pci slot, as well.. but those should only be
there if something is in the pci slot.. We really need dynamic table
creation for that.
But all in all, 1 per device in lspci is about right
I only have one slot (and only if its loaded) I have many devices
soldered onto
even simpler, it really is (unless I've gone nuts) just ones you want to
put in the table. Note that is slightly different from your statements
above.
Ok That narrows it down then. So if you want an IRQ routed to it
then it needs to be counted.
--
Richard A. Smith
no, not at all. It's the target/bitworks/richard/Config.lb that determines
normal/fallback or fallback-only configuration, and that in turn will
drive how the thing gets built
Ok. I think I see now that I've looked a bit more closely.
So if I set the HAVE_FALLBACK to 0 then it will only
Starting as a complete V2 newbie, in less than 9 hours of work and on
the _very_ first successful compile, LinuxBIOS V2 produced serial code
output on our IMS board!
well, you made our day. I'm happy it worked. Uh, FAQ? :-)
In progress. I'm documenting as I go. Thats why all the
Ok so by design you really only want a single firmware image.
Right.. I think Ron has me fixed up. I was unaware that there was an
overall flag that enabled/disabled the fallback system.
It should be straight forward to remove all of the tests etc for switching
from a fallback to a normal
I'm trying to setup my /cpu/intel/socket_PGA370 directory. What cpu
model should I use?
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Ok so slowly I'm trying to move to V2.
Step 1 was to just try and get some serial action going.
I added my CPU and superIO and setup my mainboard directory with a
simple config file.
I've got a traceback on buildtarget though. So aparently I'm not
filling out everything that needs to be
I'm starting up the learning curve
Whats the mapping between the various CPU models in the intel directory and
marketing cpu names as I know them like Pentium III, P3 celeron, Pentuim 4, etc.
I don't completely grok the fallback and normal stuff. I know the theory but
not practice. I know
It is used because it is in FC2. I believe it is in recent SuSe too.
I think it is requred for x86_64.
I changed it to be configurable in the Makefile. Just enter your libpci
version there and it will compile. Unfortunately there is no simple way
I didn't see that in V2 makefile I was
It is weird that fuctory bios can still use them.
There's gotta be a hack in fuctory bios, I would guess, something like:
if (the pci card is a vga there is an option rom)
callit();
i.e. I betcha that fuctory bioses will call an option rom on vga even if
it violates the spec.
Do cvs update. The path is still hardcoded.
Both the #include statements in the .c files and the path to the
library had to be changed.
Why did you have to change the #include statements?!?
The include is linux/pci so it will grab my system copy of the
headers.. I can't update the
i.e. I betcha that fuctory bioses will call an option rom on vga even if
it violates the spec.
I doubt that.. I've scrubbed the 0xAA55 from several VGA cards so I
could plug them into a factory bios system and not have the VGA
enabled. None of them ever went ahead and ran the bios.
I can
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